[PATCH] EDAC: e752x byte access fix
The reading of the DRA registers should be a byte at a time (one register at a time) instead of 4 bytes at a time (four registers). Reading a dword at a time retrieves erroneous information from all but the first register. A change was made to read in each register in a loop prior to using the data in those registers. Signed-off-by: Brian Pomerantz <bapper@mvista.com> Signed-off-by: Dave Jiang <djiang@mvista.com> Signed-off-by: Doug Thompson <norsk5@xmission.com> Cc: Alan Cox <alan@lxorguk.ukuu.org.uk> Cc: Andi Kleen <ak@suse.de> Cc: "Eric W. Biederman" <ebiederm@xmission.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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@ -782,7 +782,12 @@ static void e752x_init_csrows(struct mem_ctl_info *mci, struct pci_dev *pdev,
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u8 value;
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u32 dra, drc, cumul_size;
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pci_read_config_dword(pdev, E752X_DRA, &dra);
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dra = 0;
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for (index=0; index < 4; index++) {
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u8 dra_reg;
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pci_read_config_byte(pdev, E752X_DRA+index, &dra_reg);
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dra |= dra_reg << (index * 8);
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}
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pci_read_config_dword(pdev, E752X_DRC, &drc);
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drc_chan = dual_channel_active(ddrcsr);
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drc_drbg = drc_chan + 1; /* 128 in dual mode, 64 in single */
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