MIPS: SEAD3: Implement OF support.
Activate USE_OF for SEAD-3 platform. Add basic DTS file and convert memory detection and reservations to use OF. [ralf@linux-mips.org: Remove unnecessary #ifdef wrapper in generic.h. Make <asm/mips-boards/generic.h> inclusion work even without prior <linux/of_fdt.h> inclusion.] Signed-off-by: Steven J. Hill <sjhill@mips.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/4809/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
Steven J. Hill
Ralf Baechle
parent
8fba1e588b
commit
9b73100911
@ -353,6 +353,7 @@ config MIPS_SEAD3
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select USB_ARCH_HAS_EHCI
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select USB_EHCI_BIG_ENDIAN_DESC
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select USB_EHCI_BIG_ENDIAN_MMIO
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select USE_OF
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help
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This enables support for the MIPS Technologies SEAD3 evaluation
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board.
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@ -87,6 +87,10 @@
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extern int mips_revision_sconid;
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#ifdef CONFIG_OF
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extern struct boot_param_header __dtb_start;
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#endif
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#ifdef CONFIG_PCI
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extern void mips_pcibios_init(void);
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#else
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@ -5,10 +5,12 @@
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# Copyright (C) 2008 Wind River Systems, Inc.
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# written by Ralf Baechle <ralf@linux-mips.org>
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#
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# Copyright (C) 2012 MIPS Technoligies, Inc. All rights reserved.
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# Steven J. Hill <sjhill@mips.com>
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#
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obj-y := sead3-lcd.o sead3-cmdline.o \
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sead3-display.o sead3-init.o sead3-int.o \
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sead3-mtd.o sead3-net.o \
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sead3-memory.o sead3-platform.o \
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sead3-mtd.o sead3-net.o sead3-platform.o \
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sead3-reset.o sead3-setup.o sead3-time.o
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obj-y += sead3-i2c-dev.o sead3-i2c.o \
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@ -17,3 +19,7 @@ obj-y += sead3-i2c-dev.o sead3-i2c.o \
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obj-$(CONFIG_EARLY_PRINTK) += sead3-console.o
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obj-$(CONFIG_USB_EHCI_HCD) += sead3-ehci.o
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obj-$(CONFIG_OF) += sead3.dtb.o
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$(obj)/%.dtb: $(obj)/%.dts
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$(call if_changed,dtc)
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@ -77,7 +77,6 @@ void __init prom_init(void)
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board_ejtag_handler_setup = mips_ejtag_setup;
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prom_init_cmdline();
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prom_meminit();
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#ifdef CONFIG_EARLY_PRINTK
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if ((strstr(prom_getcmdline(), "console=ttyS0")) != NULL)
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prom_init_early_console(0);
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@ -89,3 +88,7 @@ void __init prom_init(void)
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strcat(prom_getcmdline(), " console=ttyS0,38400n8r");
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#endif
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}
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void prom_free_prom_memory(void)
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{
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}
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@ -1,138 +0,0 @@
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/*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* Copyright (C) 2012 MIPS Technologies, Inc. All rights reserved.
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*/
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#include <linux/bootmem.h>
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#include <asm/bootinfo.h>
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#include <asm/sections.h>
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#include <asm/mips-boards/prom.h>
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enum yamon_memtypes {
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yamon_dontuse,
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yamon_prom,
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yamon_free,
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};
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static struct prom_pmemblock mdesc[PROM_MAX_PMEMBLOCKS];
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/* determined physical memory size, not overridden by command line args */
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unsigned long physical_memsize = 0L;
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struct prom_pmemblock * __init prom_getmdesc(void)
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{
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char *memsize_str, *ptr;
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unsigned int memsize;
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static char cmdline[COMMAND_LINE_SIZE] __initdata;
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long val;
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int tmp;
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/* otherwise look in the environment */
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memsize_str = prom_getenv("memsize");
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if (!memsize_str) {
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pr_warn("memsize not set in boot prom, set to default 32Mb\n");
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physical_memsize = 0x02000000;
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} else {
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tmp = kstrtol(memsize_str, 0, &val);
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physical_memsize = (unsigned long)val;
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}
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#ifdef CONFIG_CPU_BIG_ENDIAN
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/* SOC-it swaps, or perhaps doesn't swap, when DMA'ing the last
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word of physical memory */
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physical_memsize -= PAGE_SIZE;
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#endif
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/* Check the command line for a memsize directive that overrides
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the physical/default amount */
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strcpy(cmdline, arcs_cmdline);
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ptr = strstr(cmdline, "memsize=");
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if (ptr && (ptr != cmdline) && (*(ptr - 1) != ' '))
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ptr = strstr(ptr, " memsize=");
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if (ptr)
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memsize = memparse(ptr + 8, &ptr);
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else
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memsize = physical_memsize;
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memset(mdesc, 0, sizeof(mdesc));
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mdesc[0].type = yamon_dontuse;
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mdesc[0].base = 0x00000000;
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mdesc[0].size = 0x00001000;
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mdesc[1].type = yamon_prom;
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mdesc[1].base = 0x00001000;
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mdesc[1].size = 0x000ef000;
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/*
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* The area 0x000f0000-0x000fffff is allocated for BIOS memory by the
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* south bridge and PCI access always forwarded to the ISA Bus and
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* BIOSCS# is always generated.
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* This mean that this area can't be used as DMA memory for PCI
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* devices.
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*/
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mdesc[2].type = yamon_dontuse;
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mdesc[2].base = 0x000f0000;
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mdesc[2].size = 0x00010000;
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mdesc[3].type = yamon_dontuse;
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mdesc[3].base = 0x00100000;
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mdesc[3].size = CPHYSADDR(PFN_ALIGN((unsigned long)&_end)) -
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mdesc[3].base;
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mdesc[4].type = yamon_free;
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mdesc[4].base = CPHYSADDR(PFN_ALIGN(&_end));
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mdesc[4].size = memsize - mdesc[4].base;
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return &mdesc[0];
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}
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static int __init prom_memtype_classify(unsigned int type)
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{
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switch (type) {
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case yamon_free:
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return BOOT_MEM_RAM;
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case yamon_prom:
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return BOOT_MEM_ROM_DATA;
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default:
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return BOOT_MEM_RESERVED;
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}
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}
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void __init prom_meminit(void)
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{
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struct prom_pmemblock *p;
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p = prom_getmdesc();
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while (p->size) {
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long type;
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unsigned long base, size;
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type = prom_memtype_classify(p->type);
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base = p->base;
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size = p->size;
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add_memory_region(base, size, type);
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p++;
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}
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}
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void __init prom_free_prom_memory(void)
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{
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unsigned long addr;
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int i;
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for (i = 0; i < boot_mem_map.nr_map; i++) {
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if (boot_mem_map.map[i].type != BOOT_MEM_ROM_DATA)
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continue;
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addr = boot_mem_map.map[i].addr;
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free_init_pages("prom memory",
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addr, addr + boot_mem_map.map[i].size);
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}
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}
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@ -6,6 +6,12 @@
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* Copyright (C) 2012 MIPS Technologies, Inc. All rights reserved.
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*/
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#include <linux/init.h>
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#include <linux/of_platform.h>
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#include <linux/of_fdt.h>
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#include <linux/bootmem.h>
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#include <asm/mips-boards/generic.h>
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#include <asm/prom.h>
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int coherentio; /* 0 => no DMA cache coherency (may be set by user) */
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int hw_coherentio; /* 0 => no HW DMA cache coherency (reflects real HW) */
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@ -17,4 +23,25 @@ const char *get_system_type(void)
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void __init plat_mem_setup(void)
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{
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/*
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* Load the builtin devicetree. This causes the chosen node to be
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* parsed resulting in our memory appearing
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*/
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__dt_setup_arch(&__dtb_start);
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}
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void __init device_tree_init(void)
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{
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unsigned long base, size;
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if (!initial_boot_params)
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return;
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base = virt_to_phys((void *)initial_boot_params);
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size = be32_to_cpu(initial_boot_params->totalsize);
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/* Before we do anything, lets reserve the dt blob */
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reserve_bootmem(base, size, BOOTMEM_DEFAULT);
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unflatten_device_tree();
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}
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26
arch/mips/mti-sead3/sead3.dts
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26
arch/mips/mti-sead3/sead3.dts
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@ -0,0 +1,26 @@
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/dts-v1/;
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/memreserve/ 0x00000000 0x00001000; // reserved
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/memreserve/ 0x00001000 0x000ef000; // ROM data
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/memreserve/ 0x000f0000 0x004cc000; // reserved
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/ {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "mti,sead-3";
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cpus {
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cpu@0 {
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compatible = "mti,mips14KEc", "mti,mips14Kc";
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};
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};
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chosen {
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bootargs = "console=ttyS1,38400 rootdelay=10 root=/dev/sda3";
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};
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memory {
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device_type = "memory";
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reg = <0x0 0x08000000>;
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};
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};
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