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[POWERPC] Make iSeries spin on __secondary_hold_spinloop, like pSeries

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Currently all iSeries secondary CPUs spin directly on the cpu_start
field in their paca.  Make them spin on the global
__secondary_hold_spinloop until after the pacas have been initialised.

As Stephen Rothwell points out, this works at the moment because
__secondary_hold_spinloop is being set already, but iSeries isn't
looking at it :)

Signed-off-by: Tony Breeds <tony@bakeyournoodle.com>
Acked-by: Stephen Rothwell <sfr@canb.auug.org.au>
Signed-off-by: Paul Mackerras <paulus@samba.org>
This commit is contained in:
Tony Breeds 2008-04-24 13:43:49 +10:00 committed by Paul Mackerras
parent 4ae2dcb633
commit 9cb82f2f46
1 changed files with 26 additions and 1 deletions
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27
arch/powerpc/platforms/iseries/exception.S
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@ -59,8 +59,33 @@ system_reset_iSeries:
andc r4,r4,r5
mtspr SPRN_CTRLT,r4
/* Spin on __secondary_hold_spinloop until it is updated by the boot cpu. */
/* In the UP case we'll yeild() later, and we will not access the paca anyway */
#ifdef CONFIG_SMP
1:
HMT_LOW
LOAD_REG_IMMEDIATE(r23, __secondary_hold_spinloop)
ld r23,0(r23)
sync
LOAD_REG_IMMEDIATE(r3,current_set)
sldi r28,r24,3 /* get current_set[cpu#] */
ldx r3,r3,r28
addi r1,r3,THREAD_SIZE
subi r1,r1,STACK_FRAME_OVERHEAD
cmpwi 0,r23,0 /* Keep poking the Hypervisor until */
bne 2f /* we're released */
/* Let the Hypervisor know we are alive */
/* 8002 is a call to HvCallCfg::getLps, a harmless Hypervisor function */
lis r3,0x8002
rldicr r3,r3,32,15 /* r0 = (r3 << 32) & 0xffff000000000000 */
li r0,-1 /* r0=-1 indicates a Hypervisor call */
sc /* Invoke the hypervisor via a system call */
b 1b
#endif
2:
HMT_LOW
#ifdef CONFIG_SMP
lbz r23,PACAPROCSTART(r13) /* Test if this processor
* should start */
@ -91,7 +116,7 @@ iSeries_secondary_smp_loop:
li r0,-1 /* r0=-1 indicates a Hypervisor call */
sc /* Invoke the hypervisor via a system call */
mfspr r13,SPRN_SPRG3 /* Put r13 back ???? */
b 1b /* If SMP not configured, secondaries
b 2b /* If SMP not configured, secondaries
* loop forever */
/*** ISeries-LPAR interrupt handlers ***/