Merge branch 'x86-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip

* 'x86-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip:
  x86, gart: Make sure GART does not map physmem above 1TB
  x86, gart: Set DISTLBWALKPRB bit always
  x86, gart: Convert spaces to tabs in enable_gart_translation
This commit is contained in:
Linus Torvalds 2011-04-19 10:58:13 -07:00
commit 9d914b3ef3
3 changed files with 20 additions and 13 deletions

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@ -66,7 +66,7 @@ static inline void gart_set_size_and_enable(struct pci_dev *dev, u32 order)
* Don't enable translation but enable GART IO and CPU accesses. * Don't enable translation but enable GART IO and CPU accesses.
* Also, set DISTLBWALKPRB since GART tables memory is UC. * Also, set DISTLBWALKPRB since GART tables memory is UC.
*/ */
ctl = DISTLBWALKPRB | order << 1; ctl = order << 1;
pci_write_config_dword(dev, AMD64_GARTAPERTURECTL, ctl); pci_write_config_dword(dev, AMD64_GARTAPERTURECTL, ctl);
} }
@ -83,7 +83,7 @@ static inline void enable_gart_translation(struct pci_dev *dev, u64 addr)
/* Enable GART translation for this hammer. */ /* Enable GART translation for this hammer. */
pci_read_config_dword(dev, AMD64_GARTAPERTURECTL, &ctl); pci_read_config_dword(dev, AMD64_GARTAPERTURECTL, &ctl);
ctl |= GARTEN; ctl |= GARTEN | DISTLBWALKPRB;
ctl &= ~(DISGARTCPU | DISGARTIO); ctl &= ~(DISGARTCPU | DISGARTIO);
pci_write_config_dword(dev, AMD64_GARTAPERTURECTL, ctl); pci_write_config_dword(dev, AMD64_GARTAPERTURECTL, ctl);
} }

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@ -499,7 +499,7 @@ int __init gart_iommu_hole_init(void)
* Don't enable translation yet but enable GART IO and CPU * Don't enable translation yet but enable GART IO and CPU
* accesses and set DISTLBWALKPRB since GART table memory is UC. * accesses and set DISTLBWALKPRB since GART table memory is UC.
*/ */
u32 ctl = DISTLBWALKPRB | aper_order << 1; u32 ctl = aper_order << 1;
bus = amd_nb_bus_dev_ranges[i].bus; bus = amd_nb_bus_dev_ranges[i].bus;
dev_base = amd_nb_bus_dev_ranges[i].dev_base; dev_base = amd_nb_bus_dev_ranges[i].dev_base;

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@ -81,6 +81,9 @@ static u32 gart_unmapped_entry;
#define AGPEXTERN #define AGPEXTERN
#endif #endif
/* GART can only remap to physical addresses < 1TB */
#define GART_MAX_PHYS_ADDR (1ULL << 40)
/* backdoor interface to AGP driver */ /* backdoor interface to AGP driver */
AGPEXTERN int agp_memory_reserved; AGPEXTERN int agp_memory_reserved;
AGPEXTERN __u32 *agp_gatt_table; AGPEXTERN __u32 *agp_gatt_table;
@ -212,9 +215,13 @@ static dma_addr_t dma_map_area(struct device *dev, dma_addr_t phys_mem,
size_t size, int dir, unsigned long align_mask) size_t size, int dir, unsigned long align_mask)
{ {
unsigned long npages = iommu_num_pages(phys_mem, size, PAGE_SIZE); unsigned long npages = iommu_num_pages(phys_mem, size, PAGE_SIZE);
unsigned long iommu_page = alloc_iommu(dev, npages, align_mask); unsigned long iommu_page;
int i; int i;
if (unlikely(phys_mem + size > GART_MAX_PHYS_ADDR))
return bad_dma_addr;
iommu_page = alloc_iommu(dev, npages, align_mask);
if (iommu_page == -1) { if (iommu_page == -1) {
if (!nonforced_iommu(dev, phys_mem, size)) if (!nonforced_iommu(dev, phys_mem, size))
return phys_mem; return phys_mem;