soc: fsl: dpio: Adding QMAN multiple enqueue interface
Update of QMAN the interface to enqueue frame. We now support multiple enqueue (qbman_swp_enqueue_multiple) and multiple enqueue with a table of descriptor (qbman_swp_enqueue_multiple_desc). Signed-off-by: Youri Querry <youri.querry_1@nxp.com> Acked-by: Roy Pledge <roy.pledge@nxp.com> Signed-off-by: Li Yang <leoyang.li@nxp.com>
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@ -1,7 +1,7 @@
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// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
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/*
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* Copyright 2014-2016 Freescale Semiconductor Inc.
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* Copyright 2016 NXP
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* Copyright 2016-2019 NXP
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*
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*/
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#include <linux/types.h>
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@ -432,6 +432,69 @@ int dpaa2_io_service_enqueue_fq(struct dpaa2_io *d,
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}
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EXPORT_SYMBOL(dpaa2_io_service_enqueue_fq);
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/**
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* dpaa2_io_service_enqueue_multiple_fq() - Enqueue multiple frames
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* to a frame queue using one fqid.
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* @d: the given DPIO service.
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* @fqid: the given frame queue id.
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* @fd: the frame descriptor which is enqueued.
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* @nb: number of frames to be enqueud
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*
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* Return 0 for successful enqueue, -EBUSY if the enqueue ring is not ready,
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* or -ENODEV if there is no dpio service.
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*/
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int dpaa2_io_service_enqueue_multiple_fq(struct dpaa2_io *d,
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u32 fqid,
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const struct dpaa2_fd *fd,
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int nb)
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{
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struct qbman_eq_desc ed;
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d = service_select(d);
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if (!d)
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return -ENODEV;
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qbman_eq_desc_clear(&ed);
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qbman_eq_desc_set_no_orp(&ed, 0);
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qbman_eq_desc_set_fq(&ed, fqid);
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return qbman_swp_enqueue_multiple(d->swp, &ed, fd, 0, nb);
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}
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EXPORT_SYMBOL(dpaa2_io_service_enqueue_multiple_fq);
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/**
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* dpaa2_io_service_enqueue_multiple_desc_fq() - Enqueue multiple frames
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* to different frame queue using a list of fqids.
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* @d: the given DPIO service.
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* @fqid: the given list of frame queue ids.
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* @fd: the frame descriptor which is enqueued.
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* @nb: number of frames to be enqueud
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*
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* Return 0 for successful enqueue, -EBUSY if the enqueue ring is not ready,
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* or -ENODEV if there is no dpio service.
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*/
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int dpaa2_io_service_enqueue_multiple_desc_fq(struct dpaa2_io *d,
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u32 *fqid,
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const struct dpaa2_fd *fd,
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int nb)
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{
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int i;
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struct qbman_eq_desc ed[32];
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d = service_select(d);
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if (!d)
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return -ENODEV;
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for (i = 0; i < nb; i++) {
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qbman_eq_desc_clear(&ed[i]);
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qbman_eq_desc_set_no_orp(&ed[i], 0);
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qbman_eq_desc_set_fq(&ed[i], fqid[i]);
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}
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return qbman_swp_enqueue_multiple_desc(d->swp, &ed[0], fd, nb);
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}
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EXPORT_SYMBOL(dpaa2_io_service_enqueue_multiple_desc_fq);
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/**
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* dpaa2_io_service_enqueue_qd() - Enqueue a frame to a QD.
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* @d: the given DPIO service.
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@ -526,7 +589,7 @@ EXPORT_SYMBOL_GPL(dpaa2_io_service_acquire);
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/**
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* dpaa2_io_store_create() - Create the dma memory storage for dequeue result.
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* @max_frames: the maximum number of dequeued result for frames, must be <= 16.
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* @max_frames: the maximum number of dequeued result for frames, must be <= 32.
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* @dev: the device to allow mapping/unmapping the DMAable region.
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*
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* The size of the storage is "max_frames*sizeof(struct dpaa2_dq)".
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@ -541,7 +604,7 @@ struct dpaa2_io_store *dpaa2_io_store_create(unsigned int max_frames,
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struct dpaa2_io_store *ret;
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size_t size;
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if (!max_frames || (max_frames > 16))
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if (!max_frames || (max_frames > 32))
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return NULL;
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ret = kmalloc(sizeof(*ret), GFP_KERNEL);
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@ -1,7 +1,7 @@
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// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
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/*
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* Copyright (C) 2014-2016 Freescale Semiconductor, Inc.
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* Copyright 2016 NXP
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* Copyright 2016-2019 NXP
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*
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*/
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@ -12,13 +12,6 @@
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#include "qbman-portal.h"
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#define QMAN_REV_4000 0x04000000
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#define QMAN_REV_4100 0x04010000
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#define QMAN_REV_4101 0x04010001
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#define QMAN_REV_5000 0x05000000
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#define QMAN_REV_MASK 0xffff0000
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/* All QBMan command and result structures use this "valid bit" encoding */
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#define QB_VALID_BIT ((u32)0x80)
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@ -156,7 +149,7 @@ static inline u32 qbman_set_swp_cfg(u8 max_fill, u8 wn, u8 est, u8 rpm, u8 dcm,
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*/
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struct qbman_swp *qbman_swp_init(const struct qbman_swp_desc *d)
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{
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struct qbman_swp *p = kmalloc(sizeof(*p), GFP_KERNEL);
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struct qbman_swp *p = kzalloc(sizeof(*p), GFP_KERNEL);
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u32 reg;
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if (!p)
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@ -467,22 +460,32 @@ static inline void qbman_write_eqcr_am_rt_register(struct qbman_swp *p,
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int qbman_swp_enqueue(struct qbman_swp *s, const struct qbman_eq_desc *d,
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const struct dpaa2_fd *fd)
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{
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struct qbman_eq_desc *p;
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struct qbman_eq_desc_with_fd *p;
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u32 eqar = qbman_read_register(s, QBMAN_CINH_SWP_EQAR);
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if (!EQAR_SUCCESS(eqar))
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return -EBUSY;
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p = qbman_get_cmd(s, QBMAN_CENA_SWP_EQCR(EQAR_IDX(eqar)));
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memcpy(&p->dca, &d->dca, 31);
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/* This is mapped as DEVICE type memory, writes are
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* with address alignment:
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* desc.dca address alignment = 1
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* desc.seqnum address alignment = 2
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* desc.orpid address alignment = 4
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* desc.tgtid address alignment = 8
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*/
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p->desc.dca = d->dca;
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p->desc.seqnum = d->seqnum;
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p->desc.orpid = d->orpid;
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memcpy(&p->desc.tgtid, &d->tgtid, 24);
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memcpy(&p->fd, fd, sizeof(*fd));
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if ((s->desc->qman_version & QMAN_REV_MASK) < QMAN_REV_5000) {
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/* Set the verb byte, have to substitute in the valid-bit */
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dma_wmb();
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p->verb = d->verb | EQAR_VB(eqar);
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p->desc.verb = d->verb | EQAR_VB(eqar);
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} else {
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p->verb = d->verb | EQAR_VB(eqar);
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p->desc.verb = d->verb | EQAR_VB(eqar);
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dma_wmb();
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qbman_write_eqcr_am_rt_register(s, EQAR_IDX(eqar));
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}
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@ -490,6 +493,60 @@ int qbman_swp_enqueue(struct qbman_swp *s, const struct qbman_eq_desc *d,
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return 0;
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}
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/**
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* qbman_swp_enqueue_multiple() - Issue a multi enqueue command
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* using one enqueue descriptor
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* @s: the software portal used for enqueue
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* @d: the enqueue descriptor
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* @fd: table pointer of frame descriptor table to be enqueued
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* @flags: table pointer of flags, not used for the moment
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* @num_frames: number of fd to be enqueued
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*
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* Return the number of fd enqueued, or a negative error number.
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*/
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int qbman_swp_enqueue_multiple(struct qbman_swp *s,
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const struct qbman_eq_desc *d,
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const struct dpaa2_fd *fd,
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uint32_t *flags,
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int num_frames)
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{
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int count = 0;
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while (count < num_frames) {
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if (qbman_swp_enqueue(s, d, fd) != 0)
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break;
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count++;
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}
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return count;
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}
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/**
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* qbman_swp_enqueue_multiple_desc() - Issue a multi enqueue command
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* using multiple enqueue descriptor
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* @s: the software portal used for enqueue
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* @d: table of minimal enqueue descriptor
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* @fd: table pointer of frame descriptor table to be enqueued
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* @num_frames: number of fd to be enqueued
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*
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* Return the number of fd enqueued, or a negative error number.
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*/
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int qbman_swp_enqueue_multiple_desc(struct qbman_swp *s,
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const struct qbman_eq_desc *d,
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const struct dpaa2_fd *fd,
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int num_frames)
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{
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int count = 0;
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while (count < num_frames) {
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if (qbman_swp_enqueue(s, &(d[count]), fd) != 0)
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break;
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count++;
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}
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return count;
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}
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/* Static (push) dequeue */
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/**
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#include <soc/fsl/dpaa2-fd.h>
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#define QMAN_REV_4000 0x04000000
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#define QMAN_REV_4100 0x04010000
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#define QMAN_REV_4101 0x04010001
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#define QMAN_REV_5000 0x05000000
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#define QMAN_REV_MASK 0xffff0000
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struct dpaa2_dq;
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struct qbman_swp;
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u8 wae;
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u8 rspid;
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__le64 rsp_addr;
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};
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struct qbman_eq_desc_with_fd {
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struct qbman_eq_desc desc;
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u8 fd[32];
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};
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void qbman_swp_mc_submit(struct qbman_swp *p, void *cmd, u8 cmd_verb);
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void *qbman_swp_mc_result(struct qbman_swp *p);
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int
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qbman_swp_enqueue_multiple(struct qbman_swp *s,
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const struct qbman_eq_desc *d,
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const struct dpaa2_fd *fd,
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uint32_t *flags,
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int num_frames);
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int
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qbman_swp_enqueue_multiple_desc(struct qbman_swp *s,
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const struct qbman_eq_desc *d,
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const struct dpaa2_fd *fd,
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int num_frames);
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/**
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* qbman_result_is_DQ() - check if the dequeue result is a dequeue response
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* @dq: the dequeue result to be checked
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/* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) */
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/*
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* Copyright 2014-2016 Freescale Semiconductor Inc.
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* Copyright NXP
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* Copyright 2017-2019 NXP
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*
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*/
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#ifndef __FSL_DPAA2_IO_H
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@ -109,6 +109,10 @@ int dpaa2_io_service_pull_channel(struct dpaa2_io *d, u32 channelid,
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int dpaa2_io_service_enqueue_fq(struct dpaa2_io *d, u32 fqid,
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const struct dpaa2_fd *fd);
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int dpaa2_io_service_enqueue_multiple_fq(struct dpaa2_io *d, u32 fqid,
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const struct dpaa2_fd *fd, int number_of_frame);
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int dpaa2_io_service_enqueue_multiple_desc_fq(struct dpaa2_io *d, u32 *fqid,
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const struct dpaa2_fd *fd, int number_of_frame);
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int dpaa2_io_service_enqueue_qd(struct dpaa2_io *d, u32 qdid, u8 prio,
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u16 qdbin, const struct dpaa2_fd *fd);
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int dpaa2_io_service_release(struct dpaa2_io *d, u16 bpid,
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