spi/rspi: add dmaengine support
This patch adds dmaengine supporting using sh_dma driver. The module receives data by DMAC, it also needs TX DMAC to generate SPI's clocks. Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
This commit is contained in:
parent
d195f7bebc
commit
a3633fe7aa
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@ -31,7 +31,11 @@
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#include <linux/platform_device.h>
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#include <linux/io.h>
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#include <linux/clk.h>
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#include <linux/dmaengine.h>
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#include <linux/dma-mapping.h>
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#include <linux/sh_dma.h>
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#include <linux/spi/spi.h>
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#include <linux/spi/rspi.h>
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#define RSPI_SPCR 0x00
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#define RSPI_SSLP 0x01
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@ -141,6 +145,16 @@ struct rspi_data {
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spinlock_t lock;
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struct clk *clk;
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unsigned char spsr;
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/* for dmaengine */
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struct sh_dmae_slave dma_tx;
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struct sh_dmae_slave dma_rx;
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struct dma_chan *chan_tx;
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struct dma_chan *chan_rx;
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int irq;
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unsigned dma_width_16bit:1;
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unsigned dma_callbacked:1;
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};
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static void rspi_write8(struct rspi_data *rspi, u8 data, u16 offset)
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@ -265,11 +279,125 @@ static int rspi_send_pio(struct rspi_data *rspi, struct spi_message *mesg,
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return 0;
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}
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static int rspi_receive_pio(struct rspi_data *rspi, struct spi_message *mesg,
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struct spi_transfer *t)
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static void rspi_dma_complete(void *arg)
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{
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struct rspi_data *rspi = arg;
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rspi->dma_callbacked = 1;
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wake_up_interruptible(&rspi->wait);
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}
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static int rspi_dma_map_sg(struct scatterlist *sg, void *buf, unsigned len,
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struct dma_chan *chan,
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enum dma_transfer_direction dir)
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{
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sg_init_table(sg, 1);
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sg_set_buf(sg, buf, len);
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sg_dma_len(sg) = len;
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return dma_map_sg(chan->device->dev, sg, 1, dir);
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}
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static void rspi_dma_unmap_sg(struct scatterlist *sg, struct dma_chan *chan,
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enum dma_transfer_direction dir)
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{
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dma_unmap_sg(chan->device->dev, sg, 1, dir);
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}
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static void rspi_memory_to_8bit(void *buf, const void *data, unsigned len)
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{
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u16 *dst = buf;
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const u8 *src = data;
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while (len) {
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*dst++ = (u16)(*src++);
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len--;
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}
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}
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static void rspi_memory_from_8bit(void *buf, const void *data, unsigned len)
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{
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u8 *dst = buf;
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const u16 *src = data;
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while (len) {
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*dst++ = (u8)*src++;
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len--;
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}
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}
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static int rspi_send_dma(struct rspi_data *rspi, struct spi_transfer *t)
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{
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struct scatterlist sg;
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void *buf = NULL;
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struct dma_async_tx_descriptor *desc;
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unsigned len;
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int ret = 0;
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if (rspi->dma_width_16bit) {
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/*
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* If DMAC bus width is 16-bit, the driver allocates a dummy
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* buffer. And, the driver converts original data into the
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* DMAC data as the following format:
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* original data: 1st byte, 2nd byte ...
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* DMAC data: 1st byte, dummy, 2nd byte, dummy ...
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*/
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len = t->len * 2;
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buf = kmalloc(len, GFP_KERNEL);
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if (!buf)
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return -ENOMEM;
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rspi_memory_to_8bit(buf, t->tx_buf, t->len);
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} else {
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len = t->len;
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buf = (void *)t->tx_buf;
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}
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if (!rspi_dma_map_sg(&sg, buf, len, rspi->chan_tx, DMA_TO_DEVICE)) {
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ret = -EFAULT;
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goto end_nomap;
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}
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desc = dmaengine_prep_slave_sg(rspi->chan_tx, &sg, 1, DMA_TO_DEVICE,
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DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
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if (!desc) {
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ret = -EIO;
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goto end;
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}
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/*
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* DMAC needs SPTIE, but if SPTIE is set, this IRQ routine will be
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* called. So, this driver disables the IRQ while DMA transfer.
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*/
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disable_irq(rspi->irq);
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rspi_write8(rspi, rspi_read8(rspi, RSPI_SPCR) | SPCR_TXMD, RSPI_SPCR);
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rspi_enable_irq(rspi, SPCR_SPTIE);
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rspi->dma_callbacked = 0;
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desc->callback = rspi_dma_complete;
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desc->callback_param = rspi;
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dmaengine_submit(desc);
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dma_async_issue_pending(rspi->chan_tx);
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ret = wait_event_interruptible_timeout(rspi->wait,
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rspi->dma_callbacked, HZ);
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if (ret > 0 && rspi->dma_callbacked)
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ret = 0;
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else if (!ret)
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ret = -ETIMEDOUT;
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rspi_disable_irq(rspi, SPCR_SPTIE);
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enable_irq(rspi->irq);
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end:
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rspi_dma_unmap_sg(&sg, rspi->chan_tx, DMA_TO_DEVICE);
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end_nomap:
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if (rspi->dma_width_16bit)
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kfree(buf);
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return ret;
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}
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static void rspi_receive_init(struct rspi_data *rspi)
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{
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int remain = t->len;
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u8 *data;
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unsigned char spsr;
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spsr = rspi_read8(rspi, RSPI_SPSR);
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@ -278,6 +406,15 @@ static int rspi_receive_pio(struct rspi_data *rspi, struct spi_message *mesg,
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if (spsr & SPSR_OVRF)
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rspi_write8(rspi, rspi_read8(rspi, RSPI_SPSR) & ~SPSR_OVRF,
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RSPI_SPCR);
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}
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static int rspi_receive_pio(struct rspi_data *rspi, struct spi_message *mesg,
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struct spi_transfer *t)
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{
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int remain = t->len;
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u8 *data;
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rspi_receive_init(rspi);
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data = (u8 *)t->rx_buf;
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while (remain > 0) {
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@ -307,6 +444,120 @@ static int rspi_receive_pio(struct rspi_data *rspi, struct spi_message *mesg,
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return 0;
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}
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static int rspi_receive_dma(struct rspi_data *rspi, struct spi_transfer *t)
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{
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struct scatterlist sg, sg_dummy;
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void *dummy = NULL, *rx_buf = NULL;
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struct dma_async_tx_descriptor *desc, *desc_dummy;
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unsigned len;
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int ret = 0;
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if (rspi->dma_width_16bit) {
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/*
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* If DMAC bus width is 16-bit, the driver allocates a dummy
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* buffer. And, finally the driver converts the DMAC data into
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* actual data as the following format:
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* DMAC data: 1st byte, dummy, 2nd byte, dummy ...
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* actual data: 1st byte, 2nd byte ...
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*/
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len = t->len * 2;
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rx_buf = kmalloc(len, GFP_KERNEL);
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if (!rx_buf)
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return -ENOMEM;
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} else {
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len = t->len;
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rx_buf = t->rx_buf;
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}
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/* prepare dummy transfer to generate SPI clocks */
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dummy = kzalloc(len, GFP_KERNEL);
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if (!dummy) {
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ret = -ENOMEM;
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goto end_nomap;
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}
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if (!rspi_dma_map_sg(&sg_dummy, dummy, len, rspi->chan_tx,
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DMA_TO_DEVICE)) {
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ret = -EFAULT;
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goto end_nomap;
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}
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desc_dummy = dmaengine_prep_slave_sg(rspi->chan_tx, &sg_dummy, 1,
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DMA_TO_DEVICE, DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
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if (!desc_dummy) {
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ret = -EIO;
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goto end_dummy_mapped;
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}
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/* prepare receive transfer */
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if (!rspi_dma_map_sg(&sg, rx_buf, len, rspi->chan_rx,
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DMA_FROM_DEVICE)) {
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ret = -EFAULT;
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goto end_dummy_mapped;
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}
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desc = dmaengine_prep_slave_sg(rspi->chan_rx, &sg, 1, DMA_FROM_DEVICE,
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DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
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if (!desc) {
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ret = -EIO;
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goto end;
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}
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rspi_receive_init(rspi);
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/*
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* DMAC needs SPTIE, but if SPTIE is set, this IRQ routine will be
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* called. So, this driver disables the IRQ while DMA transfer.
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*/
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disable_irq(rspi->irq);
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rspi_write8(rspi, rspi_read8(rspi, RSPI_SPCR) & ~SPCR_TXMD, RSPI_SPCR);
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rspi_enable_irq(rspi, SPCR_SPTIE | SPCR_SPRIE);
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rspi->dma_callbacked = 0;
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desc->callback = rspi_dma_complete;
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desc->callback_param = rspi;
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dmaengine_submit(desc);
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dma_async_issue_pending(rspi->chan_rx);
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desc_dummy->callback = NULL; /* No callback */
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dmaengine_submit(desc_dummy);
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dma_async_issue_pending(rspi->chan_tx);
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ret = wait_event_interruptible_timeout(rspi->wait,
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rspi->dma_callbacked, HZ);
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if (ret > 0 && rspi->dma_callbacked)
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ret = 0;
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else if (!ret)
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ret = -ETIMEDOUT;
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rspi_disable_irq(rspi, SPCR_SPTIE | SPCR_SPRIE);
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enable_irq(rspi->irq);
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end:
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rspi_dma_unmap_sg(&sg, rspi->chan_rx, DMA_FROM_DEVICE);
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end_dummy_mapped:
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rspi_dma_unmap_sg(&sg_dummy, rspi->chan_tx, DMA_TO_DEVICE);
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end_nomap:
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if (rspi->dma_width_16bit) {
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if (!ret)
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rspi_memory_from_8bit(t->rx_buf, rx_buf, t->len);
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kfree(rx_buf);
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}
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kfree(dummy);
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return ret;
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}
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static int rspi_is_dma(struct rspi_data *rspi, struct spi_transfer *t)
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{
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if (t->tx_buf && rspi->chan_tx)
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return 1;
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/* If the module receives data by DMAC, it also needs TX DMAC */
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if (t->rx_buf && rspi->chan_tx && rspi->chan_rx)
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return 1;
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return 0;
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}
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static void rspi_work(struct work_struct *work)
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{
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struct rspi_data *rspi = container_of(work, struct rspi_data, ws);
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list_for_each_entry(t, &mesg->transfers, transfer_list) {
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if (t->tx_buf) {
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ret = rspi_send_pio(rspi, mesg, t);
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if (rspi_is_dma(rspi, t))
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ret = rspi_send_dma(rspi, t);
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else
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ret = rspi_send_pio(rspi, mesg, t);
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if (ret < 0)
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goto error;
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}
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if (t->rx_buf) {
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ret = rspi_receive_pio(rspi, mesg, t);
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if (rspi_is_dma(rspi, t))
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ret = rspi_receive_dma(rspi, t);
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else
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ret = rspi_receive_pio(rspi, mesg, t);
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if (ret < 0)
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goto error;
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}
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@ -406,11 +663,58 @@ static irqreturn_t rspi_irq(int irq, void *_sr)
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return ret;
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}
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static bool rspi_filter(struct dma_chan *chan, void *filter_param)
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{
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chan->private = filter_param;
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return true;
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}
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static void __devinit rspi_request_dma(struct rspi_data *rspi,
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struct platform_device *pdev)
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{
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struct rspi_plat_data *rspi_pd = pdev->dev.platform_data;
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dma_cap_mask_t mask;
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if (!rspi_pd)
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return;
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rspi->dma_width_16bit = rspi_pd->dma_width_16bit;
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/* If the module receives data by DMAC, it also needs TX DMAC */
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if (rspi_pd->dma_rx_id && rspi_pd->dma_tx_id) {
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dma_cap_zero(mask);
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dma_cap_set(DMA_SLAVE, mask);
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rspi->dma_rx.slave_id = rspi_pd->dma_rx_id;
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rspi->chan_rx = dma_request_channel(mask, rspi_filter,
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&rspi->dma_rx);
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if (rspi->chan_rx)
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dev_info(&pdev->dev, "Use DMA when rx.\n");
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}
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if (rspi_pd->dma_tx_id) {
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dma_cap_zero(mask);
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dma_cap_set(DMA_SLAVE, mask);
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rspi->dma_tx.slave_id = rspi_pd->dma_tx_id;
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rspi->chan_tx = dma_request_channel(mask, rspi_filter,
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&rspi->dma_tx);
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if (rspi->chan_tx)
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dev_info(&pdev->dev, "Use DMA when tx\n");
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}
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}
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static void __devexit rspi_release_dma(struct rspi_data *rspi)
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{
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if (rspi->chan_tx)
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dma_release_channel(rspi->chan_tx);
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if (rspi->chan_rx)
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dma_release_channel(rspi->chan_rx);
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}
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static int __devexit rspi_remove(struct platform_device *pdev)
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{
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struct rspi_data *rspi = dev_get_drvdata(&pdev->dev);
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spi_unregister_master(rspi->master);
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rspi_release_dma(rspi);
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free_irq(platform_get_irq(pdev, 0), rspi);
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clk_put(rspi->clk);
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iounmap(rspi->addr);
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@ -483,6 +787,9 @@ static int __devinit rspi_probe(struct platform_device *pdev)
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goto error3;
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}
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rspi->irq = irq;
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rspi_request_dma(rspi, pdev);
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ret = spi_register_master(master);
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if (ret < 0) {
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dev_err(&pdev->dev, "spi_register_master error.\n");
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@ -494,6 +801,7 @@ static int __devinit rspi_probe(struct platform_device *pdev)
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return 0;
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error4:
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rspi_release_dma(rspi);
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free_irq(irq, rspi);
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error3:
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clk_put(rspi->clk);
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31
include/linux/spi/rspi.h
Normal file
31
include/linux/spi/rspi.h
Normal file
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@ -0,0 +1,31 @@
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/*
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* Renesas SPI driver
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*
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* Copyright (C) 2012 Renesas Solutions Corp.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*
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*/
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#ifndef __LINUX_SPI_RENESAS_SPI_H__
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#define __LINUX_SPI_RENESAS_SPI_H__
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struct rspi_plat_data {
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unsigned int dma_tx_id;
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unsigned int dma_rx_id;
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unsigned dma_width_16bit:1; /* DMAC read/write width = 16-bit */
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};
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#endif
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