V4L/DVB (11804): xc5000: poll at 5ms interval for register write command completion
Instead of polling at 100ms intervals for register writes, poll at 5ms intervals. This is consistent with the xc5000 specification, and improves tuning time by up to 500 ms on devices that such as the au0828 which do not properly implement i2c clock stretching (since the five register writes that occur for a tuning request often do not complete immediately but do complete far before 100ms has gone by). The net amount of time we wait before timing out is unchanged (500ms). Signed-off-by: Devin Heitmueller <dheitmueller@kernellabs.com> Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
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@ -262,7 +262,7 @@ static int xc5000_TunerReset(struct dvb_frontend *fe)
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static int xc_write_reg(struct xc5000_priv *priv, u16 regAddr, u16 i2cData)
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{
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u8 buf[4];
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int WatchDogTimer = 5;
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int WatchDogTimer = 100;
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int result;
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buf[0] = (regAddr >> 8) & 0xFF;
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@ -284,7 +284,7 @@ static int xc_write_reg(struct xc5000_priv *priv, u16 regAddr, u16 i2cData)
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/* busy flag cleared */
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break;
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} else {
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xc_wait(100); /* wait 5 ms */
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xc_wait(5); /* wait 5 ms */
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WatchDogTimer--;
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}
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}
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