watchdog: it8712f_wdt: Add module parameter for alternative reset sources
On iEi PCISA-9652-R10 (BIOS version 1.5) single board computer reads from the game port do not seem to reset the watchdog timer. This patch adds a module parameter wdt_config_reg to specify alternative reset sources. At least WDT_RESET_KBD has been tested, even just running while true; do setleds -L +scroll sleep 1 setleds -L -scroll sleep 1 done is enough to keep the watchdog happy. Signed-off-by: Timo Juhani Lindfors <timo.lindfors@iki.fi> Signed-off-by: Wim Van Sebroeck <wim@iguana.be>
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@ -85,6 +85,14 @@ static unsigned short address;
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#define WDT_OUT_PWROK 0x10 /* Pulse PWROK on timeout */
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#define WDT_OUT_KRST 0x40 /* Pulse reset on timeout */
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static int wdt_control_reg = WDT_RESET_GAME;
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module_param(wdt_control_reg, int, 0);
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MODULE_PARM_DESC(wdt_control_reg, "Value to write to watchdog control "
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"register. The default WDT_RESET_GAME resets the timer on "
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"game port reads that this driver generates. You can also "
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"use KBD, MOUSE or CIR if you have some external way to "
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"generate those interrupts.");
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static int superio_inb(int reg)
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{
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outb(reg, REG);
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@ -131,7 +139,8 @@ static inline void superio_exit(void)
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static inline void it8712f_wdt_ping(void)
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{
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inb(address);
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if (wdt_control_reg & WDT_RESET_GAME)
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inb(address);
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}
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static void it8712f_wdt_update_margin(void)
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@ -170,7 +179,7 @@ static void it8712f_wdt_enable(void)
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superio_enter();
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superio_select(LDN_GPIO);
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superio_outb(WDT_RESET_GAME, WDT_CONTROL);
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superio_outb(wdt_control_reg, WDT_CONTROL);
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it8712f_wdt_update_margin();
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