microblaze: Use asm-generic/io.h
Using generic io.h will narrow down code duplication in architecture io.h. - define PCI_IOBASE - remove non existing pci_io_base extern Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This commit is contained in:
Michal Simek
parent
c24cf712ac
commit
a66a626538
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@ -15,7 +15,6 @@
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#include <asm/page.h>
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#include <linux/types.h>
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#include <linux/mm.h> /* Get struct page {...} */
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#include <asm-generic/iomap.h>
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#ifndef CONFIG_PCI
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#define _IO_BASE 0
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@ -25,211 +24,32 @@
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#define _IO_BASE isa_io_base
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#define _ISA_MEM_BASE isa_mem_base
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#define PCI_DRAM_OFFSET pci_dram_offset
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#endif
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struct pci_dev;
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extern void pci_iounmap(struct pci_dev *dev, void __iomem *);
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#define pci_iounmap pci_iounmap
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extern unsigned long isa_io_base;
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extern unsigned long pci_io_base;
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extern unsigned long pci_dram_offset;
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extern resource_size_t isa_mem_base;
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#endif
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#define PCI_IOBASE ((void __iomem *)_IO_BASE)
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#define IO_SPACE_LIMIT (0xFFFFFFFF)
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/* the following is needed to support PCI with some drivers */
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#define mmiowb()
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static inline unsigned char __raw_readb(const volatile void __iomem *addr)
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{
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return *(volatile unsigned char __force *)addr;
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}
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static inline unsigned short __raw_readw(const volatile void __iomem *addr)
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{
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return *(volatile unsigned short __force *)addr;
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}
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static inline unsigned int __raw_readl(const volatile void __iomem *addr)
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{
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return *(volatile unsigned int __force *)addr;
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}
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static inline unsigned long __raw_readq(const volatile void __iomem *addr)
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{
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return *(volatile unsigned long __force *)addr;
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}
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static inline void __raw_writeb(unsigned char v, volatile void __iomem *addr)
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{
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*(volatile unsigned char __force *)addr = v;
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}
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static inline void __raw_writew(unsigned short v, volatile void __iomem *addr)
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{
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*(volatile unsigned short __force *)addr = v;
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}
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static inline void __raw_writel(unsigned int v, volatile void __iomem *addr)
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{
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*(volatile unsigned int __force *)addr = v;
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}
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static inline void __raw_writeq(unsigned long v, volatile void __iomem *addr)
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{
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*(volatile unsigned long __force *)addr = v;
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}
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/*
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* read (readb, readw, readl, readq) and write (writeb, writew,
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* writel, writeq) accessors are for PCI and thus little endian.
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* Linux 2.4 for Microblaze had this wrong.
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*/
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static inline unsigned char readb(const volatile void __iomem *addr)
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{
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return *(volatile unsigned char __force *)addr;
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}
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static inline unsigned short readw(const volatile void __iomem *addr)
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{
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return le16_to_cpu(*(volatile unsigned short __force *)addr);
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}
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static inline unsigned int readl(const volatile void __iomem *addr)
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{
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return le32_to_cpu(*(volatile unsigned int __force *)addr);
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}
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#define readq readq
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static inline u64 readq(const volatile void __iomem *addr)
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{
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return le64_to_cpu(__raw_readq(addr));
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}
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static inline void writeb(unsigned char v, volatile void __iomem *addr)
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{
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*(volatile unsigned char __force *)addr = v;
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}
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static inline void writew(unsigned short v, volatile void __iomem *addr)
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{
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*(volatile unsigned short __force *)addr = cpu_to_le16(v);
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}
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static inline void writel(unsigned int v, volatile void __iomem *addr)
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{
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*(volatile unsigned int __force *)addr = cpu_to_le32(v);
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}
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#define writeq(b, addr) __raw_writeq(cpu_to_le64(b), addr)
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/* ioread and iowrite variants. thease are for now same as __raw_
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* variants of accessors. we might check for endianess in the feature
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*/
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#define ioread8(addr) __raw_readb((u8 *)(addr))
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#define ioread16(addr) __raw_readw((u16 *)(addr))
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#define ioread32(addr) __raw_readl((u32 *)(addr))
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#define iowrite8(v, addr) __raw_writeb((u8)(v), (u8 *)(addr))
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#define iowrite16(v, addr) __raw_writew((u16)(v), (u16 *)(addr))
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#define iowrite32(v, addr) __raw_writel((u32)(v), (u32 *)(addr))
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#define ioread16be(addr) __raw_readw((u16 *)(addr))
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#define ioread32be(addr) __raw_readl((u32 *)(addr))
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#define iowrite16be(v, addr) __raw_writew((u16)(v), (u16 *)(addr))
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#define iowrite32be(v, addr) __raw_writel((u32)(v), (u32 *)(addr))
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/* These are the definitions for the x86 IO instructions
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* inb/inw/inl/outb/outw/outl, the "string" versions
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* insb/insw/insl/outsb/outsw/outsl, and the "pausing" versions
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* inb_p/inw_p/...
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* The macros don't do byte-swapping.
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*/
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#define inb(port) readb((u8 *)((unsigned long)(port)))
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#define outb(val, port) writeb((val), (u8 *)((unsigned long)(port)))
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#define inw(port) readw((u16 *)((unsigned long)(port)))
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#define outw(val, port) writew((val), (u16 *)((unsigned long)(port)))
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#define inl(port) readl((u32 *)((unsigned long)(port)))
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#define outl(val, port) writel((val), (u32 *)((unsigned long)(port)))
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#define inb_p(port) inb((port))
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#define outb_p(val, port) outb((val), (port))
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#define inw_p(port) inw((port))
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#define outw_p(val, port) outw((val), (port))
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#define inl_p(port) inl((port))
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#define outl_p(val, port) outl((val), (port))
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#define memset_io(a, b, c) memset((void *)(a), (b), (c))
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#define memcpy_fromio(a, b, c) memcpy((a), (void *)(b), (c))
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#define memcpy_toio(a, b, c) memcpy((void *)(a), (b), (c))
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#ifdef CONFIG_MMU
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#define phys_to_virt(addr) ((void *)__phys_to_virt(addr))
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#define virt_to_phys(addr) ((unsigned long)__virt_to_phys(addr))
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#define virt_to_bus(addr) ((unsigned long)__virt_to_phys(addr))
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#define page_to_bus(page) (page_to_phys(page))
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#define bus_to_virt(addr) (phys_to_virt(addr))
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extern void iounmap(void __iomem *addr);
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/*extern void *__ioremap(phys_addr_t address, unsigned long size,
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unsigned long flags);*/
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extern void __iomem *ioremap(phys_addr_t address, unsigned long size);
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#define ioremap_writethrough(addr, size) ioremap((addr), (size))
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#define ioremap_nocache(addr, size) ioremap((addr), (size))
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#define ioremap_fullcache(addr, size) ioremap((addr), (size))
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#else /* CONFIG_MMU */
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/**
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* virt_to_phys - map virtual addresses to physical
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* @address: address to remap
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*
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* The returned physical address is the physical (CPU) mapping for
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* the memory address given. It is only valid to use this function on
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* addresses directly mapped or allocated via kmalloc.
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*
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* This function does not give bus mappings for DMA transfers. In
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* almost all conceivable cases a device driver should not be using
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* this function
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*/
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static inline unsigned long __iomem virt_to_phys(volatile void *address)
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{
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return __pa((unsigned long)address);
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}
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#define virt_to_bus virt_to_phys
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/**
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* phys_to_virt - map physical address to virtual
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* @address: address to remap
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*
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* The returned virtual address is a current CPU mapping for
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* the memory address given. It is only valid to use this function on
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* addresses that have a kernel mapping
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*
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* This function does not handle bus mappings for DMA transfers. In
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* almost all conceivable cases a device driver should not be using
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* this function
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*/
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static inline void *phys_to_virt(unsigned long address)
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{
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return (void *)__va(address);
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}
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#define bus_to_virt(a) phys_to_virt(a)
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static inline void __iomem *__ioremap(phys_addr_t address, unsigned long size,
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unsigned long flags)
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{
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return (void *)address;
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}
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#define ioremap(physaddr, size) ((void __iomem *)(unsigned long)(physaddr))
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#define iounmap(addr) ((void)0)
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#define ioremap_nocache(physaddr, size) ioremap(physaddr, size)
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#define ioremap_writethrough(addr, size) ioremap((addr), (size))
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#define ioremap_nocache(addr, size) ioremap((addr), (size))
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#define ioremap_fullcache(addr, size) ioremap((addr), (size))
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#define ioremap_wc(addr, size) ioremap((addr), (size))
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#endif /* CONFIG_MMU */
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/*
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* Convert a physical pointer to a virtual kernel pointer for /dev/mem
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* access
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*/
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#define xlate_dev_mem_ptr(p) __va(p)
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/*
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* Convert a virtual cached pointer to an uncached pointer
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*/
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#define xlate_dev_kmem_ptr(p) p
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/*
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* Big Endian
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*/
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/* Big Endian */
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#define out_be32(a, v) __raw_writel((v), (void __iomem __force *)(a))
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#define out_be16(a, v) __raw_writew((v), (a))
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@ -239,10 +59,7 @@ static inline void __iomem *__ioremap(phys_addr_t address, unsigned long size,
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#define writel_be(v, a) out_be32((__force unsigned *)a, v)
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#define readl_be(a) in_be32((__force unsigned *)a)
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/*
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* Little endian
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*/
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/* Little endian */
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#define out_le32(a, v) __raw_writel(__cpu_to_le32(v), (a))
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#define out_le16(a, v) __raw_writew(__cpu_to_le16(v), (a))
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@ -253,100 +70,7 @@ static inline void __iomem *__ioremap(phys_addr_t address, unsigned long size,
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#define out_8(a, v) __raw_writeb((v), (a))
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#define in_8(a) __raw_readb(a)
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#define mmiowb()
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#define ioport_map(port, nr) ((void __iomem *)(port))
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#define ioport_unmap(addr)
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/* from asm-generic/io.h */
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#ifndef insb
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static inline void insb(unsigned long addr, void *buffer, int count)
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{
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if (count) {
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u8 *buf = buffer;
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do {
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u8 x = inb(addr);
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*buf++ = x;
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} while (--count);
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}
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}
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#endif
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#ifndef insw
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static inline void insw(unsigned long addr, void *buffer, int count)
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{
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if (count) {
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u16 *buf = buffer;
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do {
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u16 x = inw(addr);
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*buf++ = x;
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} while (--count);
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}
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}
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#endif
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#ifndef insl
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static inline void insl(unsigned long addr, void *buffer, int count)
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{
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if (count) {
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u32 *buf = buffer;
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do {
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u32 x = inl(addr);
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*buf++ = x;
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} while (--count);
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}
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}
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#endif
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#ifndef outsb
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static inline void outsb(unsigned long addr, const void *buffer, int count)
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{
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if (count) {
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const u8 *buf = buffer;
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do {
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outb(*buf++, addr);
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} while (--count);
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}
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}
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#endif
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#ifndef outsw
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static inline void outsw(unsigned long addr, const void *buffer, int count)
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{
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if (count) {
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const u16 *buf = buffer;
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do {
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outw(*buf++, addr);
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} while (--count);
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}
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}
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#endif
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#ifndef outsl
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static inline void outsl(unsigned long addr, const void *buffer, int count)
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{
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if (count) {
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const u32 *buf = buffer;
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do {
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outl(*buf++, addr);
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} while (--count);
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}
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}
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#endif
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#define ioread8_rep(p, dst, count) \
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insb((unsigned long) (p), (dst), (count))
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#define ioread16_rep(p, dst, count) \
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insw((unsigned long) (p), (dst), (count))
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#define ioread32_rep(p, dst, count) \
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insl((unsigned long) (p), (dst), (count))
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#define iowrite8_rep(p, src, count) \
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outsb((unsigned long) (p), (src), (count))
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#define iowrite16_rep(p, src, count) \
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outsw((unsigned long) (p), (src), (count))
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#define iowrite32_rep(p, src, count) \
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outsl((unsigned long) (p), (src), (count))
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#include <asm-generic/io.h>
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#define readb_relaxed readb
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#define readw_relaxed readw
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@ -216,7 +216,7 @@ static int setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t *info,
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/* MS: I need add offset in page */
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address += ((unsigned long)frame->tramp) & ~PAGE_MASK;
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/* MS address is virtual */
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address = virt_to_phys(address);
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address = __virt_to_phys(address);
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invalidate_icache_range(address, address + 8);
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flush_dcache_range(address, address + 8);
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}
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@ -117,7 +117,7 @@ void *consistent_alloc(gfp_t gfp, size_t size, dma_addr_t *dma_handle)
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ret = (void *)va;
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/* This gives us the real physical address of the first page. */
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*dma_handle = pa = virt_to_bus((void *)vaddr);
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*dma_handle = pa = __virt_to_phys(vaddr);
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#endif
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/*
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@ -369,7 +369,7 @@ asmlinkage void __init mmu_init(void)
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if (initrd_start) {
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unsigned long size;
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size = initrd_end - initrd_start;
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memblock_reserve(virt_to_phys(initrd_start), size);
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memblock_reserve(__virt_to_phys(initrd_start), size);
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}
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#endif /* CONFIG_BLK_DEV_INITRD */
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@ -69,10 +69,11 @@ static void __iomem *__ioremap(phys_addr_t addr, unsigned long size,
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*
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* However, allow remap of rootfs: TBD
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*/
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if (mem_init_done &&
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p >= memory_start && p < virt_to_phys(high_memory) &&
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!(p >= virt_to_phys((unsigned long)&__bss_stop) &&
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p < virt_to_phys((unsigned long)__bss_stop))) {
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!(p >= __virt_to_phys((phys_addr_t)__bss_stop) &&
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p < __virt_to_phys((phys_addr_t)__bss_stop))) {
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pr_warn("__ioremap(): phys addr "PTE_FMT" is RAM lr %pf\n",
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(unsigned long)p, __builtin_return_address(0));
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return NULL;
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