luck/tmp_suning_uos_patched
1
0
Fork 1
Code Issues Pull Requests Packages Projects Releases Wiki Activity

MIPS: asm: r4kcache: Add protected cache operation for EVA

Browse Source 
Signed-off-by: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com>
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
This commit is contained in:
Leonid Yegoshin 2013-12-16 11:38:00 +00:00 committed by Ralf Baechle
parent 41e62b0411
commit a805385499
1 changed files with 18 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

18
arch/mips/include/asm/r4kcache.h
View File

@ -212,6 +212,20 @@ static inline void flush_scache_line(unsigned long addr)
: \
: "i" (op), "r" (addr))
#define protected_cachee_op(op,addr) \
__asm__ __volatile__( \
" .set push \n" \
" .set noreorder \n" \
" .set mips0 \n" \
" .set eva \n" \
"1: cachee %0, (%1) \n" \
"2: .set pop \n" \
" .section __ex_table,\"a\" \n" \
" "STR(PTR)" 1b, 2b \n" \
" .previous" \
: \
: "i" (op), "r" (addr))
/*
* The next two are for badland addresses like signal trampolines.
*/
@ -223,7 +237,11 @@ static inline void protected_flush_icache_line(unsigned long addr)
break;
default:
#ifdef CONFIG_EVA
protected_cachee_op(Hit_Invalidate_I, addr);
#else
protected_cache_op(Hit_Invalidate_I, addr);
#endif
break;
}
}