[MIPS] SN: Rename SGI_SN0_N_MODE -> SGI_SN_N_MODE.
It's not SN0-specific. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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@ -63,7 +63,7 @@ CONFIG_SGI_IP27=y
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# CONFIG_TOSHIBA_JMR3927 is not set
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# CONFIG_TOSHIBA_RBTX4927 is not set
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# CONFIG_TOSHIBA_RBTX4938 is not set
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# CONFIG_SGI_SN0_N_MODE is not set
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# CONFIG_SGI_SN_N_MODE is not set
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CONFIG_ARCH_DISCONTIGMEM_ENABLE=y
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CONFIG_NUMA=y
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# CONFIG_MAPPED_KERNEL is not set
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@ -4,7 +4,7 @@
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# This options adds support for userspace processes upto 16TB size.
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# Normally the limit is just .5TB.
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config SGI_SN0_N_MODE
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config SGI_SN_N_MODE
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bool "IP27 N-Mode"
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depends on SGI_IP27
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help
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@ -228,7 +228,7 @@ void __init plat_setup(void)
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*/
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n_mode = LOCAL_HUB_L(NI_STATUS_REV_ID) & NSRI_MORENODES_MASK;
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printk("Machine is in %c mode.\n", n_mode ? 'N' : 'M');
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#ifdef CONFIG_SGI_SN0_N_MODE
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#ifdef CONFIG_SGI_SN_N_MODE
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if (!n_mode)
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panic("Kernel compiled for M mode.");
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#else
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@ -49,7 +49,7 @@
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* so for now we just use defines bracketed by an ifdef.
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*/
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#ifdef CONFIG_SGI_SN0_N_MODE
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#ifdef CONFIG_SGI_SN_N_MODE
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#define NODE_SIZE_BITS 31
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#define BWIN_SIZE_BITS 28
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@ -63,7 +63,7 @@
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#define BDDIR_UPPER_MASK (UINT64_CAST 0x7ffff << 10)
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#define BDECC_UPPER_MASK (UINT64_CAST 0x3ffffff << 3)
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#else /* !defined(CONFIG_SGI_SN0_N_MODE), assume that M-mode is desired */
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#else /* !defined(CONFIG_SGI_SN_N_MODE), assume that M-mode is desired */
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#define NODE_SIZE_BITS 32
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#define BWIN_SIZE_BITS 29
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@ -77,7 +77,7 @@
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#define BDDIR_UPPER_MASK (UINT64_CAST 0xfffff << 10)
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#define BDECC_UPPER_MASK (UINT64_CAST 0x7ffffff << 3)
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#endif /* !defined(CONFIG_SGI_SN0_N_MODE) */
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#endif /* !defined(CONFIG_SGI_SN_N_MODE) */
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#define NODE_ADDRSPACE_SIZE (UINT64_CAST 1 << NODE_SIZE_BITS)
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@ -57,9 +57,9 @@
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/*
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* Slot constants for SN0
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*/
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#ifdef CONFIG_SGI_SN0_N_MODE
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#ifdef CONFIG_SGI_SN_N_MODE
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#define MAX_MEM_SLOTS 16 /* max slots per node */
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#else /* !CONFIG_SGI_SN0_N_MODE, assume M_MODE */
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#else /* !CONFIG_SGI_SN_N_MODE, assume M_MODE */
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#define MAX_MEM_SLOTS 32 /* max slots per node */
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#endif /* defined(N_MODE) */
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@ -92,7 +92,7 @@
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#define MD_UREG1_14 0x2200f0 /* uController/UART 1 register */
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#define MD_UREG1_15 0x2200f8 /* uController/UART 1 register */
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#ifdef CONFIG_SGI_SN0_N_MODE
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#ifdef CONFIG_SGI_SN_N_MODE
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#define MD_MEM_BANKS 4 /* 4 banks of memory max in N mode */
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#else
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#define MD_MEM_BANKS 8 /* 8 banks of memory max in M mode */
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