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ASoC: rt5640: Remove the unused or incorrect setting of clock source

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The patch removes the unused or incorrect setting of clock source.

Signed-off-by: Oder Chiou <oder_chiou@realtek.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
This commit is contained in:
Oder Chiou 2014-03-28 20:28:27 +08:00 committed by Mark Brown
parent 218a3f9638
commit acf04e639b
2 changed files with 1 additions and 9 deletions
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8
sound/soc/codecs/rt5640.c
View File

@ -487,7 +487,7 @@ static int is_sys_clk_from_pll(struct snd_soc_dapm_widget *source,
val = snd_soc_read(source->codec, RT5640_GLB_CLK);
val &= RT5640_SCLK_SRC_MASK;
if (val == RT5640_SCLK_SRC_PLL1 || val == RT5640_SCLK_SRC_PLL1T)
if (val == RT5640_SCLK_SRC_PLL1)
return 1;
else
return 0;
@ -1694,12 +1694,6 @@ static int rt5640_set_dai_sysclk(struct snd_soc_dai *dai,
case RT5640_SCLK_S_PLL1:
reg_val |= RT5640_SCLK_SRC_PLL1;
break;
case RT5640_SCLK_S_PLL1_TK:
reg_val |= RT5640_SCLK_SRC_PLL1T;
break;
case RT5640_SCLK_S_RCCLK:
reg_val |= RT5640_SCLK_SRC_RCCLK;
break;
default:
dev_err(codec->dev, "Invalid clock id (%d)\n", clk_id);
return -EINVAL;

2
sound/soc/codecs/rt5640.h
View File

@ -976,8 +976,6 @@
#define RT5640_SCLK_SRC_SFT 14
#define RT5640_SCLK_SRC_MCLK (0x0 << 14)
#define RT5640_SCLK_SRC_PLL1 (0x1 << 14)
#define RT5640_SCLK_SRC_PLL1T (0x2 << 14)
#define RT5640_SCLK_SRC_RCCLK (0x3 << 14) /* 15MHz */
#define RT5640_PLL1_SRC_MASK (0x3 << 12)
#define RT5640_PLL1_SRC_SFT 12
#define RT5640_PLL1_SRC_MCLK (0x0 << 12)