dt-bindings: mfd: Convert Allwinner legacy PRCM bindings to schemas

The Allwinner SoCs have a legacy set of bindings (and a drivers to
support it in Linux) to support the PRCM unit found in most recent SoCs.

Now that we have the DT validation in place, let's split into separate file
and convert the device tree bindings for those controllers to schemas, and
mark them all as deprecated.

Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Signed-off-by: Rob Herring <robh@kernel.org>
This commit is contained in:
Maxime Ripard 2019-12-19 10:07:11 +01:00 committed by Rob Herring
parent f95cad74ac
commit af287ed02f
3 changed files with 419 additions and 59 deletions

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# SPDX-License-Identifier: GPL-2.0
%YAML 1.2
---
$id: http://devicetree.org/schemas/mfd/allwinner,sun6i-a31-prcm.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Allwinner A31 PRCM Device Tree Bindings
maintainers:
- Chen-Yu Tsai <wens@csie.org>
- Maxime Ripard <mripard@kernel.org>
deprecated: true
properties:
compatible:
const: allwinner,sun6i-a31-prcm
reg:
maxItems: 1
patternProperties:
"^.*_(clk|rst)$":
type: object
properties:
compatible:
enum:
- allwinner,sun4i-a10-mod0-clk
- allwinner,sun6i-a31-apb0-clk
- allwinner,sun6i-a31-apb0-gates-clk
- allwinner,sun6i-a31-ar100-clk
- allwinner,sun6i-a31-clock-reset
- fixed-factor-clock
allOf:
- if:
properties:
compatible:
contains:
const: allwinner,sun6i-a31-apb0-clk
then:
properties:
"#clock-cells":
const: 0
# Already checked in the main schema
compatible: true
clocks:
maxItems: 1
clock-output-names:
maxItems: 1
phandle: true
required:
- "#clock-cells"
- compatible
- clocks
- clock-output-names
additionalProperties: false
- if:
properties:
compatible:
contains:
const: allwinner,sun6i-a31-apb0-gates-clk
then:
properties:
"#clock-cells":
const: 1
description: >
This additional argument passed to that clock is the
offset of the bit controlling this particular gate in
the register.
# Already checked in the main schema
compatible: true
clocks:
maxItems: 1
clock-output-names:
minItems: 1
maxItems: 32
phandle: true
required:
- "#clock-cells"
- compatible
- clocks
- clock-output-names
additionalProperties: false
- if:
properties:
compatible:
contains:
const: allwinner,sun6i-a31-ar100-clk
then:
properties:
"#clock-cells":
const: 0
# Already checked in the main schema
compatible: true
clocks:
maxItems: 4
description: >
The parent order must match the hardware programming
order.
clock-output-names:
maxItems: 1
phandle: true
required:
- "#clock-cells"
- compatible
- clocks
- clock-output-names
additionalProperties: false
- if:
properties:
compatible:
contains:
const: allwinner,sun6i-a31-clock-reset
then:
properties:
"#reset-cells":
const: 1
# Already checked in the main schema
compatible: true
phandle: true
required:
- "#reset-cells"
- compatible
additionalProperties: false
required:
- compatible
- reg
additionalProperties: false
examples:
- |
#include <dt-bindings/clock/sun6i-a31-ccu.h>
prcm@1f01400 {
compatible = "allwinner,sun6i-a31-prcm";
reg = <0x01f01400 0x200>;
ar100: ar100_clk {
compatible = "allwinner,sun6i-a31-ar100-clk";
#clock-cells = <0>;
clocks = <&rtc 0>, <&osc24M>,
<&ccu CLK_PLL_PERIPH>,
<&ccu CLK_PLL_PERIPH>;
clock-output-names = "ar100";
};
ahb0: ahb0_clk {
compatible = "fixed-factor-clock";
#clock-cells = <0>;
clock-div = <1>;
clock-mult = <1>;
clocks = <&ar100>;
clock-output-names = "ahb0";
};
apb0: apb0_clk {
compatible = "allwinner,sun6i-a31-apb0-clk";
#clock-cells = <0>;
clocks = <&ahb0>;
clock-output-names = "apb0";
};
apb0_gates: apb0_gates_clk {
compatible = "allwinner,sun6i-a31-apb0-gates-clk";
#clock-cells = <1>;
clocks = <&apb0>;
clock-output-names = "apb0_pio", "apb0_ir",
"apb0_timer", "apb0_p2wi",
"apb0_uart", "apb0_1wire",
"apb0_i2c";
};
ir_clk: ir_clk {
#clock-cells = <0>;
compatible = "allwinner,sun4i-a10-mod0-clk";
clocks = <&rtc 0>, <&osc24M>;
clock-output-names = "ir";
};
apb0_rst: apb0_rst {
compatible = "allwinner,sun6i-a31-clock-reset";
#reset-cells = <1>;
};
};
...

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# SPDX-License-Identifier: GPL-2.0+
%YAML 1.2
---
$id: http://devicetree.org/schemas/mfd/allwinner,sun8i-a23-prcm.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Allwinner A23 PRCM Device Tree Bindings
maintainers:
- Chen-Yu Tsai <wens@csie.org>
- Maxime Ripard <mripard@kernel.org>
deprecated: true
properties:
compatible:
const: allwinner,sun8i-a23-prcm
reg:
maxItems: 1
patternProperties:
"^.*(clk|rst|codec).*$":
type: object
properties:
compatible:
enum:
- fixed-factor-clock
- allwinner,sun8i-a23-apb0-clk
- allwinner,sun8i-a23-apb0-gates-clk
- allwinner,sun6i-a31-clock-reset
- allwinner,sun8i-a23-codec-analog
required:
- compatible
allOf:
- if:
properties:
compatible:
contains:
const: allwinner,sun8i-a23-apb0-clk
then:
properties:
"#clock-cells":
const: 0
# Already checked in the main schema
compatible: true
clocks:
maxItems: 1
clock-output-names:
maxItems: 1
phandle: true
required:
- "#clock-cells"
- compatible
- clocks
- clock-output-names
additionalProperties: false
- if:
properties:
compatible:
contains:
const: allwinner,sun8i-a23-apb0-gates-clk
then:
properties:
"#clock-cells":
const: 1
description: >
This additional argument passed to that clock is the
offset of the bit controlling this particular gate in
the register.
# Already checked in the main schema
compatible: true
clocks:
maxItems: 1
clock-output-names:
minItems: 1
maxItems: 32
phandle: true
required:
- "#clock-cells"
- compatible
- clocks
- clock-output-names
additionalProperties: false
- if:
properties:
compatible:
contains:
const: allwinner,sun6i-a31-clock-reset
then:
properties:
"#reset-cells":
const: 1
# Already checked in the main schema
compatible: true
phandle: true
required:
- "#reset-cells"
- compatible
additionalProperties: false
- if:
properties:
compatible:
contains:
const: allwinner,sun8i-a23-codec-analog
then:
properties:
# Already checked in the main schema
compatible: true
phandle: true
required:
- compatible
additionalProperties: false
required:
- compatible
- reg
additionalProperties: false
examples:
- |
prcm@1f01400 {
compatible = "allwinner,sun8i-a23-prcm";
reg = <0x01f01400 0x200>;
ar100: ar100_clk {
compatible = "fixed-factor-clock";
#clock-cells = <0>;
clock-div = <1>;
clock-mult = <1>;
clocks = <&osc24M>;
clock-output-names = "ar100";
};
ahb0: ahb0_clk {
compatible = "fixed-factor-clock";
#clock-cells = <0>;
clock-div = <1>;
clock-mult = <1>;
clocks = <&ar100>;
clock-output-names = "ahb0";
};
apb0: apb0_clk {
compatible = "allwinner,sun8i-a23-apb0-clk";
#clock-cells = <0>;
clocks = <&ahb0>;
clock-output-names = "apb0";
};
apb0_gates: apb0_gates_clk {
compatible = "allwinner,sun8i-a23-apb0-gates-clk";
#clock-cells = <1>;
clocks = <&apb0>;
clock-output-names = "apb0_pio", "apb0_timer",
"apb0_rsb", "apb0_uart",
"apb0_i2c";
};
apb0_rst: apb0_rst {
compatible = "allwinner,sun6i-a31-clock-reset";
#reset-cells = <1>;
};
codec_analog: codec-analog {
compatible = "allwinner,sun8i-a23-codec-analog";
};
};
...

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* Allwinner PRCM (Power/Reset/Clock Management) Multi-Functional Device
PRCM is an MFD device exposing several Power Management related devices
(like clks and reset controllers).
Required properties:
- compatible: "allwinner,sun6i-a31-prcm" or "allwinner,sun8i-a23-prcm"
- reg: The PRCM registers range
The prcm node may contain several subdevices definitions:
- see Documentation/devicetree/bindings/clock/sunxi.txt for clock devices
- see Documentation/devicetree/bindings/reset/allwinner,sunxi-clock-reset.txt for reset
controller devices
Example:
prcm: prcm@1f01400 {
compatible = "allwinner,sun6i-a31-prcm";
reg = <0x01f01400 0x200>;
/* Put subdevices here */
ar100: ar100_clk {
compatible = "allwinner,sun6i-a31-ar100-clk";
#clock-cells = <0>;
clocks = <&osc32k>, <&osc24M>, <&pll6>, <&pll6>;
};
ahb0: ahb0_clk {
compatible = "fixed-factor-clock";
#clock-cells = <0>;
clock-div = <1>;
clock-mult = <1>;
clocks = <&ar100_div>;
clock-output-names = "ahb0";
};
apb0: apb0_clk {
compatible = "allwinner,sun6i-a31-apb0-clk";
#clock-cells = <0>;
clocks = <&ahb0>;
clock-output-names = "apb0";
};
apb0_gates: apb0_gates_clk {
compatible = "allwinner,sun6i-a31-apb0-gates-clk";
#clock-cells = <1>;
clocks = <&apb0>;
clock-output-names = "apb0_pio", "apb0_ir",
"apb0_timer01", "apb0_p2wi",
"apb0_uart", "apb0_1wire",
"apb0_i2c";
};
apb0_rst: apb0_rst {
compatible = "allwinner,sun6i-a31-clock-reset";
#reset-cells = <1>;
};
};