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x86: delete the arch-specific dma-mapping headers.

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all the code that is left is ready to be merged as-is
in dma-mapping.h.

Signed-off-by: Glauber Costa <gcosta@redhat.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
This commit is contained in:
Glauber Costa 2008-03-25 18:36:39 -03:00 committed by Ingo Molnar
parent ae17a63b09
commit b7107a3d9d
3 changed files with 13 additions and 46 deletions
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19
include/asm-x86/dma-mapping.h
View File

@ -11,6 +11,9 @@
#include <asm/swiotlb.h>
extern dma_addr_t bad_dma_address;
extern int iommu_merge;
extern struct device fallback_dev;
extern int panic_on_overflow;
struct dma_mapping_ops {
int (*mapping_error)(dma_addr_t dma_addr);
@ -75,12 +78,6 @@ void dma_free_coherent(struct device *dev, size_t size,
extern int dma_supported(struct device *hwdev, u64 mask);
extern int dma_set_mask(struct device *dev, u64 mask);
#ifdef CONFIG_X86_32
# include "dma-mapping_32.h"
#else
# include "dma-mapping_64.h"
#endif
static inline dma_addr_t
dma_map_single(struct device *hwdev, void *ptr, size_t size,
int direction)
@ -205,6 +202,15 @@ dma_cache_sync(struct device *dev, void *vaddr, size_t size,
flush_write_buffers();
}
static inline int dma_get_cache_alignment(void)
{
/* no easy way to get cache size on all x86, so return the
* maximum possible, to be safe */
return boot_cpu_data.x86_clflush_size;
}
#define dma_is_consistent(d, h) (1)
#ifdef CONFIG_X86_32
# define ARCH_HAS_DMA_DECLARE_COHERENT_MEMORY
extern int
@ -217,5 +223,6 @@ dma_release_declared_memory(struct device *dev);
extern void *
dma_mark_declared_memory_occupied(struct device *dev,
dma_addr_t device_addr, size_t size);
extern int forbid_dac;
#endif /* CONFIG_X86_32 */
#endif

23
include/asm-x86/dma-mapping_32.h
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@ -1,23 +0,0 @@
#ifndef _ASM_I386_DMA_MAPPING_H
#define _ASM_I386_DMA_MAPPING_H
#include <linux/mm.h>
#include <linux/scatterlist.h>
#include <asm/cache.h>
#include <asm/io.h>
#include <asm/bug.h>
extern int forbid_dac;
static inline int
dma_get_cache_alignment(void)
{
/* no easy way to get cache size on all x86, so return the
* maximum possible, to be safe */
return boot_cpu_data.x86_clflush_size;
}
#define dma_is_consistent(d, h) (1)
#endif

17
include/asm-x86/dma-mapping_64.h
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@ -1,17 +0,0 @@
#ifndef _X8664_DMA_MAPPING_H
#define _X8664_DMA_MAPPING_H 1
extern int iommu_merge;
/* same for gart, swiotlb, and nommu */
static inline int dma_get_cache_alignment(void)
{
return boot_cpu_data.x86_clflush_size;
}
#define dma_is_consistent(d, h) 1
extern struct device fallback_dev;
extern int panic_on_overflow;
#endif /* _X8664_DMA_MAPPING_H */