pciehp: Fix command write
Current implementation of pciehp_write_cmd() always enables command completed interrupt. But pciehp_write_cmd() is also used for clearing command completed interrupt enable bit. In this case, we must not set the command completed interrupt enable bit. To fix this bug, this patch add the check to see if caller wants to change command complete interrupt enable bit. Signed-off-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com> Signed-off-by: Kristen Carlson Accardi <kristen.c.accardi@intel.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
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@ -301,7 +301,10 @@ static int pcie_write_cmd(struct controller *ctrl, u16 cmd, u16 mask)
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}
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slot_ctrl &= ~mask;
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slot_ctrl |= ((cmd & mask) | CMD_CMPL_INTR_ENABLE);
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slot_ctrl |= (cmd & mask);
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/* Don't enable command completed if caller is changing it. */
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if (!(mask & CMD_CMPL_INTR_ENABLE))
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slot_ctrl |= CMD_CMPL_INTR_ENABLE;
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ctrl->cmd_busy = 1;
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smp_mb();
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