net: aquantia: Enable coalescing management via ethtool interface
Aquantia NIC allows both TX and RX interrupt throttle rate (ITR) management, but this was used in a very limited way via predefined values. This patch allows to setup ITR default values via module command line arguments and via standard ethtool coalescing settings. Signed-off-by: Pavel Belous <pavel.belous@aquantia.com> Signed-off-by: Igor Russkikh <igor.russkikh@aquantia.com> Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
parent
6849540adc
commit
b82ee71a86
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@ -22,8 +22,12 @@
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#define AQ_CFG_FORCE_LEGACY_INT 0U
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#define AQ_CFG_IS_INTERRUPT_MODERATION_DEF 1U
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#define AQ_CFG_INTERRUPT_MODERATION_RATE_DEF 0xFFFFU
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#define AQ_CFG_INTERRUPT_MODERATION_OFF 0
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#define AQ_CFG_INTERRUPT_MODERATION_ON 1
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#define AQ_CFG_INTERRUPT_MODERATION_AUTO 0xFFFFU
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#define AQ_CFG_INTERRUPT_MODERATION_USEC_MAX (0x1FF * 2)
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#define AQ_CFG_IRQ_MASK 0x1FFU
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#define AQ_CFG_VECS_MAX 8U
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@ -221,6 +221,69 @@ static int aq_ethtool_get_rxnfc(struct net_device *ndev,
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return err;
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}
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int aq_ethtool_get_coalesce(struct net_device *ndev,
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struct ethtool_coalesce *coal)
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{
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struct aq_nic_s *aq_nic = netdev_priv(ndev);
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struct aq_nic_cfg_s *cfg = aq_nic_get_cfg(aq_nic);
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if (cfg->itr == AQ_CFG_INTERRUPT_MODERATION_ON ||
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cfg->itr == AQ_CFG_INTERRUPT_MODERATION_AUTO) {
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coal->rx_coalesce_usecs = cfg->rx_itr;
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coal->tx_coalesce_usecs = cfg->tx_itr;
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coal->rx_max_coalesced_frames = 0;
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coal->tx_max_coalesced_frames = 0;
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} else {
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coal->rx_coalesce_usecs = 0;
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coal->tx_coalesce_usecs = 0;
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coal->rx_max_coalesced_frames = 1;
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coal->tx_max_coalesced_frames = 1;
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}
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return 0;
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}
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int aq_ethtool_set_coalesce(struct net_device *ndev,
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struct ethtool_coalesce *coal)
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{
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struct aq_nic_s *aq_nic = netdev_priv(ndev);
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struct aq_nic_cfg_s *cfg = aq_nic_get_cfg(aq_nic);
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/* This is not yet supported
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*/
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if (coal->use_adaptive_rx_coalesce || coal->use_adaptive_tx_coalesce)
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return -EOPNOTSUPP;
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/* Atlantic only supports timing based coalescing
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*/
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if (coal->rx_max_coalesced_frames > 1 ||
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coal->rx_coalesce_usecs_irq ||
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coal->rx_max_coalesced_frames_irq)
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return -EOPNOTSUPP;
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if (coal->tx_max_coalesced_frames > 1 ||
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coal->tx_coalesce_usecs_irq ||
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coal->tx_max_coalesced_frames_irq)
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return -EOPNOTSUPP;
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/* We do not support frame counting. Check this
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*/
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if (!(coal->rx_max_coalesced_frames == !coal->rx_coalesce_usecs))
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return -EOPNOTSUPP;
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if (!(coal->tx_max_coalesced_frames == !coal->tx_coalesce_usecs))
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return -EOPNOTSUPP;
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if (coal->rx_coalesce_usecs > AQ_CFG_INTERRUPT_MODERATION_USEC_MAX ||
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coal->tx_coalesce_usecs > AQ_CFG_INTERRUPT_MODERATION_USEC_MAX)
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return -EINVAL;
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cfg->itr = AQ_CFG_INTERRUPT_MODERATION_ON;
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cfg->rx_itr = coal->rx_coalesce_usecs;
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cfg->tx_itr = coal->tx_coalesce_usecs;
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return aq_nic_update_interrupt_moderation_settings(aq_nic);
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}
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const struct ethtool_ops aq_ethtool_ops = {
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.get_link = aq_ethtool_get_link,
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.get_regs_len = aq_ethtool_get_regs_len,
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@ -235,4 +298,6 @@ const struct ethtool_ops aq_ethtool_ops = {
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.get_ethtool_stats = aq_ethtool_stats,
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.get_link_ksettings = aq_ethtool_get_link_ksettings,
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.set_link_ksettings = aq_ethtool_set_link_ksettings,
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.get_coalesce = aq_ethtool_get_coalesce,
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.set_coalesce = aq_ethtool_set_coalesce,
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};
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@ -151,8 +151,7 @@ struct aq_hw_ops {
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[ETH_ALEN],
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u32 count);
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int (*hw_interrupt_moderation_set)(struct aq_hw_s *self,
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bool itr_enabled);
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int (*hw_interrupt_moderation_set)(struct aq_hw_s *self);
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int (*hw_rss_set)(struct aq_hw_s *self,
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struct aq_rss_parameters *rss_params);
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@ -16,6 +16,7 @@
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#include "aq_pci_func.h"
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#include "aq_nic_internal.h"
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#include <linux/moduleparam.h>
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#include <linux/netdevice.h>
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#include <linux/etherdevice.h>
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#include <linux/timer.h>
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@ -24,6 +25,18 @@
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#include <linux/tcp.h>
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#include <net/ip.h>
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static unsigned int aq_itr = AQ_CFG_INTERRUPT_MODERATION_AUTO;
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module_param_named(aq_itr, aq_itr, uint, 0644);
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MODULE_PARM_DESC(aq_itr, "Interrupt throttling mode");
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static unsigned int aq_itr_tx;
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module_param_named(aq_itr_tx, aq_itr_tx, uint, 0644);
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MODULE_PARM_DESC(aq_itr_tx, "TX interrupt throttle rate");
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static unsigned int aq_itr_rx;
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module_param_named(aq_itr_rx, aq_itr_rx, uint, 0644);
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MODULE_PARM_DESC(aq_itr_rx, "RX interrupt throttle rate");
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static void aq_nic_rss_init(struct aq_nic_s *self, unsigned int num_rss_queues)
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{
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struct aq_nic_cfg_s *cfg = &self->aq_nic_cfg;
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@ -61,9 +74,9 @@ static void aq_nic_cfg_init_defaults(struct aq_nic_s *self)
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cfg->is_polling = AQ_CFG_IS_POLLING_DEF;
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cfg->is_interrupt_moderation = AQ_CFG_IS_INTERRUPT_MODERATION_DEF;
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cfg->itr = cfg->is_interrupt_moderation ?
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AQ_CFG_INTERRUPT_MODERATION_RATE_DEF : 0U;
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cfg->itr = aq_itr;
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cfg->tx_itr = aq_itr_tx;
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cfg->rx_itr = aq_itr_rx;
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cfg->is_rss = AQ_CFG_IS_RSS_DEF;
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cfg->num_rss_queues = AQ_CFG_NUM_RSS_QUEUES_DEF;
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@ -126,10 +139,12 @@ static int aq_nic_update_link_status(struct aq_nic_s *self)
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if (err)
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return err;
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if (self->link_status.mbps != self->aq_hw->aq_link_status.mbps)
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if (self->link_status.mbps != self->aq_hw->aq_link_status.mbps) {
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pr_info("%s: link change old %d new %d\n",
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AQ_CFG_DRV_NAME, self->link_status.mbps,
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self->aq_hw->aq_link_status.mbps);
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aq_nic_update_interrupt_moderation_settings(self);
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}
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self->link_status = self->aq_hw->aq_link_status;
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if (!netif_carrier_ok(self->ndev) && self->link_status.mbps) {
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@ -164,9 +179,6 @@ static void aq_nic_service_timer_cb(unsigned long param)
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if (err)
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goto err_exit;
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self->aq_hw_ops.hw_interrupt_moderation_set(self->aq_hw,
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self->aq_nic_cfg.is_interrupt_moderation);
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if (self->aq_hw_ops.hw_update_stats)
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self->aq_hw_ops.hw_update_stats(self->aq_hw);
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@ -425,9 +437,8 @@ int aq_nic_start(struct aq_nic_s *self)
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if (err < 0)
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goto err_exit;
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err = self->aq_hw_ops.hw_interrupt_moderation_set(self->aq_hw,
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self->aq_nic_cfg.is_interrupt_moderation);
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if (err < 0)
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err = aq_nic_update_interrupt_moderation_settings(self);
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if (err)
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goto err_exit;
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setup_timer(&self->service_timer, &aq_nic_service_timer_cb,
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(unsigned long)self);
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@ -649,6 +660,11 @@ int aq_nic_xmit(struct aq_nic_s *self, struct sk_buff *skb)
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return err;
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}
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int aq_nic_update_interrupt_moderation_settings(struct aq_nic_s *self)
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{
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return self->aq_hw_ops.hw_interrupt_moderation_set(self->aq_hw);
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}
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int aq_nic_set_packet_filter(struct aq_nic_s *self, unsigned int flags)
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{
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int err = 0;
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@ -40,6 +40,8 @@ struct aq_nic_cfg_s {
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u32 vecs; /* vecs==allocated irqs */
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u32 irq_type;
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u32 itr;
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u16 rx_itr;
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u16 tx_itr;
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u32 num_rss_queues;
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u32 mtu;
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u32 ucp_0x364;
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@ -49,7 +51,6 @@ struct aq_nic_cfg_s {
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u16 is_mc_list_enabled;
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u16 mc_list_count;
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bool is_autoneg;
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bool is_interrupt_moderation;
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bool is_polling;
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bool is_rss;
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bool is_lro;
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@ -104,5 +105,6 @@ int aq_nic_set_link_ksettings(struct aq_nic_s *self,
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struct aq_nic_cfg_s *aq_nic_get_cfg(struct aq_nic_s *self);
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u32 aq_nic_get_fw_version(struct aq_nic_s *self);
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int aq_nic_change_pm_state(struct aq_nic_s *self, pm_message_t *pm_msg);
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int aq_nic_update_interrupt_moderation_settings(struct aq_nic_s *self);
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#endif /* AQ_NIC_H */
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@ -765,24 +765,23 @@ static int hw_atl_a0_hw_multicast_list_set(struct aq_hw_s *self,
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return err;
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}
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static int hw_atl_a0_hw_interrupt_moderation_set(struct aq_hw_s *self,
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bool itr_enabled)
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static int hw_atl_a0_hw_interrupt_moderation_set(struct aq_hw_s *self)
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{
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unsigned int i = 0U;
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u32 itr_rx;
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if (itr_enabled && self->aq_nic_cfg->itr) {
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if (self->aq_nic_cfg->itr != 0xFFFFU) {
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if (self->aq_nic_cfg->itr) {
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if (self->aq_nic_cfg->itr != AQ_CFG_INTERRUPT_MODERATION_AUTO) {
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u32 itr_ = (self->aq_nic_cfg->itr >> 1);
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itr_ = min(AQ_CFG_IRQ_MASK, itr_);
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PHAL_ATLANTIC_A0->itr_rx = 0x80000000U |
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(itr_ << 0x10);
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itr_rx = 0x80000000U | (itr_ << 0x10);
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} else {
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u32 n = 0xFFFFU & aq_hw_read_reg(self, 0x00002A00U);
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if (n < self->aq_link_status.mbps) {
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PHAL_ATLANTIC_A0->itr_rx = 0U;
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itr_rx = 0U;
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} else {
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static unsigned int hw_timers_tbl_[] = {
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0x01CU, /* 10Gbit */
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hw_atl_utils_mbps_2_speed_index(
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self->aq_link_status.mbps);
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PHAL_ATLANTIC_A0->itr_rx =
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0x80000000U |
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itr_rx = 0x80000000U |
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(hw_timers_tbl_[speed_index] << 0x10U);
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}
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@ -806,11 +804,11 @@ static int hw_atl_a0_hw_interrupt_moderation_set(struct aq_hw_s *self,
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aq_hw_write_reg(self, 0x00002A00U, 0x8D000000U);
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}
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} else {
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PHAL_ATLANTIC_A0->itr_rx = 0U;
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itr_rx = 0U;
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}
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for (i = HW_ATL_A0_RINGS_MAX; i--;)
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reg_irq_thr_set(self, PHAL_ATLANTIC_A0->itr_rx, i);
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reg_irq_thr_set(self, itr_rx, i);
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return aq_hw_err_from_flags(self);
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}
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@ -788,31 +788,37 @@ static int hw_atl_b0_hw_multicast_list_set(struct aq_hw_s *self,
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return err;
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}
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static int hw_atl_b0_hw_interrupt_moderation_set(struct aq_hw_s *self,
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bool itr_enabled)
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static int hw_atl_b0_hw_interrupt_moderation_set(struct aq_hw_s *self)
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{
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unsigned int i = 0U;
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u32 itr_tx = 2U;
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u32 itr_rx = 2U;
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if (itr_enabled && self->aq_nic_cfg->itr) {
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switch (self->aq_nic_cfg->itr) {
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case AQ_CFG_INTERRUPT_MODERATION_ON:
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case AQ_CFG_INTERRUPT_MODERATION_AUTO:
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tdm_tx_desc_wr_wb_irq_en_set(self, 0U);
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tdm_tdm_intr_moder_en_set(self, 1U);
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rdm_rx_desc_wr_wb_irq_en_set(self, 0U);
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rdm_rdm_intr_moder_en_set(self, 1U);
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PHAL_ATLANTIC_B0->itr_tx = 2U;
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PHAL_ATLANTIC_B0->itr_rx = 2U;
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if (self->aq_nic_cfg->itr == AQ_CFG_INTERRUPT_MODERATION_ON) {
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/* HW timers are in 2us units */
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int tx_max_timer = self->aq_nic_cfg->tx_itr / 2;
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int tx_min_timer = tx_max_timer / 2;
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if (self->aq_nic_cfg->itr != 0xFFFFU) {
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unsigned int max_timer = self->aq_nic_cfg->itr / 2U;
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unsigned int min_timer = self->aq_nic_cfg->itr / 32U;
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int rx_max_timer = self->aq_nic_cfg->rx_itr / 2;
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int rx_min_timer = rx_max_timer / 2;
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max_timer = min(0x1FFU, max_timer);
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min_timer = min(0xFFU, min_timer);
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tx_max_timer = min(HW_ATL_INTR_MODER_MAX, tx_max_timer);
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tx_min_timer = min(HW_ATL_INTR_MODER_MIN, tx_min_timer);
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rx_max_timer = min(HW_ATL_INTR_MODER_MAX, rx_max_timer);
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rx_min_timer = min(HW_ATL_INTR_MODER_MIN, rx_min_timer);
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PHAL_ATLANTIC_B0->itr_tx |= min_timer << 0x8U;
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PHAL_ATLANTIC_B0->itr_tx |= max_timer << 0x10U;
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PHAL_ATLANTIC_B0->itr_rx |= min_timer << 0x8U;
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PHAL_ATLANTIC_B0->itr_rx |= max_timer << 0x10U;
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itr_tx |= tx_min_timer << 0x8U;
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itr_tx |= tx_max_timer << 0x10U;
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itr_rx |= rx_min_timer << 0x8U;
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itr_rx |= rx_max_timer << 0x10U;
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} else {
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static unsigned int hw_atl_b0_timers_table_tx_[][2] = {
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{0xffU, 0xffU}, /* 10Gbit */
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@ -836,34 +842,36 @@ static int hw_atl_b0_hw_interrupt_moderation_set(struct aq_hw_s *self,
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hw_atl_utils_mbps_2_speed_index(
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self->aq_link_status.mbps);
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PHAL_ATLANTIC_B0->itr_tx |=
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hw_atl_b0_timers_table_tx_[speed_index]
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[0] << 0x8U; /* set min timer value */
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PHAL_ATLANTIC_B0->itr_tx |=
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hw_atl_b0_timers_table_tx_[speed_index]
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[1] << 0x10U; /* set max timer value */
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/* Update user visible ITR settings */
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self->aq_nic_cfg->tx_itr = hw_atl_b0_timers_table_tx_
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[speed_index][1] * 2;
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self->aq_nic_cfg->rx_itr = hw_atl_b0_timers_table_rx_
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[speed_index][1] * 2;
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PHAL_ATLANTIC_B0->itr_rx |=
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hw_atl_b0_timers_table_rx_[speed_index]
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[0] << 0x8U; /* set min timer value */
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PHAL_ATLANTIC_B0->itr_rx |=
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hw_atl_b0_timers_table_rx_[speed_index]
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[1] << 0x10U; /* set max timer value */
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itr_tx |= hw_atl_b0_timers_table_tx_
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[speed_index][0] << 0x8U;
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itr_tx |= hw_atl_b0_timers_table_tx_
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[speed_index][1] << 0x10U;
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itr_rx |= hw_atl_b0_timers_table_rx_
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[speed_index][0] << 0x8U;
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itr_rx |= hw_atl_b0_timers_table_rx_
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[speed_index][1] << 0x10U;
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}
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} else {
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break;
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case AQ_CFG_INTERRUPT_MODERATION_OFF:
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tdm_tx_desc_wr_wb_irq_en_set(self, 1U);
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tdm_tdm_intr_moder_en_set(self, 0U);
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rdm_rx_desc_wr_wb_irq_en_set(self, 1U);
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rdm_rdm_intr_moder_en_set(self, 0U);
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PHAL_ATLANTIC_B0->itr_tx = 0U;
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PHAL_ATLANTIC_B0->itr_rx = 0U;
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itr_tx = 0U;
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itr_rx = 0U;
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||||
break;
|
||||
}
|
||||
|
||||
for (i = HW_ATL_B0_RINGS_MAX; i--;) {
|
||||
reg_tx_intr_moder_ctrl_set(self,
|
||||
PHAL_ATLANTIC_B0->itr_tx, i);
|
||||
reg_rx_intr_moder_ctrl_set(self,
|
||||
PHAL_ATLANTIC_B0->itr_rx, i);
|
||||
reg_tx_intr_moder_ctrl_set(self, itr_tx, i);
|
||||
reg_rx_intr_moder_ctrl_set(self, itr_rx, i);
|
||||
}
|
||||
|
||||
return aq_hw_err_from_flags(self);
|
||||
|
|
|
@ -139,6 +139,9 @@
|
|||
|
||||
#define HW_ATL_B0_FW_VER_EXPECTED 0x01050006U
|
||||
|
||||
#define HW_ATL_INTR_MODER_MAX 0x1FF
|
||||
#define HW_ATL_INTR_MODER_MIN 0xFF
|
||||
|
||||
/* Hardware tx descriptor */
|
||||
struct __packed hw_atl_txd_s {
|
||||
u64 buf_addr;
|
||||
|
|
|
@ -131,8 +131,6 @@ struct __packed hw_atl_s {
|
|||
struct hw_atl_stats_s last_stats;
|
||||
struct hw_atl_stats_s curr_stats;
|
||||
u64 speed;
|
||||
u32 itr_tx;
|
||||
u32 itr_rx;
|
||||
unsigned int chip_features;
|
||||
u32 fw_ver_actual;
|
||||
atomic_t dpc;
|
||||
|
|
Loading…
Reference in New Issue
Block a user