Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus
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commit
b9756c047c
@ -63,7 +63,7 @@ void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long maxlen)
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return ioport_map(start, len);
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if (flags & IORESOURCE_MEM) {
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if (flags & IORESOURCE_CACHEABLE)
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return ioremap_cacheable_cow(start, len);
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return ioremap_cachable(start, len);
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return ioremap_nocache(start, len);
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}
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@ -235,7 +235,9 @@ static inline void r4k_blast_scache_page_setup(void)
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{
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unsigned long sc_lsize = cpu_scache_line_size();
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if (sc_lsize == 16)
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if (scache_size == 0)
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r4k_blast_scache_page = (void *)no_sc_noop;
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else if (sc_lsize == 16)
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r4k_blast_scache_page = blast_scache16_page;
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else if (sc_lsize == 32)
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r4k_blast_scache_page = blast_scache32_page;
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@ -251,7 +253,9 @@ static inline void r4k_blast_scache_page_indexed_setup(void)
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{
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unsigned long sc_lsize = cpu_scache_line_size();
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if (sc_lsize == 16)
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if (scache_size == 0)
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r4k_blast_scache_page_indexed = (void *)no_sc_noop;
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else if (sc_lsize == 16)
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r4k_blast_scache_page_indexed = blast_scache16_page_indexed;
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else if (sc_lsize == 32)
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r4k_blast_scache_page_indexed = blast_scache32_page_indexed;
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@ -267,7 +271,9 @@ static inline void r4k_blast_scache_setup(void)
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{
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unsigned long sc_lsize = cpu_scache_line_size();
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if (sc_lsize == 16)
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if (scache_size == 0)
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r4k_blast_scache = (void *)no_sc_noop;
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else if (sc_lsize == 16)
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r4k_blast_scache = blast_scache16;
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else if (sc_lsize == 32)
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r4k_blast_scache = blast_scache32;
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@ -482,7 +488,7 @@ static inline void local_r4k_flush_icache_range(void *args)
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protected_blast_dcache_range(start, end);
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}
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if (!cpu_icache_snoops_remote_store) {
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if (!cpu_icache_snoops_remote_store && scache_size) {
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if (end - start > scache_size)
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r4k_blast_scache();
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else
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@ -651,7 +657,7 @@ static void local_r4k_flush_cache_sigtramp(void * arg)
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R4600_HIT_CACHEOP_WAR_IMPL;
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protected_writeback_dcache_line(addr & ~(dc_lsize - 1));
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if (!cpu_icache_snoops_remote_store)
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if (!cpu_icache_snoops_remote_store && scache_size)
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protected_writeback_scache_line(addr & ~(sc_lsize - 1));
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protected_flush_icache_line(addr & ~(ic_lsize - 1));
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if (MIPS4K_ICACHE_REFILL_WAR) {
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@ -282,6 +282,24 @@ static inline void __iomem * __ioremap_mode(phys_t offset, unsigned long size,
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#define ioremap_nocache(offset, size) \
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__ioremap_mode((offset), (size), _CACHE_UNCACHED)
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/*
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* ioremap_cachable - map bus memory into CPU space
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* @offset: bus address of the memory
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* @size: size of the resource to map
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*
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* ioremap_nocache performs a platform specific sequence of operations to
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* make bus memory CPU accessible via the readb/readw/readl/writeb/
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* writew/writel functions and the other mmio helpers. The returned
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* address is not guaranteed to be usable directly as a virtual
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* address.
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*
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* This version of ioremap ensures that the memory is marked cachable by
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* the CPU. Also enables full write-combining. Useful for some
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* memory-like regions on I/O busses.
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*/
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#define ioremap_cachable(offset, size) \
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__ioremap_mode((offset), (size), PAGE_CACHABLE_DEFAULT)
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/*
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* These two are MIPS specific ioremap variant. ioremap_cacheable_cow
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* requests a cachable mapping, ioremap_uncached_accelerated requests a
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