powerpc/powermac: Convert PCI to use generic config accessors
Convert the powermac PCI driver to use the generic config access functions. This changes accesses from (in|out)_(8|le16|le32) to readX/writeX variants. I believe these should be equivalent for PCI config space accesses, but confirmation would be nice. Signed-off-by: Rob Herring <robh@kernel.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> CC: Benjamin Herrenschmidt <benh@kernel.crashing.org> CC: Paul Mackerras <paulus@samba.org> CC: Michael Ellerman <mpe@ellerman.id.au> CC: linuxppc-dev@lists.ozlabs.org
This commit is contained in:
Rob Herring
Bjorn Helgaas
parent
933d275f1c
commit
b98fa50847
@ -133,17 +133,23 @@ static void __init fixup_bus_range(struct device_node *bridge)
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|(((unsigned int)(off)) & 0xFCUL) \
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|1UL)
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static volatile void __iomem *macrisc_cfg_access(struct pci_controller* hose,
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u8 bus, u8 dev_fn, u8 offset)
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static void __iomem *macrisc_cfg_map_bus(struct pci_bus *bus,
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unsigned int dev_fn,
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int offset)
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{
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unsigned int caddr;
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struct pci_controller *hose;
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if (bus == hose->first_busno) {
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hose = pci_bus_to_host(bus);
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if (hose == NULL)
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return NULL;
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if (bus->number == hose->first_busno) {
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if (dev_fn < (11 << 3))
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return NULL;
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caddr = MACRISC_CFA0(dev_fn, offset);
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} else
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caddr = MACRISC_CFA1(bus, dev_fn, offset);
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caddr = MACRISC_CFA1(bus->number, dev_fn, offset);
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/* Uninorth will return garbage if we don't read back the value ! */
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do {
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@ -154,129 +160,46 @@ static volatile void __iomem *macrisc_cfg_access(struct pci_controller* hose,
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return hose->cfg_data + offset;
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}
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static int macrisc_read_config(struct pci_bus *bus, unsigned int devfn,
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int offset, int len, u32 *val)
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{
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struct pci_controller *hose;
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volatile void __iomem *addr;
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hose = pci_bus_to_host(bus);
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if (hose == NULL)
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return PCIBIOS_DEVICE_NOT_FOUND;
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if (offset >= 0x100)
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return PCIBIOS_BAD_REGISTER_NUMBER;
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addr = macrisc_cfg_access(hose, bus->number, devfn, offset);
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if (!addr)
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return PCIBIOS_DEVICE_NOT_FOUND;
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/*
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* Note: the caller has already checked that offset is
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* suitably aligned and that len is 1, 2 or 4.
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*/
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switch (len) {
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case 1:
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*val = in_8(addr);
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break;
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case 2:
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*val = in_le16(addr);
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break;
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default:
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*val = in_le32(addr);
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break;
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}
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return PCIBIOS_SUCCESSFUL;
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}
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static int macrisc_write_config(struct pci_bus *bus, unsigned int devfn,
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int offset, int len, u32 val)
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{
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struct pci_controller *hose;
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volatile void __iomem *addr;
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hose = pci_bus_to_host(bus);
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if (hose == NULL)
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return PCIBIOS_DEVICE_NOT_FOUND;
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if (offset >= 0x100)
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return PCIBIOS_BAD_REGISTER_NUMBER;
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addr = macrisc_cfg_access(hose, bus->number, devfn, offset);
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if (!addr)
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return PCIBIOS_DEVICE_NOT_FOUND;
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/*
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* Note: the caller has already checked that offset is
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* suitably aligned and that len is 1, 2 or 4.
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*/
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switch (len) {
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case 1:
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out_8(addr, val);
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break;
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case 2:
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out_le16(addr, val);
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break;
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default:
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out_le32(addr, val);
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break;
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}
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return PCIBIOS_SUCCESSFUL;
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}
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static struct pci_ops macrisc_pci_ops =
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{
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.read = macrisc_read_config,
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.write = macrisc_write_config,
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.map_bus = macrisc_cfg_map_bus,
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.read = pci_generic_config_read,
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.write = pci_generic_config_write,
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};
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#ifdef CONFIG_PPC32
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/*
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* Verify that a specific (bus, dev_fn) exists on chaos
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*/
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static int chaos_validate_dev(struct pci_bus *bus, int devfn, int offset)
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static void __iomem *chaos_map_bus(struct pci_bus *bus, unsigned int devfn,
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int offset)
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{
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struct device_node *np;
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const u32 *vendor, *device;
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if (offset >= 0x100)
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return PCIBIOS_BAD_REGISTER_NUMBER;
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return NULL;
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np = of_pci_find_child_device(bus->dev.of_node, devfn);
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if (np == NULL)
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return PCIBIOS_DEVICE_NOT_FOUND;
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return NULL;
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vendor = of_get_property(np, "vendor-id", NULL);
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device = of_get_property(np, "device-id", NULL);
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if (vendor == NULL || device == NULL)
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return PCIBIOS_DEVICE_NOT_FOUND;
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return NULL;
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if ((*vendor == 0x106b) && (*device == 3) && (offset >= 0x10)
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&& (offset != 0x14) && (offset != 0x18) && (offset <= 0x24))
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return PCIBIOS_BAD_REGISTER_NUMBER;
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return NULL;
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return PCIBIOS_SUCCESSFUL;
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}
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static int
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chaos_read_config(struct pci_bus *bus, unsigned int devfn, int offset,
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int len, u32 *val)
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{
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int result = chaos_validate_dev(bus, devfn, offset);
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if (result == PCIBIOS_BAD_REGISTER_NUMBER)
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*val = ~0U;
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if (result != PCIBIOS_SUCCESSFUL)
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return result;
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return macrisc_read_config(bus, devfn, offset, len, val);
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}
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static int
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chaos_write_config(struct pci_bus *bus, unsigned int devfn, int offset,
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int len, u32 val)
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{
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int result = chaos_validate_dev(bus, devfn, offset);
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if (result != PCIBIOS_SUCCESSFUL)
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return result;
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return macrisc_write_config(bus, devfn, offset, len, val);
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return macrisc_cfg_map_bus(bus, devfn, offset);
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}
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static struct pci_ops chaos_pci_ops =
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{
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.read = chaos_read_config,
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.write = chaos_write_config,
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.map_bus = chaos_map_bus,
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.read = pci_generic_config_read,
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.write = pci_generic_config_write,
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};
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static void __init setup_chaos(struct pci_controller *hose,
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@ -471,15 +394,24 @@ static struct pci_ops u3_ht_pci_ops =
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|(((unsigned int)(off)) & 0xfcU) \
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|1UL)
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static volatile void __iomem *u4_pcie_cfg_access(struct pci_controller* hose,
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u8 bus, u8 dev_fn, int offset)
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static void __iomem *u4_pcie_cfg_map_bus(struct pci_bus *bus,
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unsigned int dev_fn,
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int offset)
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{
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struct pci_controller *hose;
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unsigned int caddr;
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if (bus == hose->first_busno) {
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if (offset >= 0x1000)
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return NULL;
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hose = pci_bus_to_host(bus);
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if (!hose)
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return NULL;
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if (bus->number == hose->first_busno) {
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caddr = U4_PCIE_CFA0(dev_fn, offset);
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} else
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caddr = U4_PCIE_CFA1(bus, dev_fn, offset);
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caddr = U4_PCIE_CFA1(bus->number, dev_fn, offset);
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/* Uninorth will return garbage if we don't read back the value ! */
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do {
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@ -490,74 +422,11 @@ static volatile void __iomem *u4_pcie_cfg_access(struct pci_controller* hose,
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return hose->cfg_data + offset;
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}
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static int u4_pcie_read_config(struct pci_bus *bus, unsigned int devfn,
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int offset, int len, u32 *val)
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{
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struct pci_controller *hose;
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volatile void __iomem *addr;
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hose = pci_bus_to_host(bus);
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if (hose == NULL)
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return PCIBIOS_DEVICE_NOT_FOUND;
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if (offset >= 0x1000)
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return PCIBIOS_BAD_REGISTER_NUMBER;
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addr = u4_pcie_cfg_access(hose, bus->number, devfn, offset);
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if (!addr)
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return PCIBIOS_DEVICE_NOT_FOUND;
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/*
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* Note: the caller has already checked that offset is
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* suitably aligned and that len is 1, 2 or 4.
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*/
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switch (len) {
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case 1:
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*val = in_8(addr);
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break;
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case 2:
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*val = in_le16(addr);
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break;
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default:
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*val = in_le32(addr);
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break;
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}
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return PCIBIOS_SUCCESSFUL;
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}
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static int u4_pcie_write_config(struct pci_bus *bus, unsigned int devfn,
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int offset, int len, u32 val)
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{
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struct pci_controller *hose;
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volatile void __iomem *addr;
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hose = pci_bus_to_host(bus);
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if (hose == NULL)
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return PCIBIOS_DEVICE_NOT_FOUND;
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if (offset >= 0x1000)
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return PCIBIOS_BAD_REGISTER_NUMBER;
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addr = u4_pcie_cfg_access(hose, bus->number, devfn, offset);
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if (!addr)
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return PCIBIOS_DEVICE_NOT_FOUND;
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/*
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* Note: the caller has already checked that offset is
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* suitably aligned and that len is 1, 2 or 4.
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*/
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switch (len) {
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case 1:
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out_8(addr, val);
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break;
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case 2:
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out_le16(addr, val);
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break;
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default:
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out_le32(addr, val);
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break;
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}
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return PCIBIOS_SUCCESSFUL;
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}
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static struct pci_ops u4_pcie_pci_ops =
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{
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.read = u4_pcie_read_config,
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.write = u4_pcie_write_config,
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.map_bus = u4_pcie_cfg_map_bus,
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.read = pci_generic_config_read,
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.write = pci_generic_config_write,
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};
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static void pmac_pci_fixup_u4_of_node(struct pci_dev *dev)
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