irqchip/sunxi-nmi: Support sun9i A80 NMI controller
The A80 moves the NMI controller into the PRCM address space, and also rearranges the registers. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Link: https://lkml.kernel.org/r/1449130813-22400-4-git-send-email-wens@csie.org Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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@ -50,6 +50,12 @@ static struct sunxi_sc_nmi_reg_offs sun6i_reg_offs = {
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.enable = 0x34,
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};
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static struct sunxi_sc_nmi_reg_offs sun9i_reg_offs = {
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.ctrl = 0x00,
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.pend = 0x08,
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.enable = 0x04,
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};
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static inline void sunxi_sc_nmi_write(struct irq_chip_generic *gc, u32 off,
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u32 val)
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{
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@ -207,3 +213,10 @@ static int __init sun7i_sc_nmi_irq_init(struct device_node *node,
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return sunxi_sc_nmi_irq_init(node, &sun7i_reg_offs);
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}
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IRQCHIP_DECLARE(sun7i_sc_nmi, "allwinner,sun7i-a20-sc-nmi", sun7i_sc_nmi_irq_init);
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static int __init sun9i_nmi_irq_init(struct device_node *node,
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struct device_node *parent)
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{
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return sunxi_sc_nmi_irq_init(node, &sun9i_reg_offs);
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}
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IRQCHIP_DECLARE(sun9i_nmi, "allwinner,sun9i-a80-nmi", sun9i_nmi_irq_init);
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