MXC: Add iomux support for MX35 SoCs
This iomux is called iomux-v3 in the tree because it is the third known incarnation of MXC iomuxers. It is not only found on the MX35 but also on the MX51 and probably others. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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@ -5,6 +5,7 @@ config ARCH_MX31
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config ARCH_MX35
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bool
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select ARCH_MXC_IOMUX_V3
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comment "MX3 platforms:"
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@ -51,4 +51,6 @@ config MXC_PWM
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help
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Enable support for the i.MX PWM controller(s).
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config ARCH_MXC_IOMUX_V3
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bool
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endif
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@ -7,4 +7,5 @@ obj-y := irq.o clock.o gpio.o time.o devices.o cpu.o system.o
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obj-$(CONFIG_ARCH_MX1) += iomux-mx1-mx2.o dma-mx1-mx2.o
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obj-$(CONFIG_ARCH_MX2) += iomux-mx1-mx2.o dma-mx1-mx2.o
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obj-$(CONFIG_ARCH_MXC_IOMUX_V3) += iomux-v3.o
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obj-$(CONFIG_MXC_PWM) += pwm.o
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121
arch/arm/plat-mxc/include/mach/iomux-v3.h
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121
arch/arm/plat-mxc/include/mach/iomux-v3.h
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@ -0,0 +1,121 @@
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/*
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* Copyright (C) 2009 by Jan Weitzel Phytec Messtechnik GmbH,
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* <armlinux@phytec.de>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
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* MA 02110-1301, USA.
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*/
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#ifndef __MACH_IOMUX_V3_H__
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#define __MACH_IOMUX_V3_H__
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/*
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* build IOMUX_PAD structure
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*
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* This iomux scheme is based around pads, which are the physical balls
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* on the processor.
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*
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* - Each pad has a pad control register (IOMUXC_SW_PAD_CTRL_x) which controls
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* things like driving strength and pullup/pulldown.
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* - Each pad can have but not necessarily does have an output routing register
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* (IOMUXC_SW_MUX_CTL_PAD_x).
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* - Each pad can have but not necessarily does have an input routing register
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* (IOMUXC_x_SELECT_INPUT)
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*
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* The three register sets do not have a fixed offset to each other,
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* hence we order this table by pad control registers (which all pads
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* have) and put the optional i/o routing registers into additional
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* fields.
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*
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* The naming convention for the pad modes is MX35_PAD_<padname>__<padmode>
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* If <padname> or <padmode> refers to a GPIO, it is named
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* GPIO_<unit>_<num>
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*
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*/
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struct pad_desc {
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unsigned mux_ctrl_ofs:12; /* IOMUXC_SW_MUX_CTL_PAD offset */
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unsigned mux_mode:8;
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unsigned pad_ctrl_ofs:12; /* IOMUXC_SW_PAD_CTRL offset */
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#define NO_PAD_CTRL (1 << 16)
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unsigned pad_ctrl:17;
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unsigned select_input_ofs:12; /* IOMUXC_SELECT_INPUT offset */
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unsigned select_input:3;
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};
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#define IOMUX_PAD(_pad_ctrl_ofs, _mux_ctrl_ofs, _mux_mode, _select_input_ofs, \
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_select_input, _pad_ctrl) \
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{ \
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.mux_ctrl_ofs = _mux_ctrl_ofs, \
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.mux_mode = _mux_mode, \
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.pad_ctrl_ofs = _pad_ctrl_ofs, \
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.pad_ctrl = _pad_ctrl, \
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.select_input_ofs = _select_input_ofs, \
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.select_input = _select_input, \
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}
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/*
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* Use to set PAD control
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*/
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#define PAD_CTL_DRIVE_VOLTAGE_3_3_V 0
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#define PAD_CTL_DRIVE_VOLTAGE_1_8_V 1
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#define PAD_CTL_NO_HYSTERESIS 0
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#define PAD_CTL_HYSTERESIS 1
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#define PAD_CTL_PULL_DISABLED 0x0
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#define PAD_CTL_PULL_KEEPER 0xa
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#define PAD_CTL_PULL_DOWN_100K 0xc
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#define PAD_CTL_PULL_UP_47K 0xd
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#define PAD_CTL_PULL_UP_100K 0xe
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#define PAD_CTL_PULL_UP_22K 0xf
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#define PAD_CTL_OUTPUT_CMOS 0
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#define PAD_CTL_OUTPUT_OPEN_DRAIN 1
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#define PAD_CTL_DRIVE_STRENGTH_NORM 0
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#define PAD_CTL_DRIVE_STRENGTH_HIGH 1
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#define PAD_CTL_DRIVE_STRENGTH_MAX 2
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#define PAD_CTL_SLEW_RATE_SLOW 0
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#define PAD_CTL_SLEW_RATE_FAST 1
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/*
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* setups a single pad:
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* - reserves the pad so that it is not claimed by another driver
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* - setups the iomux according to the configuration
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*/
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int mxc_iomux_v3_setup_pad(struct pad_desc *pad);
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/*
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* setups mutliple pads
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* convenient way to call the above function with tables
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*/
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int mxc_iomux_v3_setup_multiple_pads(struct pad_desc *pad_list, unsigned count);
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/*
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* releases a single pad:
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* - make it available for a future use by another driver
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* - DOES NOT reconfigure the IOMUX in its reset state
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*/
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void mxc_iomux_v3_release_pad(struct pad_desc *pad);
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/*
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* releases multiple pads
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* convenvient way to call the above function with tables
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*/
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void mxc_iomux_v3_release_multiple_pads(struct pad_desc *pad_list, int count);
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#endif /* __MACH_IOMUX_V3_H__*/
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98
arch/arm/plat-mxc/iomux-v3.c
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98
arch/arm/plat-mxc/iomux-v3.c
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@ -0,0 +1,98 @@
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/*
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* Copyright 2004-2006 Freescale Semiconductor, Inc. All Rights Reserved.
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* Copyright (C) 2008 by Sascha Hauer <kernel@pengutronix.de>
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* Copyright (C) 2009 by Jan Weitzel Phytec Messtechnik GmbH,
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* <armlinux@phytec.de>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
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* MA 02110-1301, USA.
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*/
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#include <linux/errno.h>
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#include <linux/init.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/string.h>
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#include <linux/gpio.h>
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#include <mach/hardware.h>
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#include <asm/mach/map.h>
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#include <mach/iomux-v3.h>
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#define IOMUX_BASE IO_ADDRESS(IOMUXC_BASE_ADDR)
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static unsigned long iomux_v3_pad_alloc_map[0x200 / BITS_PER_LONG];
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/*
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* setups a single pin:
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* - reserves the pin so that it is not claimed by another driver
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* - setups the iomux according to the configuration
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*/
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int mxc_iomux_v3_setup_pad(struct pad_desc *pad)
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{
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unsigned int pad_ofs = pad->pad_ctrl_ofs;
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if (test_and_set_bit(pad_ofs >> 2, iomux_v3_pad_alloc_map))
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return -EBUSY;
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if (pad->mux_ctrl_ofs)
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__raw_writel(pad->mux_mode, IOMUX_BASE + pad->mux_ctrl_ofs);
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if (pad->select_input_ofs)
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__raw_writel(pad->select_input,
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IOMUX_BASE + pad->select_input_ofs);
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if (!(pad->pad_ctrl & NO_PAD_CTRL))
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__raw_writel(pad->pad_ctrl, IOMUX_BASE + pad->pad_ctrl_ofs);
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return 0;
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}
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EXPORT_SYMBOL(mxc_iomux_v3_setup_pad);
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int mxc_iomux_v3_setup_multiple_pads(struct pad_desc *pad_list, unsigned count)
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{
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struct pad_desc *p = pad_list;
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int i;
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int ret;
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for (i = 0; i < count; i++) {
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ret = mxc_iomux_v3_setup_pad(p);
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if (ret)
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goto setup_error;
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p++;
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}
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return 0;
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setup_error:
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mxc_iomux_v3_release_multiple_pads(pad_list, i);
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return ret;
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}
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EXPORT_SYMBOL(mxc_iomux_v3_setup_multiple_pads);
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void mxc_iomux_v3_release_pad(struct pad_desc *pad)
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{
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unsigned int pad_ofs = pad->pad_ctrl_ofs;
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clear_bit(pad_ofs >> 2, iomux_v3_pad_alloc_map);
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}
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EXPORT_SYMBOL(mxc_iomux_v3_release_pad);
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void mxc_iomux_v3_release_multiple_pads(struct pad_desc *pad_list, int count)
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{
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struct pad_desc *p = pad_list;
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int i;
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for (i = 0; i < count; i++) {
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mxc_iomux_v3_release_pad(p);
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p++;
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}
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}
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EXPORT_SYMBOL(mxc_iomux_v3_release_multiple_pads);
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