[POWERPC] 85xx: Add support for the 8568 MDS board
Add support for the MPC8568 MDS reference board Signed-off-by: Andrew Fleming <afleming@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
This commit is contained in:
Andy Fleming
Kumar Gala
parent
54c66f6d78
commit
c2882bb12c
380
arch/powerpc/boot/dts/mpc8568mds.dts
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380
arch/powerpc/boot/dts/mpc8568mds.dts
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@ -0,0 +1,380 @@
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/*
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* MPC8568E MDS Device Tree Source
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*
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* Copyright 2007 Freescale Semiconductor Inc.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*/
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/*
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/memreserve/ 00000000 1000000;
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*/
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/ {
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model = "MPC8568EMDS";
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compatible = "MPC85xxMDS";
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#address-cells = <1>;
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#size-cells = <1>;
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linux,phandle = <100>;
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cpus {
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#cpus = <1>;
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#address-cells = <1>;
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#size-cells = <0>;
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linux,phandle = <200>;
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PowerPC,8568@0 {
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device_type = "cpu";
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reg = <0>;
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d-cache-line-size = <20>; // 32 bytes
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i-cache-line-size = <20>; // 32 bytes
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d-cache-size = <8000>; // L1, 32K
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i-cache-size = <8000>; // L1, 32K
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timebase-frequency = <0>;
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bus-frequency = <0>;
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clock-frequency = <0>;
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32-bit;
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linux,phandle = <201>;
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};
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};
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memory {
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device_type = "memory";
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linux,phandle = <300>;
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reg = <00000000 10000000>;
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};
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bcsr@f8000000 {
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device_type = "board-control";
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reg = <f8000000 8000>;
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};
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soc8568@e0000000 {
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#address-cells = <1>;
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#size-cells = <1>;
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#interrupt-cells = <2>;
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device_type = "soc";
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ranges = <0 e0000000 00100000>;
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reg = <e0000000 00100000>;
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bus-frequency = <0>;
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i2c@3000 {
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device_type = "i2c";
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compatible = "fsl-i2c";
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reg = <3000 100>;
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interrupts = <1b 2>;
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interrupt-parent = <40000>;
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dfsrr;
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};
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i2c@3100 {
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device_type = "i2c";
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compatible = "fsl-i2c";
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reg = <3100 100>;
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interrupts = <1b 2>;
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interrupt-parent = <40000>;
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dfsrr;
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};
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mdio@24520 {
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#address-cells = <1>;
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#size-cells = <0>;
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device_type = "mdio";
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compatible = "gianfar";
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reg = <24520 20>;
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linux,phandle = <24520>;
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ethernet-phy@0 {
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linux,phandle = <2452000>;
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interrupt-parent = <40000>;
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interrupts = <31 1>;
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reg = <0>;
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device_type = "ethernet-phy";
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};
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ethernet-phy@1 {
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linux,phandle = <2452001>;
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interrupt-parent = <40000>;
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interrupts = <32 1>;
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reg = <1>;
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device_type = "ethernet-phy";
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};
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ethernet-phy@2 {
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linux,phandle = <2452002>;
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interrupt-parent = <40000>;
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interrupts = <31 1>;
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reg = <2>;
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device_type = "ethernet-phy";
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};
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ethernet-phy@3 {
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linux,phandle = <2452003>;
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interrupt-parent = <40000>;
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interrupts = <32 1>;
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reg = <3>;
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device_type = "ethernet-phy";
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};
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};
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ethernet@24000 {
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#address-cells = <1>;
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#size-cells = <0>;
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device_type = "network";
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model = "eTSEC";
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compatible = "gianfar";
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reg = <24000 1000>;
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mac-address = [ 00 00 00 00 00 00 ];
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interrupts = <d 2 e 2 12 2>;
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interrupt-parent = <40000>;
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phy-handle = <2452002>;
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};
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ethernet@25000 {
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#address-cells = <1>;
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#size-cells = <0>;
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device_type = "network";
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model = "eTSEC";
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compatible = "gianfar";
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reg = <25000 1000>;
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mac-address = [ 00 00 00 00 00 00];
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interrupts = <13 2 14 2 18 2>;
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interrupt-parent = <40000>;
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phy-handle = <2452003>;
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};
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serial@4500 {
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device_type = "serial";
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compatible = "ns16550";
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reg = <4500 100>;
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clock-frequency = <0>;
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interrupts = <1a 2>;
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interrupt-parent = <40000>;
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};
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serial@4600 {
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device_type = "serial";
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compatible = "ns16550";
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reg = <4600 100>;
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clock-frequency = <0>;
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interrupts = <1a 2>;
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interrupt-parent = <40000>;
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};
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crypto@30000 {
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device_type = "crypto";
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model = "SEC2";
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compatible = "talitos";
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reg = <30000 f000>;
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interrupts = <1d 2>;
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interrupt-parent = <40000>;
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num-channels = <4>;
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channel-fifo-len = <18>;
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exec-units-mask = <000000fe>;
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descriptor-types-mask = <012b0ebf>;
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};
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pic@40000 {
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linux,phandle = <40000>;
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clock-frequency = <0>;
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interrupt-controller;
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#address-cells = <0>;
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#interrupt-cells = <2>;
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reg = <40000 40000>;
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built-in;
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compatible = "chrp,open-pic";
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device_type = "open-pic";
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big-endian;
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};
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par_io@e0100 {
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reg = <e0100 100>;
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device_type = "par_io";
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num-ports = <7>;
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ucc_pin@01 {
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linux,phandle = <e010001>;
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pio-map = <
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/* port pin dir open_drain assignment has_irq */
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4 0a 1 0 2 0 /* TxD0 */
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4 09 1 0 2 0 /* TxD1 */
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4 08 1 0 2 0 /* TxD2 */
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4 07 1 0 2 0 /* TxD3 */
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4 17 1 0 2 0 /* TxD4 */
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4 16 1 0 2 0 /* TxD5 */
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4 15 1 0 2 0 /* TxD6 */
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4 14 1 0 2 0 /* TxD7 */
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4 0f 2 0 2 0 /* RxD0 */
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4 0e 2 0 2 0 /* RxD1 */
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4 0d 2 0 2 0 /* RxD2 */
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4 0c 2 0 2 0 /* RxD3 */
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4 1d 2 0 2 0 /* RxD4 */
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4 1c 2 0 2 0 /* RxD5 */
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4 1b 2 0 2 0 /* RxD6 */
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4 1a 2 0 2 0 /* RxD7 */
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4 0b 1 0 2 0 /* TX_EN */
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4 18 1 0 2 0 /* TX_ER */
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4 0f 2 0 2 0 /* RX_DV */
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4 1e 2 0 2 0 /* RX_ER */
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4 11 2 0 2 0 /* RX_CLK */
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4 13 1 0 2 0 /* GTX_CLK */
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1 1f 2 0 3 0>; /* GTX125 */
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};
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ucc_pin@02 {
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linux,phandle = <e010002>;
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pio-map = <
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/* port pin dir open_drain assignment has_irq */
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5 0a 1 0 2 0 /* TxD0 */
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5 09 1 0 2 0 /* TxD1 */
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5 08 1 0 2 0 /* TxD2 */
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5 07 1 0 2 0 /* TxD3 */
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5 17 1 0 2 0 /* TxD4 */
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5 16 1 0 2 0 /* TxD5 */
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5 15 1 0 2 0 /* TxD6 */
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5 14 1 0 2 0 /* TxD7 */
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5 0f 2 0 2 0 /* RxD0 */
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5 0e 2 0 2 0 /* RxD1 */
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5 0d 2 0 2 0 /* RxD2 */
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5 0c 2 0 2 0 /* RxD3 */
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5 1d 2 0 2 0 /* RxD4 */
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5 1c 2 0 2 0 /* RxD5 */
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5 1b 2 0 2 0 /* RxD6 */
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5 1a 2 0 2 0 /* RxD7 */
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5 0b 1 0 2 0 /* TX_EN */
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5 18 1 0 2 0 /* TX_ER */
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5 10 2 0 2 0 /* RX_DV */
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5 1e 2 0 2 0 /* RX_ER */
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5 11 2 0 2 0 /* RX_CLK */
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5 13 1 0 2 0 /* GTX_CLK */
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1 1f 2 0 3 0 /* GTX125 */
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4 06 3 0 2 0 /* MDIO */
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4 05 1 0 2 0>; /* MDC */
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};
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};
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};
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qe@e0080000 {
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#address-cells = <1>;
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#size-cells = <1>;
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device_type = "qe";
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model = "QE";
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ranges = <0 e0080000 00040000>;
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reg = <e0080000 480>;
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brg-frequency = <0>;
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bus-frequency = <179A7B00>;
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muram@10000 {
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device_type = "muram";
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ranges = <0 00010000 0000c000>;
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data-only@0{
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reg = <0 c000>;
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};
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};
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spi@4c0 {
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device_type = "spi";
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compatible = "fsl_spi";
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reg = <4c0 40>;
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interrupts = <2>;
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interrupt-parent = <80>;
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mode = "cpu";
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};
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spi@500 {
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device_type = "spi";
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compatible = "fsl_spi";
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reg = <500 40>;
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interrupts = <1>;
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interrupt-parent = <80>;
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mode = "cpu";
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};
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ucc@2000 {
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device_type = "network";
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compatible = "ucc_geth";
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model = "UCC";
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device-id = <1>;
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reg = <2000 200>;
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interrupts = <20>;
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interrupt-parent = <80>;
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mac-address = [ 00 04 9f 00 23 23 ];
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rx-clock = <0>;
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tx-clock = <19>;
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phy-handle = <212000>;
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pio-handle = <e010001>;
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};
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ucc@3000 {
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device_type = "network";
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compatible = "ucc_geth";
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model = "UCC";
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device-id = <2>;
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reg = <3000 200>;
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interrupts = <21>;
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interrupt-parent = <80>;
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mac-address = [ 00 11 22 33 44 55 ];
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rx-clock = <0>;
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tx-clock = <14>;
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phy-handle = <212001>;
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pio-handle = <e010002>;
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};
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mdio@2120 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <2120 18>;
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device_type = "mdio";
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compatible = "ucc_geth_phy";
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/* These are the same PHYs as on
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* gianfar's MDIO bus */
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ethernet-phy@00 {
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linux,phandle = <212000>;
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interrupt-parent = <40000>;
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interrupts = <31 1>;
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reg = <0>;
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device_type = "ethernet-phy";
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interface = <6>; //ENET_1000_GMII
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};
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ethernet-phy@01 {
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linux,phandle = <212001>;
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interrupt-parent = <40000>;
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interrupts = <32 1>;
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reg = <1>;
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device_type = "ethernet-phy";
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interface = <6>;
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};
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ethernet-phy@02 {
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linux,phandle = <212002>;
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interrupt-parent = <40000>;
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interrupts = <31 1>;
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reg = <2>;
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device_type = "ethernet-phy";
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interface = <6>; //ENET_1000_GMII
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};
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ethernet-phy@03 {
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linux,phandle = <212003>;
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interrupt-parent = <40000>;
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interrupts = <32 1>;
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reg = <3>;
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device_type = "ethernet-phy";
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interface = <6>; //ENET_1000_GMII
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};
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};
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qeic@80 {
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linux,phandle = <80>;
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interrupt-controller;
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device_type = "qeic";
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#address-cells = <0>;
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#interrupt-cells = <1>;
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reg = <80 80>;
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built-in;
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big-endian;
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interrupts = <1e 2 1e 2>; //high:30 low:30
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interrupt-parent = <40000>;
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};
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};
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};
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@ -23,6 +23,13 @@ config MPC85xx_CDS
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help
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This option enables support for the MPC85xx CDS board
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config MPC8568_MDS
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bool "Freescale MPC8568 MDS"
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select DEFAULT_UIMAGE
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# select QUICC_ENGINE
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help
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This option enables support for the MPC8568 MDS board
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endchoice
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config MPC8540
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@ -36,6 +43,12 @@ config MPC8560
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select PPC_INDIRECT_PCI
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default y if MPC8560_ADS
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config MPC85xx
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bool
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select PPC_UDBG_16550
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select PPC_INDIRECT_PCI
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default y if MPC8540_ADS || MPC85xx_CDS || MPC8560_ADS || MPC8568_MDS
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config PPC_INDIRECT_PCI_BE
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bool
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depends on PPC_85xx
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@ -5,3 +5,4 @@ obj-$(CONFIG_PPC_85xx) += misc.o pci.o
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obj-$(CONFIG_MPC8540_ADS) += mpc85xx_ads.o
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obj-$(CONFIG_MPC8560_ADS) += mpc85xx_ads.o
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obj-$(CONFIG_MPC85xx_CDS) += mpc85xx_cds.o
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obj-$(CONFIG_MPC8568_MDS) += mpc8568_mds.o
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246
arch/powerpc/platforms/85xx/mpc8568_mds.c
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246
arch/powerpc/platforms/85xx/mpc8568_mds.c
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@ -0,0 +1,246 @@
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/*
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* Copyright (C) Freescale Semicondutor, Inc. 2006-2007. All rights reserved.
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*
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* Author: Andy Fleming <afleming@freescale.com>
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*
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* Based on 83xx/mpc8360e_pb.c by:
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* Li Yang <LeoLi@freescale.com>
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* Yin Olivia <Hong-hua.Yin@freescale.com>
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*
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* Description:
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* MPC8568E MDS PB board specific routines.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*/
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#include <linux/stddef.h>
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/errno.h>
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#include <linux/reboot.h>
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#include <linux/pci.h>
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#include <linux/kdev_t.h>
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#include <linux/major.h>
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#include <linux/console.h>
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#include <linux/delay.h>
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#include <linux/seq_file.h>
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#include <linux/root_dev.h>
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#include <linux/initrd.h>
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#include <linux/module.h>
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#include <linux/fsl_devices.h>
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#include <asm/of_device.h>
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#include <asm/of_platform.h>
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#include <asm/system.h>
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#include <asm/atomic.h>
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#include <asm/time.h>
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#include <asm/io.h>
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#include <asm/machdep.h>
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#include <asm/bootinfo.h>
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#include <asm/pci-bridge.h>
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#include <asm/mpc85xx.h>
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#include <asm/irq.h>
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#include <mm/mmu_decl.h>
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#include <asm/prom.h>
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#include <asm/udbg.h>
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#include <sysdev/fsl_soc.h>
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#include <asm/qe.h>
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#include <asm/qe_ic.h>
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#include <asm/mpic.h>
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#include "mpc85xx.h"
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#undef DEBUG
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#ifdef DEBUG
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#define DBG(fmt...) udbg_printf(fmt)
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#else
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#define DBG(fmt...)
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#endif
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#ifndef CONFIG_PCI
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unsigned long isa_io_base = 0;
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unsigned long isa_mem_base = 0;
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#endif
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/* ************************************************************************
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*
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* Setup the architecture
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*
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*/
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static void __init mpc8568_mds_setup_arch(void)
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{
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struct device_node *np;
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static u8 *bcsr_regs = NULL;
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|
||||
if (ppc_md.progress)
|
||||
ppc_md.progress("mpc8568_mds_setup_arch()", 0);
|
||||
|
||||
np = of_find_node_by_type(NULL, "cpu");
|
||||
if (np != NULL) {
|
||||
const unsigned int *fp =
|
||||
get_property(np, "clock-frequency", NULL);
|
||||
if (fp != NULL)
|
||||
loops_per_jiffy = *fp / HZ;
|
||||
else
|
||||
loops_per_jiffy = 50000000 / HZ;
|
||||
of_node_put(np);
|
||||
}
|
||||
|
||||
/* Map BCSR area */
|
||||
np = of_find_node_by_name(NULL, "bcsr");
|
||||
if (np != NULL) {
|
||||
struct resource res;
|
||||
|
||||
of_address_to_resource(np, 0, &res);
|
||||
bcsr_regs = ioremap(res.start, res.end - res.start +1);
|
||||
of_node_put(np);
|
||||
}
|
||||
|
||||
#ifdef CONFIG_PCI
|
||||
for (np = NULL; (np = of_find_node_by_type(np, "pci")) != NULL;) {
|
||||
add_bridge(np);
|
||||
}
|
||||
of_node_put(np);
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_QUICC_ENGINE
|
||||
if ((np = of_find_node_by_name(NULL, "qe")) != NULL) {
|
||||
qe_reset();
|
||||
of_node_put(np);
|
||||
}
|
||||
|
||||
if ((np = of_find_node_by_name(NULL, "par_io")) != NULL) {
|
||||
struct device_node *ucc = NULL;
|
||||
|
||||
par_io_init(np);
|
||||
of_node_put(np);
|
||||
|
||||
for ( ;(ucc = of_find_node_by_name(ucc, "ucc")) != NULL;)
|
||||
par_io_of_config(ucc);
|
||||
|
||||
of_node_put(ucc);
|
||||
}
|
||||
|
||||
if (bcsr_regs) {
|
||||
u8 bcsr_phy;
|
||||
|
||||
/* Reset the Ethernet PHY */
|
||||
bcsr_phy = in_be8(&bcsr_regs[9]);
|
||||
bcsr_phy &= ~0x20;
|
||||
out_be8(&bcsr_regs[9], bcsr_phy);
|
||||
|
||||
udelay(1000);
|
||||
|
||||
bcsr_phy = in_be8(&bcsr_regs[9]);
|
||||
bcsr_phy |= 0x20;
|
||||
out_be8(&bcsr_regs[9], bcsr_phy);
|
||||
|
||||
iounmap(bcsr_regs);
|
||||
}
|
||||
|
||||
#endif /* CONFIG_QUICC_ENGINE */
|
||||
}
|
||||
|
||||
static struct of_device_id mpc8568_ids[] = {
|
||||
{ .type = "soc", },
|
||||
{ .compatible = "soc", },
|
||||
{ .type = "qe", },
|
||||
{},
|
||||
};
|
||||
|
||||
static int __init mpc8568_publish_devices(void)
|
||||
{
|
||||
if (!machine_is(mpc8568_mds))
|
||||
return 0;
|
||||
|
||||
/* Publish the QE devices */
|
||||
of_platform_bus_probe(NULL,mpc8568_ids,NULL);
|
||||
|
||||
return 0;
|
||||
}
|
||||
device_initcall(mpc8568_publish_devices);
|
||||
|
||||
static void __init mpc8568_mds_pic_init(void)
|
||||
{
|
||||
struct mpic *mpic;
|
||||
struct resource r;
|
||||
struct device_node *np = NULL;
|
||||
|
||||
np = of_find_node_by_type(NULL, "open-pic");
|
||||
if (!np)
|
||||
return;
|
||||
|
||||
if (of_address_to_resource(np, 0, &r)) {
|
||||
printk(KERN_ERR "Failed to map mpic register space\n");
|
||||
of_node_put(np);
|
||||
return;
|
||||
}
|
||||
|
||||
mpic = mpic_alloc(np, r.start,
|
||||
MPIC_PRIMARY | MPIC_WANTS_RESET | MPIC_BIG_ENDIAN,
|
||||
4, 0, " OpenPIC ");
|
||||
BUG_ON(mpic == NULL);
|
||||
of_node_put(np);
|
||||
|
||||
/* Internal Interrupts */
|
||||
mpic_assign_isu(mpic, 0, r.start + 0x10200);
|
||||
mpic_assign_isu(mpic, 1, r.start + 0x10280);
|
||||
mpic_assign_isu(mpic, 2, r.start + 0x10300);
|
||||
mpic_assign_isu(mpic, 3, r.start + 0x10380);
|
||||
mpic_assign_isu(mpic, 4, r.start + 0x10400);
|
||||
mpic_assign_isu(mpic, 5, r.start + 0x10480);
|
||||
mpic_assign_isu(mpic, 6, r.start + 0x10500);
|
||||
mpic_assign_isu(mpic, 7, r.start + 0x10580);
|
||||
mpic_assign_isu(mpic, 8, r.start + 0x10600);
|
||||
mpic_assign_isu(mpic, 9, r.start + 0x10680);
|
||||
mpic_assign_isu(mpic, 10, r.start + 0x10700);
|
||||
mpic_assign_isu(mpic, 11, r.start + 0x10780);
|
||||
|
||||
/* External Interrupts */
|
||||
mpic_assign_isu(mpic, 12, r.start + 0x10000);
|
||||
mpic_assign_isu(mpic, 13, r.start + 0x10080);
|
||||
mpic_assign_isu(mpic, 14, r.start + 0x10100);
|
||||
|
||||
mpic_init(mpic);
|
||||
|
||||
|
||||
#ifdef CONFIG_QUICC_ENGINE
|
||||
np = of_find_node_by_type(NULL, "qeic");
|
||||
if (!np)
|
||||
return;
|
||||
|
||||
qe_ic_init(np, 0);
|
||||
of_node_put(np);
|
||||
#endif /* CONFIG_QUICC_ENGINE */
|
||||
}
|
||||
|
||||
|
||||
static int __init mpc8568_mds_probe(void)
|
||||
{
|
||||
char *model = of_get_flat_dt_prop(of_get_flat_dt_root(),
|
||||
"model", NULL);
|
||||
if (model == NULL)
|
||||
return 0;
|
||||
if (strcmp(model, "MPC8568EMDS"))
|
||||
return 0;
|
||||
|
||||
DBG("MPC8568EMDS found\n");
|
||||
|
||||
return 1;
|
||||
}
|
||||
|
||||
|
||||
define_machine(mpc8568_mds) {
|
||||
.name = "MPC8568E MDS",
|
||||
.probe = mpc8568_mds_probe,
|
||||
.setup_arch = mpc8568_mds_setup_arch,
|
||||
.init_IRQ = mpc8568_mds_pic_init,
|
||||
.get_irq = mpic_get_irq,
|
||||
.restart = mpc85xx_restart,
|
||||
.calibrate_decr = generic_calibrate_decr,
|
||||
.progress = udbg_progress,
|
||||
};
|
||||
Loading…
Reference in New Issue
Block a user