spi: at91-usart: add DMA support
This patch adds support for DMA. Transfers are done with dma only if they are longer than 16 bytes in order to achieve a better performance. DMA setup introduces a little overhead and for transfers shorter than 16 bytes there is no performance improvement. Signed-off-by: Radu Pirea <radu_nicolae.pirea@upb.ro> Signed-off-by: Mark Brown <broonie@kernel.org>
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f7b99e5948
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c3fdefc2d7
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@ -8,9 +8,12 @@
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#include <linux/clk.h>
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#include <linux/delay.h>
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#include <linux/dmaengine.h>
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#include <linux/dma-direction.h>
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#include <linux/interrupt.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/of_platform.h>
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#include <linux/of_gpio.h>
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#include <linux/pinctrl/consumer.h>
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#include <linux/platform_device.h>
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@ -59,6 +62,8 @@
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#define US_INIT \
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(US_MR_SPI_MASTER | US_MR_CHRL | US_MR_CLKO | US_MR_WRDBT)
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#define US_DMA_MIN_BYTES 16
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#define US_DMA_TIMEOUT (msecs_to_jiffies(1000))
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/* Register access macros */
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#define at91_usart_spi_readl(port, reg) \
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@ -72,14 +77,19 @@
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writeb_relaxed((value), (port)->regs + US_##reg)
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struct at91_usart_spi {
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struct platform_device *mpdev;
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struct spi_transfer *current_transfer;
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void __iomem *regs;
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struct device *dev;
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struct clk *clk;
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struct completion xfer_completion;
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/*used in interrupt to protect data reading*/
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spinlock_t lock;
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phys_addr_t phybase;
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int irq;
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unsigned int current_tx_remaining_bytes;
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unsigned int current_rx_remaining_bytes;
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@ -88,8 +98,182 @@ struct at91_usart_spi {
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u32 status;
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bool xfer_failed;
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bool use_dma;
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};
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static void dma_callback(void *data)
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{
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struct spi_controller *ctlr = data;
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struct at91_usart_spi *aus = spi_master_get_devdata(ctlr);
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at91_usart_spi_writel(aus, IER, US_IR_RXRDY);
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aus->current_rx_remaining_bytes = 0;
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complete(&aus->xfer_completion);
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}
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static bool at91_usart_spi_can_dma(struct spi_controller *ctrl,
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struct spi_device *spi,
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struct spi_transfer *xfer)
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{
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struct at91_usart_spi *aus = spi_master_get_devdata(ctrl);
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return aus->use_dma && xfer->len >= US_DMA_MIN_BYTES;
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}
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static int at91_usart_spi_configure_dma(struct spi_controller *ctlr,
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struct at91_usart_spi *aus)
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{
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struct dma_slave_config slave_config;
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struct device *dev = &aus->mpdev->dev;
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phys_addr_t phybase = aus->phybase;
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dma_cap_mask_t mask;
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int err = 0;
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dma_cap_zero(mask);
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dma_cap_set(DMA_SLAVE, mask);
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ctlr->dma_tx = dma_request_slave_channel_reason(dev, "tx");
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if (IS_ERR_OR_NULL(ctlr->dma_tx)) {
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if (IS_ERR(ctlr->dma_tx)) {
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err = PTR_ERR(ctlr->dma_tx);
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goto at91_usart_spi_error_clear;
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}
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dev_dbg(dev,
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"DMA TX channel not available, SPI unable to use DMA\n");
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err = -EBUSY;
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goto at91_usart_spi_error_clear;
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}
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ctlr->dma_rx = dma_request_slave_channel_reason(dev, "rx");
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if (IS_ERR_OR_NULL(ctlr->dma_rx)) {
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if (IS_ERR(ctlr->dma_rx)) {
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err = PTR_ERR(ctlr->dma_rx);
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goto at91_usart_spi_error;
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}
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dev_dbg(dev,
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"DMA RX channel not available, SPI unable to use DMA\n");
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err = -EBUSY;
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goto at91_usart_spi_error;
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}
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slave_config.dst_addr_width = DMA_SLAVE_BUSWIDTH_1_BYTE;
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slave_config.src_addr_width = DMA_SLAVE_BUSWIDTH_1_BYTE;
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slave_config.dst_addr = (dma_addr_t)phybase + US_THR;
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slave_config.src_addr = (dma_addr_t)phybase + US_RHR;
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slave_config.src_maxburst = 1;
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slave_config.dst_maxburst = 1;
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slave_config.device_fc = false;
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slave_config.direction = DMA_DEV_TO_MEM;
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if (dmaengine_slave_config(ctlr->dma_rx, &slave_config)) {
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dev_err(&ctlr->dev,
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"failed to configure rx dma channel\n");
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err = -EINVAL;
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goto at91_usart_spi_error;
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}
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slave_config.direction = DMA_MEM_TO_DEV;
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if (dmaengine_slave_config(ctlr->dma_tx, &slave_config)) {
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dev_err(&ctlr->dev,
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"failed to configure tx dma channel\n");
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err = -EINVAL;
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goto at91_usart_spi_error;
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}
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aus->use_dma = true;
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return 0;
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at91_usart_spi_error:
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if (!IS_ERR_OR_NULL(ctlr->dma_tx))
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dma_release_channel(ctlr->dma_tx);
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if (!IS_ERR_OR_NULL(ctlr->dma_rx))
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dma_release_channel(ctlr->dma_rx);
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ctlr->dma_tx = NULL;
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ctlr->dma_rx = NULL;
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at91_usart_spi_error_clear:
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return err;
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}
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static void at91_usart_spi_release_dma(struct spi_controller *ctlr)
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{
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if (ctlr->dma_rx)
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dma_release_channel(ctlr->dma_rx);
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if (ctlr->dma_tx)
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dma_release_channel(ctlr->dma_tx);
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}
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static void at91_usart_spi_stop_dma(struct spi_controller *ctlr)
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{
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if (ctlr->dma_rx)
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dmaengine_terminate_all(ctlr->dma_rx);
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if (ctlr->dma_tx)
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dmaengine_terminate_all(ctlr->dma_tx);
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}
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static int at91_usart_spi_dma_transfer(struct spi_controller *ctlr,
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struct spi_transfer *xfer)
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{
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struct at91_usart_spi *aus = spi_master_get_devdata(ctlr);
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struct dma_chan *rxchan = ctlr->dma_rx;
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struct dma_chan *txchan = ctlr->dma_tx;
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struct dma_async_tx_descriptor *rxdesc;
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struct dma_async_tx_descriptor *txdesc;
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dma_cookie_t cookie;
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/* Disable RX interrupt */
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at91_usart_spi_writel(aus, IDR, US_IR_RXRDY);
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rxdesc = dmaengine_prep_slave_sg(rxchan,
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xfer->rx_sg.sgl,
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xfer->rx_sg.nents,
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DMA_DEV_TO_MEM,
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DMA_PREP_INTERRUPT |
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DMA_CTRL_ACK);
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if (!rxdesc)
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goto at91_usart_spi_err_dma;
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txdesc = dmaengine_prep_slave_sg(txchan,
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xfer->tx_sg.sgl,
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xfer->tx_sg.nents,
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DMA_MEM_TO_DEV,
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DMA_PREP_INTERRUPT |
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DMA_CTRL_ACK);
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if (!txdesc)
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goto at91_usart_spi_err_dma;
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rxdesc->callback = dma_callback;
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rxdesc->callback_param = ctlr;
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cookie = rxdesc->tx_submit(rxdesc);
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if (dma_submit_error(cookie))
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goto at91_usart_spi_err_dma;
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cookie = txdesc->tx_submit(txdesc);
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if (dma_submit_error(cookie))
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goto at91_usart_spi_err_dma;
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rxchan->device->device_issue_pending(rxchan);
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txchan->device->device_issue_pending(txchan);
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return 0;
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at91_usart_spi_err_dma:
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/* Enable RX interrupt if something fails and fallback to PIO */
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at91_usart_spi_writel(aus, IER, US_IR_RXRDY);
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at91_usart_spi_stop_dma(ctlr);
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return -ENOMEM;
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}
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static unsigned long at91_usart_spi_dma_timeout(struct at91_usart_spi *aus)
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{
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return wait_for_completion_timeout(&aus->xfer_completion,
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US_DMA_TIMEOUT);
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}
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static inline u32 at91_usart_spi_tx_ready(struct at91_usart_spi *aus)
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{
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return aus->status & US_IR_TXRDY;
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@ -216,6 +400,8 @@ static int at91_usart_spi_transfer_one(struct spi_controller *ctlr,
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struct spi_transfer *xfer)
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{
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struct at91_usart_spi *aus = spi_master_get_devdata(ctlr);
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unsigned long dma_timeout = 0;
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int ret = 0;
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at91_usart_spi_set_xfer_speed(aus, xfer);
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aus->xfer_failed = false;
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while ((aus->current_tx_remaining_bytes ||
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aus->current_rx_remaining_bytes) && !aus->xfer_failed) {
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at91_usart_spi_read_status(aus);
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at91_usart_spi_tx(aus);
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reinit_completion(&aus->xfer_completion);
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if (at91_usart_spi_can_dma(ctlr, spi, xfer) &&
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!ret) {
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ret = at91_usart_spi_dma_transfer(ctlr, xfer);
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if (ret)
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continue;
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dma_timeout = at91_usart_spi_dma_timeout(aus);
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if (WARN_ON(dma_timeout == 0)) {
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dev_err(&spi->dev, "DMA transfer timeout\n");
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return -EIO;
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}
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aus->current_tx_remaining_bytes = 0;
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} else {
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at91_usart_spi_read_status(aus);
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at91_usart_spi_tx(aus);
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}
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cpu_relax();
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}
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@ -345,6 +548,7 @@ static int at91_usart_spi_probe(struct platform_device *pdev)
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controller->transfer_one = at91_usart_spi_transfer_one;
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controller->prepare_message = at91_usart_spi_prepare_message;
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controller->unprepare_message = at91_usart_spi_unprepare_message;
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controller->can_dma = at91_usart_spi_can_dma;
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controller->cleanup = at91_usart_spi_cleanup;
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controller->max_speed_hz = DIV_ROUND_UP(clk_get_rate(clk),
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US_MIN_CLK_DIV);
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@ -376,7 +580,17 @@ static int at91_usart_spi_probe(struct platform_device *pdev)
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aus->spi_clk = clk_get_rate(clk);
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at91_usart_spi_init(aus);
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aus->phybase = regs->start;
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aus->mpdev = to_platform_device(pdev->dev.parent);
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ret = at91_usart_spi_configure_dma(controller, aus);
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if (ret)
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goto at91_usart_fail_dma;
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spin_lock_init(&aus->lock);
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init_completion(&aus->xfer_completion);
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ret = devm_spi_register_master(&pdev->dev, controller);
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if (ret)
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goto at91_usart_fail_register_master;
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@ -389,6 +603,8 @@ static int at91_usart_spi_probe(struct platform_device *pdev)
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return 0;
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at91_usart_fail_register_master:
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at91_usart_spi_release_dma(controller);
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at91_usart_fail_dma:
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clk_disable_unprepare(clk);
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at91_usart_spi_probe_fail:
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spi_master_put(controller);
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@ -453,6 +669,7 @@ static int at91_usart_spi_remove(struct platform_device *pdev)
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struct spi_controller *ctlr = platform_get_drvdata(pdev);
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struct at91_usart_spi *aus = spi_master_get_devdata(ctlr);
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at91_usart_spi_release_dma(ctlr);
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clk_disable_unprepare(aus->clk);
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return 0;
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