remove hwsw_dma_ops
This removes remove hwsw_dma_ops (and hwsw_* functions). hwsw_dma_get_ops can select swiotlb_dma_ops and sba_dma_ops appropriately. Signed-off-by: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp> Acked-by: Tony Luck <tony.luck@intel.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
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@ -17,55 +17,33 @@
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#include <linux/swiotlb.h>
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#include <asm/machvec.h>
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extern struct dma_mapping_ops sba_dma_ops, swiotlb_dma_ops;
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/* swiotlb declarations & definitions: */
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extern int swiotlb_late_init_with_default_size (size_t size);
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/* hwiommu declarations & definitions: */
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extern void *sba_alloc_coherent(struct device *, size_t, dma_addr_t *, gfp_t);
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extern void sba_free_coherent (struct device *, size_t, void *, dma_addr_t);
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extern dma_addr_t sba_map_single_attrs(struct device *, void *, size_t, int,
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struct dma_attrs *);
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extern void sba_unmap_single_attrs(struct device *, dma_addr_t, size_t, int,
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struct dma_attrs *);
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extern int sba_map_sg_attrs(struct device *, struct scatterlist *, int, int,
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struct dma_attrs *);
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extern void sba_unmap_sg_attrs(struct device *, struct scatterlist *, int, int,
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struct dma_attrs *);
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extern int sba_dma_supported (struct device *, u64);
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extern int sba_dma_mapping_error(struct device *, dma_addr_t);
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#define hwiommu_alloc_coherent sba_alloc_coherent
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#define hwiommu_free_coherent sba_free_coherent
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#define hwiommu_map_single_attrs sba_map_single_attrs
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#define hwiommu_unmap_single_attrs sba_unmap_single_attrs
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#define hwiommu_map_sg_attrs sba_map_sg_attrs
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#define hwiommu_unmap_sg_attrs sba_unmap_sg_attrs
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#define hwiommu_dma_supported sba_dma_supported
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#define hwiommu_dma_mapping_error sba_dma_mapping_error
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#define hwiommu_sync_single_for_cpu machvec_dma_sync_single
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#define hwiommu_sync_sg_for_cpu machvec_dma_sync_sg
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#define hwiommu_sync_single_for_device machvec_dma_sync_single
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#define hwiommu_sync_sg_for_device machvec_dma_sync_sg
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/*
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* Note: we need to make the determination of whether or not to use
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* the sw I/O TLB based purely on the device structure. Anything else
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* would be unreliable or would be too intrusive.
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*/
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static inline int
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use_swiotlb (struct device *dev)
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static inline int use_swiotlb(struct device *dev)
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{
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return dev && dev->dma_mask && !hwiommu_dma_supported(dev, *dev->dma_mask);
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return dev && dev->dma_mask &&
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!sba_dma_ops.dma_supported_op(dev, *dev->dma_mask);
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}
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struct dma_mapping_ops hwsw_dma_ops;
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struct dma_mapping_ops *hwsw_dma_get_ops(struct device *dev)
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{
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if (use_swiotlb(dev))
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return &swiotlb_dma_ops;
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return &sba_dma_ops;
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}
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EXPORT_SYMBOL(hwsw_dma_get_ops);
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void __init
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hwsw_init (void)
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{
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dma_ops = &hwsw_dma_ops;
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/* default to a smallish 2MB sw I/O TLB */
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if (swiotlb_late_init_with_default_size (2 * (1<<20)) != 0) {
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#ifdef CONFIG_IA64_GENERIC
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@ -78,140 +56,3 @@ hwsw_init (void)
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#endif
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}
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}
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void *
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hwsw_alloc_coherent (struct device *dev, size_t size, dma_addr_t *dma_handle, gfp_t flags)
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{
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if (use_swiotlb(dev))
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return swiotlb_alloc_coherent(dev, size, dma_handle, flags);
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else
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return hwiommu_alloc_coherent(dev, size, dma_handle, flags);
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}
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void
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hwsw_free_coherent (struct device *dev, size_t size, void *vaddr, dma_addr_t dma_handle)
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{
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if (use_swiotlb(dev))
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swiotlb_free_coherent(dev, size, vaddr, dma_handle);
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else
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hwiommu_free_coherent(dev, size, vaddr, dma_handle);
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}
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dma_addr_t
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hwsw_map_single_attrs(struct device *dev, void *addr, size_t size, int dir,
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struct dma_attrs *attrs)
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{
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if (use_swiotlb(dev))
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return swiotlb_map_single_attrs(dev, addr, size, dir, attrs);
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else
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return hwiommu_map_single_attrs(dev, addr, size, dir, attrs);
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}
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EXPORT_SYMBOL(hwsw_map_single_attrs);
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void
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hwsw_unmap_single_attrs(struct device *dev, dma_addr_t iova, size_t size,
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int dir, struct dma_attrs *attrs)
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{
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if (use_swiotlb(dev))
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return swiotlb_unmap_single_attrs(dev, iova, size, dir, attrs);
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else
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return hwiommu_unmap_single_attrs(dev, iova, size, dir, attrs);
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}
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EXPORT_SYMBOL(hwsw_unmap_single_attrs);
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int
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hwsw_map_sg_attrs(struct device *dev, struct scatterlist *sglist, int nents,
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int dir, struct dma_attrs *attrs)
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{
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if (use_swiotlb(dev))
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return swiotlb_map_sg_attrs(dev, sglist, nents, dir, attrs);
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else
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return hwiommu_map_sg_attrs(dev, sglist, nents, dir, attrs);
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}
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EXPORT_SYMBOL(hwsw_map_sg_attrs);
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void
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hwsw_unmap_sg_attrs(struct device *dev, struct scatterlist *sglist, int nents,
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int dir, struct dma_attrs *attrs)
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{
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if (use_swiotlb(dev))
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return swiotlb_unmap_sg_attrs(dev, sglist, nents, dir, attrs);
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else
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return hwiommu_unmap_sg_attrs(dev, sglist, nents, dir, attrs);
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}
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EXPORT_SYMBOL(hwsw_unmap_sg_attrs);
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void
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hwsw_sync_single_for_cpu (struct device *dev, dma_addr_t addr, size_t size, int dir)
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{
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if (use_swiotlb(dev))
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swiotlb_sync_single_for_cpu(dev, addr, size, dir);
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else
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hwiommu_sync_single_for_cpu(dev, addr, size, dir);
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}
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void
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hwsw_sync_sg_for_cpu (struct device *dev, struct scatterlist *sg, int nelems, int dir)
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{
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if (use_swiotlb(dev))
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swiotlb_sync_sg_for_cpu(dev, sg, nelems, dir);
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else
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hwiommu_sync_sg_for_cpu(dev, sg, nelems, dir);
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}
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void
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hwsw_sync_single_for_device (struct device *dev, dma_addr_t addr, size_t size, int dir)
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{
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if (use_swiotlb(dev))
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swiotlb_sync_single_for_device(dev, addr, size, dir);
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else
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hwiommu_sync_single_for_device(dev, addr, size, dir);
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}
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void
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hwsw_sync_sg_for_device (struct device *dev, struct scatterlist *sg, int nelems, int dir)
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{
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if (use_swiotlb(dev))
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swiotlb_sync_sg_for_device(dev, sg, nelems, dir);
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else
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hwiommu_sync_sg_for_device(dev, sg, nelems, dir);
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}
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int
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hwsw_dma_supported (struct device *dev, u64 mask)
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{
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if (hwiommu_dma_supported(dev, mask))
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return 1;
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return swiotlb_dma_supported(dev, mask);
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}
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int
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hwsw_dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
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{
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return hwiommu_dma_mapping_error(dev, dma_addr) ||
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swiotlb_dma_mapping_error(dev, dma_addr);
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}
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EXPORT_SYMBOL(hwsw_dma_mapping_error);
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EXPORT_SYMBOL(hwsw_dma_supported);
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EXPORT_SYMBOL(hwsw_alloc_coherent);
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EXPORT_SYMBOL(hwsw_free_coherent);
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EXPORT_SYMBOL(hwsw_sync_single_for_cpu);
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EXPORT_SYMBOL(hwsw_sync_single_for_device);
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EXPORT_SYMBOL(hwsw_sync_sg_for_cpu);
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EXPORT_SYMBOL(hwsw_sync_sg_for_device);
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struct dma_mapping_ops hwsw_dma_ops = {
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.alloc_coherent = hwsw_alloc_coherent,
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.free_coherent = hwsw_free_coherent,
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.map_single_attrs = hwsw_map_single_attrs,
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.unmap_single_attrs = hwsw_unmap_single_attrs,
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.map_sg_attrs = hwsw_map_sg_attrs,
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.unmap_sg_attrs = hwsw_unmap_sg_attrs,
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.sync_single_for_cpu = hwsw_sync_single_for_cpu,
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.sync_sg_for_cpu = hwsw_sync_sg_for_cpu,
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.sync_single_for_device = hwsw_sync_single_for_device,
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.sync_sg_for_device = hwsw_sync_sg_for_device,
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.dma_supported_op = hwsw_dma_supported,
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.mapping_error = hwsw_dma_mapping_error,
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};
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@ -2,6 +2,7 @@
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#define _ASM_IA64_MACHVEC_HPZX1_SWIOTLB_h
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extern ia64_mv_setup_t dig_setup;
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extern ia64_mv_dma_get_ops hwsw_dma_get_ops;
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/*
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* This stuff has dual use!
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@ -13,5 +14,6 @@ extern ia64_mv_setup_t dig_setup;
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#define platform_name "hpzx1_swiotlb"
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#define platform_setup dig_setup
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#define platform_dma_init machvec_noop
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#define platform_dma_get_ops hwsw_dma_get_ops
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#endif /* _ASM_IA64_MACHVEC_HPZX1_SWIOTLB_h */
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