luck/tmp_suning_uos_patched
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sh: Kill off legacy UBC wakeup cruft.

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This code was added for some ancient SH-4 solution engines with peculiar
boot ROMs that did silly things to the UBC MSTP bits. None of these have
been in the wild for years, and these days the clock framework wraps up
the MSTP bits, meaning that the UBC code is one of the few interfaces
that is stomping MSTP bits underneath the clock framework. At this point
the risks far outweigh any benefit this code provided, so just kill it
off.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This commit is contained in:
Paul Mundt 2009-10-16 18:20:42 +09:00
parent 78aed4a63a
commit cae19b5902
5 changed files with 0 additions and 93 deletions
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11
arch/sh/Kconfig
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@ -757,17 +757,6 @@ config ENTRY_OFFSET
default "0x00010000" if PAGE_SIZE_64KB
default "0x00000000"
config UBC_WAKEUP
bool "Wakeup UBC on startup"
depends on CPU_SH4 && !CPU_SH4A
help
Selecting this option will wakeup the User Break Controller (UBC) on
startup. Although the UBC is left in an awake state when the processor
comes up, some boot loaders misbehave by putting the UBC to sleep in a
power saving state, which causes issues with things like ptrace().
If unsure, say N.
choice
prompt "Kernel command line"
optional

11
arch/sh/include/asm/ubc.h
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@ -60,16 +60,5 @@
#define BRCR_UBDE (1 << 0)
#endif
#ifndef __ASSEMBLY__
/* arch/sh/kernel/cpu/ubc.S */
extern void ubc_sleep(void);
#ifdef CONFIG_UBC_WAKEUP
extern void ubc_wakeup(void);
#else
#define ubc_wakeup() do { } while (0)
#endif
#endif
#endif /* __KERNEL__ */
#endif /* __ASM_SH_UBC_H */

1
arch/sh/kernel/cpu/Makefile
View File

@ -15,7 +15,6 @@ obj-$(CONFIG_ARCH_SHMOBILE) += shmobile/
# Common interfaces.
obj-$(CONFIG_UBC_WAKEUP) += ubc.o
obj-$(CONFIG_SH_ADC) += adc.o
obj-$(CONFIG_SH_CLK_CPG) += clock-cpg.o

11
arch/sh/kernel/cpu/init.c
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@ -338,17 +338,6 @@ asmlinkage void __init sh_cpu_init(void)
}
#endif
/*
* Some brain-damaged loaders decided it would be a good idea to put
* the UBC to sleep. This causes some issues when it comes to things
* like PTRACE_SINGLESTEP or doing hardware watchpoints in GDB. So ..
* we wake it up and hope that all is well.
*/
#ifdef CONFIG_SUPERH32
if (raw_smp_processor_id() == 0)
ubc_wakeup();
#endif
speculative_execution_init();
expmask_init();
}

59
arch/sh/kernel/cpu/ubc.S
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@ -1,59 +0,0 @@
/*
* arch/sh/kernel/cpu/ubc.S
*
* Set of management routines for the User Break Controller (UBC)
*
* Copyright (C) 2002 Paul Mundt
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*/
#include <linux/linkage.h>
#include <asm/ubc.h>
#define STBCR2 0xffc00010
ENTRY(ubc_sleep)
mov #0, r0
mov.l 1f, r1 ! Zero out UBC_BBRA ..
mov.w r0, @r1
mov.l 2f, r1 ! .. same for BBRB ..
mov.w r0, @r1
mov.l 3f, r1 ! .. and again for BRCR.
mov.w r0, @r1
mov.w @r1, r0 ! Dummy read BRCR
mov.l 4f, r1 ! Set MSTP5 in STBCR2
mov.b @r1, r0
or #0x01, r0
mov.b r0, @r1
mov.b @r1, r0 ! Two dummy reads ..
mov.b @r1, r0
rts
nop
ENTRY(ubc_wakeup)
mov.l 4f, r1 ! Clear MSTP5
mov.b @r1, r0
and #0xfe, r0
mov.b r0, @r1
mov.b @r1, r0 ! Two more dummy reads ..
mov.b @r1, r0
rts
nop
1: .long UBC_BBRA
2: .long UBC_BBRB
3: .long UBC_BRCR
4: .long STBCR2