Another latent bug related to PCID, an out-of-bounds access,
and a submaintainer change being finally made official. -----BEGIN PGP SIGNATURE----- Version: GnuPG v2.0.22 (GNU/Linux) iQEcBAABAgAGBQJZ31h8AAoJEL/70l94x66DR74H/jPtBYV77TZw0xMbqXmoFaiQ fmq/knkj6uLcQ/i80HqhQZEaoo+McgknzVXBSlAL2JyNPcSRqye7zolIOahq7yya tjvbqu0+g1n9YxPIgcPxghb/Ye1cs9VkSRf4xtvInl4BEiOZdmYvI7v87enUAKdO PbLaht4VCk3jVpeL/oSEhZYadlP6fRsxCkwiBc6nM+P7Sbo92FHJpaRfbjc4mqw0 BGKQvSiLWv3cZpf2dw7t+eiFjDamIR/5XI0eJhugYA+8DsG5PiPvqBffkskjNW19 mfLqiu9/Zl3O0y1oBRj0xLqFsDWH2UNe0HNszr1T/ayDLn07aWvAxH71EEc6Yu0= =i1Gv -----END PGP SIGNATURE----- Merge tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm Pull kvm fixes from Paolo Bonzini: "Another latent bug related to PCID, an out-of-bounds access, and a submaintainer change being finally made official" * tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm: MAINTAINERS: Add Paul Mackerras as maintainer for KVM/powerpc KVM: nVMX: fix guest CR4 loading when emulating L2 to L1 exit KVM: MMU: always terminate page walks at level 1 KVM: nVMX: update last_nonleaf_level when initializing nested EPT
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commit
cbaff8763d
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@ -7571,7 +7571,7 @@ F: arch/mips/include/asm/kvm*
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F: arch/mips/kvm/
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KERNEL VIRTUAL MACHINE FOR POWERPC (KVM/powerpc)
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M: Alexander Graf <agraf@suse.com>
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M: Paul Mackerras <paulus@ozlabs.org>
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L: kvm-ppc@vger.kernel.org
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W: http://www.linux-kvm.org/
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T: git git://github.com/agraf/linux-2.6.git
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@ -3973,13 +3973,6 @@ static bool sync_mmio_spte(struct kvm_vcpu *vcpu, u64 *sptep, gfn_t gfn,
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static inline bool is_last_gpte(struct kvm_mmu *mmu,
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unsigned level, unsigned gpte)
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{
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/*
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* PT_PAGE_TABLE_LEVEL always terminates. The RHS has bit 7 set
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* iff level <= PT_PAGE_TABLE_LEVEL, which for our purpose means
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* level == PT_PAGE_TABLE_LEVEL; set PT_PAGE_SIZE_MASK in gpte then.
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*/
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gpte |= level - PT_PAGE_TABLE_LEVEL - 1;
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/*
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* The RHS has bit 7 set iff level < mmu->last_nonleaf_level.
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* If it is clear, there are no large pages at this level, so clear
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@ -3987,6 +3980,13 @@ static inline bool is_last_gpte(struct kvm_mmu *mmu,
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*/
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gpte &= level - mmu->last_nonleaf_level;
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/*
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* PT_PAGE_TABLE_LEVEL always terminates. The RHS has bit 7 set
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* iff level <= PT_PAGE_TABLE_LEVEL, which for our purpose means
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* level == PT_PAGE_TABLE_LEVEL; set PT_PAGE_SIZE_MASK in gpte then.
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*/
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gpte |= level - PT_PAGE_TABLE_LEVEL - 1;
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return gpte & PT_PAGE_SIZE_MASK;
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}
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@ -4555,6 +4555,7 @@ void kvm_init_shadow_ept_mmu(struct kvm_vcpu *vcpu, bool execonly,
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update_permission_bitmask(vcpu, context, true);
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update_pkru_bitmask(vcpu, context, true);
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update_last_nonleaf_level(vcpu, context);
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reset_rsvds_bits_mask_ept(vcpu, context, execonly);
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reset_ept_shadow_zero_bits_mask(vcpu, context, execonly);
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}
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@ -334,10 +334,11 @@ static int FNAME(walk_addr_generic)(struct guest_walker *walker,
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--walker->level;
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index = PT_INDEX(addr, walker->level);
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table_gfn = gpte_to_gfn(pte);
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offset = index * sizeof(pt_element_t);
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pte_gpa = gfn_to_gpa(table_gfn) + offset;
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BUG_ON(walker->level < 1);
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walker->table_gfn[walker->level - 1] = table_gfn;
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walker->pte_gpa[walker->level - 1] = pte_gpa;
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@ -11297,7 +11297,7 @@ static void load_vmcs12_host_state(struct kvm_vcpu *vcpu,
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/* Same as above - no reason to call set_cr4_guest_host_mask(). */
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vcpu->arch.cr4_guest_owned_bits = ~vmcs_readl(CR4_GUEST_HOST_MASK);
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kvm_set_cr4(vcpu, vmcs12->host_cr4);
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vmx_set_cr4(vcpu, vmcs12->host_cr4);
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nested_ept_uninit_mmu_context(vcpu);
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