mtd: rawnand: atmel: add sam9x60 nand controller support
The sam9x60 board defines the CCFG_EBICSA register under SFR, and not as a MATRIX register, as previous boards do. NAND Flash I/Os are connected to D16–D23, thus SFR_CCFG_EBICSA.NFD0_ON_D16 is set to 1. Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
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@ -65,6 +65,7 @@
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#include <linux/iopoll.h>
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#include <linux/platform_device.h>
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#include <linux/regmap.h>
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#include <soc/at91/atmel-sfr.h>
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#include "pmecc.h"
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@ -232,10 +233,15 @@ to_nand_controller(struct nand_controller *ctl)
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return container_of(ctl, struct atmel_nand_controller, base);
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}
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struct atmel_smc_nand_ebi_csa_cfg {
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u32 offs;
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u32 nfd0_on_d16;
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};
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struct atmel_smc_nand_controller {
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struct atmel_nand_controller base;
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struct regmap *ebi_csa_regmap;
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unsigned int ebi_csa_offs;
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struct atmel_smc_nand_ebi_csa_cfg *ebi_csa;
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};
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static inline struct atmel_smc_nand_controller *
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@ -1513,8 +1519,15 @@ static void atmel_smc_nand_init(struct atmel_nand_controller *nc,
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/* Attach the CS to the NAND Flash logic. */
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for (i = 0; i < nand->numcs; i++)
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regmap_update_bits(smc_nc->ebi_csa_regmap, smc_nc->ebi_csa_offs,
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regmap_update_bits(smc_nc->ebi_csa_regmap,
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smc_nc->ebi_csa->offs,
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BIT(nand->cs[i].id), BIT(nand->cs[i].id));
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if (smc_nc->ebi_csa->nfd0_on_d16)
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regmap_update_bits(smc_nc->ebi_csa_regmap,
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smc_nc->ebi_csa->offs,
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smc_nc->ebi_csa->nfd0_on_d16,
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smc_nc->ebi_csa->nfd0_on_d16);
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}
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static void atmel_hsmc_nand_init(struct atmel_nand_controller *nc,
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@ -1834,34 +1847,71 @@ static void atmel_nand_controller_cleanup(struct atmel_nand_controller *nc)
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clk_put(nc->mck);
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}
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static const struct atmel_smc_nand_ebi_csa_cfg at91sam9260_ebi_csa = {
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.offs = AT91SAM9260_MATRIX_EBICSA,
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};
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static const struct atmel_smc_nand_ebi_csa_cfg at91sam9261_ebi_csa = {
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.offs = AT91SAM9261_MATRIX_EBICSA,
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};
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static const struct atmel_smc_nand_ebi_csa_cfg at91sam9263_ebi_csa = {
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.offs = AT91SAM9263_MATRIX_EBI0CSA,
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};
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static const struct atmel_smc_nand_ebi_csa_cfg at91sam9rl_ebi_csa = {
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.offs = AT91SAM9RL_MATRIX_EBICSA,
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};
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static const struct atmel_smc_nand_ebi_csa_cfg at91sam9g45_ebi_csa = {
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.offs = AT91SAM9G45_MATRIX_EBICSA,
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};
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static const struct atmel_smc_nand_ebi_csa_cfg at91sam9n12_ebi_csa = {
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.offs = AT91SAM9N12_MATRIX_EBICSA,
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};
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static const struct atmel_smc_nand_ebi_csa_cfg at91sam9x5_ebi_csa = {
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.offs = AT91SAM9X5_MATRIX_EBICSA,
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};
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static const struct atmel_smc_nand_ebi_csa_cfg sam9x60_ebi_csa = {
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.offs = AT91_SFR_CCFG_EBICSA,
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.nfd0_on_d16 = AT91_SFR_CCFG_NFD0_ON_D16,
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};
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static const struct of_device_id atmel_ebi_csa_regmap_of_ids[] = {
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{
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.compatible = "atmel,at91sam9260-matrix",
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.data = (void *)AT91SAM9260_MATRIX_EBICSA,
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.data = &at91sam9260_ebi_csa,
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},
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{
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.compatible = "atmel,at91sam9261-matrix",
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.data = (void *)AT91SAM9261_MATRIX_EBICSA,
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.data = &at91sam9261_ebi_csa,
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},
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{
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.compatible = "atmel,at91sam9263-matrix",
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.data = (void *)AT91SAM9263_MATRIX_EBI0CSA,
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.data = &at91sam9263_ebi_csa,
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},
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{
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.compatible = "atmel,at91sam9rl-matrix",
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.data = (void *)AT91SAM9RL_MATRIX_EBICSA,
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.data = &at91sam9rl_ebi_csa,
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},
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{
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.compatible = "atmel,at91sam9g45-matrix",
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.data = (void *)AT91SAM9G45_MATRIX_EBICSA,
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.data = &at91sam9g45_ebi_csa,
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},
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{
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.compatible = "atmel,at91sam9n12-matrix",
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.data = (void *)AT91SAM9N12_MATRIX_EBICSA,
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.data = &at91sam9n12_ebi_csa,
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},
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{
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.compatible = "atmel,at91sam9x5-matrix",
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.data = (void *)AT91SAM9X5_MATRIX_EBICSA,
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.data = &at91sam9x5_ebi_csa,
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},
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{
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.compatible = "microchip,sam9x60-sfr",
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.data = &sam9x60_ebi_csa,
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},
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{ /* sentinel */ },
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};
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@ -2006,15 +2056,15 @@ atmel_smc_nand_controller_init(struct atmel_smc_nand_controller *nc)
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return ret;
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}
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nc->ebi_csa_offs = (uintptr_t)match->data;
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nc->ebi_csa = (struct atmel_smc_nand_ebi_csa_cfg *)match->data;
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/*
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* The at91sam9263 has 2 EBIs, if the NAND controller is under EBI1
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* add 4 to ->ebi_csa_offs.
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* add 4 to ->ebi_csa->offs.
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*/
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if (of_device_is_compatible(dev->parent->of_node,
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"atmel,at91sam9263-ebi1"))
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nc->ebi_csa_offs += 4;
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nc->ebi_csa->offs += 4;
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return 0;
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}
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@ -2377,6 +2427,14 @@ static const struct atmel_nand_controller_caps atmel_sam9g45_nc_caps = {
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.ops = &atmel_smc_nc_ops,
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};
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static const struct atmel_nand_controller_caps microchip_sam9x60_nc_caps = {
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.has_dma = true,
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.ale_offs = BIT(21),
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.cle_offs = BIT(22),
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.ebi_csa_regmap_name = "microchip,sfr",
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.ops = &atmel_smc_nc_ops,
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};
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/* Only used to parse old bindings. */
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static const struct atmel_nand_controller_caps atmel_rm9200_nand_caps = {
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.ale_offs = BIT(21),
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@ -2421,6 +2479,10 @@ static const struct of_device_id atmel_nand_controller_of_ids[] = {
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.compatible = "atmel,sama5d3-nand-controller",
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.data = &atmel_sama5_nc_caps,
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},
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{
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.compatible = "microchip,sam9x60-nand-controller",
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.data = µchip_sam9x60_nc_caps,
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},
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/* Support for old/deprecated bindings: */
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{
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.compatible = "atmel,at91rm9200-nand",
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