mtd/ps3vram: Add ps3vram driver for accessing video RAM as MTD
Add ps3vram driver, which exposes unused video RAM on the PS3 as a MTD device suitable for storage or swap. Fast data transfer is achieved using a local cache in system RAM and DMA transfers via the GPU. Signed-off-by: Vivien Chappelier <vivien.chappelier@free.fr> Signed-off-by: Jim Paris <jim@jtan.com> Acked-by: Geoff Levand <geoffrey.levand@am.sony.com> Acked-by: David Woodhouse <David.Woodhouse@intel.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
This commit is contained in:
Jim Paris
Benjamin Herrenschmidt
parent
d2b4397bf8
commit
cffb4add03
@ -3484,6 +3484,12 @@ L: linuxppc-dev@ozlabs.org
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L: cbe-oss-dev@ozlabs.org
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S: Supported
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PS3VRAM DRIVER
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P: Jim Paris
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M: jim@jtan.com
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L: cbe-oss-dev@ozlabs.org
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S: Maintained
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PVRUSB2 VIDEO4LINUX DRIVER
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P: Mike Isely
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M: isely@pobox.com
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@ -320,6 +320,7 @@ enum ps3_match_id {
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enum ps3_match_sub_id {
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PS3_MATCH_SUB_ID_GPU_FB = 1,
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PS3_MATCH_SUB_ID_GPU_RAMDISK = 2,
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};
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#define PS3_MODULE_ALIAS_EHCI "ps3:1:0"
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@ -518,6 +518,41 @@ static int __init ps3_register_graphics_devices(void)
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return result;
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}
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static int __init ps3_register_ramdisk_device(void)
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{
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int result;
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struct layout {
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struct ps3_system_bus_device dev;
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} *p;
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pr_debug(" -> %s:%d\n", __func__, __LINE__);
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p = kzalloc(sizeof(struct layout), GFP_KERNEL);
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if (!p)
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return -ENOMEM;
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p->dev.match_id = PS3_MATCH_ID_GPU;
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p->dev.match_sub_id = PS3_MATCH_SUB_ID_GPU_RAMDISK;
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p->dev.dev_type = PS3_DEVICE_TYPE_IOC0;
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result = ps3_system_bus_device_register(&p->dev);
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if (result) {
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pr_debug("%s:%d ps3_system_bus_device_register failed\n",
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__func__, __LINE__);
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goto fail_device_register;
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}
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pr_debug(" <- %s:%d\n", __func__, __LINE__);
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return 0;
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fail_device_register:
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kfree(p);
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pr_debug(" <- %s:%d failed\n", __func__, __LINE__);
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return result;
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}
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/**
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* ps3_setup_dynamic_device - Setup a dynamic device from the repository
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*/
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@ -946,6 +981,8 @@ static int __init ps3_register_devices(void)
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ps3_register_lpm_devices();
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ps3_register_ramdisk_device();
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pr_debug(" <- %s:%d\n", __func__, __LINE__);
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return 0;
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}
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@ -120,6 +120,13 @@ config MTD_PHRAM
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doesn't have access to, memory beyond the mem=xxx limit, nvram,
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memory on the video card, etc...
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config MTD_PS3VRAM
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tristate "PS3 video RAM"
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depends on FB_PS3
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help
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This driver allows you to use excess PS3 video RAM as volatile
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storage or system swap.
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config MTD_LART
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tristate "28F160xx flash driver for LART"
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depends on SA1100_LART
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@ -16,3 +16,4 @@ obj-$(CONFIG_MTD_LART) += lart.o
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obj-$(CONFIG_MTD_BLOCK2MTD) += block2mtd.o
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obj-$(CONFIG_MTD_DATAFLASH) += mtd_dataflash.o
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obj-$(CONFIG_MTD_M25P80) += m25p80.o
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obj-$(CONFIG_MTD_PS3VRAM) += ps3vram.o
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776
drivers/mtd/devices/ps3vram.c
Normal file
776
drivers/mtd/devices/ps3vram.c
Normal file
@ -0,0 +1,776 @@
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/**
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* ps3vram - Use extra PS3 video ram as MTD block device.
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*
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* Copyright (c) 2007-2008 Jim Paris <jim@jtan.com>
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* Added support RSX DMA Vivien Chappelier <vivien.chappelier@free.fr>
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*/
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#include <linux/io.h>
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#include <linux/init.h>
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#include <linux/kernel.h>
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#include <linux/list.h>
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#include <linux/module.h>
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#include <linux/moduleparam.h>
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#include <linux/slab.h>
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#include <linux/version.h>
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#include <linux/gfp.h>
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#include <linux/delay.h>
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#include <linux/mtd/mtd.h>
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#include <asm/lv1call.h>
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#include <asm/ps3.h>
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#define DEVICE_NAME "ps3vram"
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#define XDR_BUF_SIZE (2 * 1024 * 1024) /* XDR buffer (must be 1MiB aligned) */
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#define XDR_IOIF 0x0c000000
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#define FIFO_BASE XDR_IOIF
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#define FIFO_SIZE (64 * 1024)
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#define DMA_PAGE_SIZE (4 * 1024)
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#define CACHE_PAGE_SIZE (256 * 1024)
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#define CACHE_PAGE_COUNT ((XDR_BUF_SIZE - FIFO_SIZE) / CACHE_PAGE_SIZE)
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#define CACHE_OFFSET CACHE_PAGE_SIZE
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#define FIFO_OFFSET 0
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#define CTRL_PUT 0x10
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#define CTRL_GET 0x11
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#define CTRL_TOP 0x15
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#define UPLOAD_SUBCH 1
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#define DOWNLOAD_SUBCH 2
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#define NV_MEMORY_TO_MEMORY_FORMAT_OFFSET_IN 0x0000030c
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#define NV_MEMORY_TO_MEMORY_FORMAT_NOTIFY 0x00000104
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#define L1GPU_CONTEXT_ATTRIBUTE_FB_BLIT 0x601
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struct mtd_info ps3vram_mtd;
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#define CACHE_PAGE_PRESENT 1
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#define CACHE_PAGE_DIRTY 2
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#define dbg(fmt, args...) \
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pr_debug("%s:%d " fmt "\n", __func__, __LINE__, ## args)
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struct ps3vram_tag {
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unsigned int address;
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unsigned int flags;
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};
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struct ps3vram_cache {
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unsigned int page_count;
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unsigned int page_size;
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struct ps3vram_tag *tags;
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};
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struct ps3vram_priv {
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uint64_t memory_handle;
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uint64_t context_handle;
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uint8_t *base;
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uint32_t *ctrl;
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uint32_t *reports;
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uint8_t *xdr_buf;
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uint32_t *fifo_base;
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uint32_t *fifo_ptr;
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struct ps3vram_cache cache;
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/* Used to serialize cache/DMA operations */
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struct mutex lock;
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};
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#define DMA_NOTIFIER_HANDLE_BASE 0x66604200 /* first DMA notifier handle */
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#define DMA_NOTIFIER_OFFSET_BASE 0x1000 /* first DMA notifier offset */
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#define DMA_NOTIFIER_SIZE 0x40
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#define NUM_NOTIFIERS 16
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#define NOTIFIER 7 /* notifier used for completion report */
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/* A trailing '-' means to subtract off ps3fb_videomemory.size */
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char *size = "256M-";
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module_param(size, charp, 0);
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MODULE_PARM_DESC(size, "memory size");
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static inline uint32_t *ps3vram_get_notifier(uint32_t *reports, int notifier)
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{
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return (void *) reports +
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DMA_NOTIFIER_OFFSET_BASE +
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DMA_NOTIFIER_SIZE * notifier;
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}
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static void ps3vram_notifier_reset(struct mtd_info *mtd)
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{
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int i;
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struct ps3vram_priv *priv = mtd->priv;
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uint32_t *notify = ps3vram_get_notifier(priv->reports, NOTIFIER);
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for (i = 0; i < 4; i++)
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notify[i] = 0xffffffff;
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}
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static int ps3vram_notifier_wait(struct mtd_info *mtd, int timeout_ms)
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{
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struct ps3vram_priv *priv = mtd->priv;
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uint32_t *notify = ps3vram_get_notifier(priv->reports, NOTIFIER);
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timeout_ms *= 1000;
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do {
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if (notify[3] == 0)
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return 0;
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if (timeout_ms)
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udelay(1);
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} while (timeout_ms--);
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return -1;
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}
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static void ps3vram_dump_ring(struct mtd_info *mtd)
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{
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struct ps3vram_priv *priv = mtd->priv;
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uint32_t *fifo;
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pr_info("PUT = %08x GET = %08x\n", priv->ctrl[CTRL_PUT],
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priv->ctrl[CTRL_GET]);
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for (fifo = priv->fifo_base; fifo < priv->fifo_ptr; fifo++)
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pr_info("%p: %08x\n", fifo, *fifo);
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}
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static void ps3vram_dump_reports(struct mtd_info *mtd)
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{
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struct ps3vram_priv *priv = mtd->priv;
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int i;
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for (i = 0; i < NUM_NOTIFIERS; i++) {
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uint32_t *n = ps3vram_get_notifier(priv->reports, i);
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pr_info("%p: %08x\n", n, *n);
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}
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}
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static void ps3vram_init_ring(struct mtd_info *mtd)
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{
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struct ps3vram_priv *priv = mtd->priv;
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priv->ctrl[CTRL_PUT] = FIFO_BASE + FIFO_OFFSET;
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priv->ctrl[CTRL_GET] = FIFO_BASE + FIFO_OFFSET;
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}
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static int ps3vram_wait_ring(struct mtd_info *mtd, int timeout)
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{
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struct ps3vram_priv *priv = mtd->priv;
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/* wait until setup commands are processed */
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timeout *= 1000;
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while (--timeout) {
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if (priv->ctrl[CTRL_PUT] == priv->ctrl[CTRL_GET])
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break;
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udelay(1);
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}
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if (timeout == 0) {
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pr_err("FIFO timeout (%08x/%08x/%08x)\n", priv->ctrl[CTRL_PUT],
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priv->ctrl[CTRL_GET], priv->ctrl[CTRL_TOP]);
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return -ETIMEDOUT;
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}
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return 0;
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}
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static inline void ps3vram_out_ring(struct ps3vram_priv *priv, uint32_t data)
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{
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*(priv->fifo_ptr)++ = data;
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}
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static inline void ps3vram_begin_ring(struct ps3vram_priv *priv, uint32_t chan,
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uint32_t tag, uint32_t size)
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{
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ps3vram_out_ring(priv, (size << 18) | (chan << 13) | tag);
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}
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static void ps3vram_rewind_ring(struct mtd_info *mtd)
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{
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struct ps3vram_priv *priv = mtd->priv;
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u64 status;
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ps3vram_out_ring(priv, 0x20000000 | (FIFO_BASE + FIFO_OFFSET));
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priv->ctrl[CTRL_PUT] = FIFO_BASE + FIFO_OFFSET;
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/* asking the HV for a blit will kick the fifo */
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status = lv1_gpu_context_attribute(priv->context_handle,
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L1GPU_CONTEXT_ATTRIBUTE_FB_BLIT,
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0, 0, 0, 0);
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if (status)
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pr_err("ps3vram: lv1_gpu_context_attribute FB_BLIT failed\n");
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priv->fifo_ptr = priv->fifo_base;
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}
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static void ps3vram_fire_ring(struct mtd_info *mtd)
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{
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struct ps3vram_priv *priv = mtd->priv;
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u64 status;
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mutex_lock(&ps3_gpu_mutex);
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priv->ctrl[CTRL_PUT] = FIFO_BASE + FIFO_OFFSET +
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(priv->fifo_ptr - priv->fifo_base) * sizeof(uint32_t);
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/* asking the HV for a blit will kick the fifo */
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status = lv1_gpu_context_attribute(priv->context_handle,
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L1GPU_CONTEXT_ATTRIBUTE_FB_BLIT,
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0, 0, 0, 0);
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if (status)
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pr_err("ps3vram: lv1_gpu_context_attribute FB_BLIT failed\n");
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if ((priv->fifo_ptr - priv->fifo_base) * sizeof(uint32_t) >
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FIFO_SIZE - 1024) {
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dbg("fifo full, rewinding");
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ps3vram_wait_ring(mtd, 200);
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ps3vram_rewind_ring(mtd);
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}
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mutex_unlock(&ps3_gpu_mutex);
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}
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static void ps3vram_bind(struct mtd_info *mtd)
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{
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struct ps3vram_priv *priv = mtd->priv;
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ps3vram_begin_ring(priv, UPLOAD_SUBCH, 0, 1);
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ps3vram_out_ring(priv, 0x31337303);
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ps3vram_begin_ring(priv, UPLOAD_SUBCH, 0x180, 3);
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ps3vram_out_ring(priv, DMA_NOTIFIER_HANDLE_BASE + NOTIFIER);
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ps3vram_out_ring(priv, 0xfeed0001); /* DMA system RAM instance */
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ps3vram_out_ring(priv, 0xfeed0000); /* DMA video RAM instance */
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ps3vram_begin_ring(priv, DOWNLOAD_SUBCH, 0, 1);
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ps3vram_out_ring(priv, 0x3137c0de);
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ps3vram_begin_ring(priv, DOWNLOAD_SUBCH, 0x180, 3);
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ps3vram_out_ring(priv, DMA_NOTIFIER_HANDLE_BASE + NOTIFIER);
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ps3vram_out_ring(priv, 0xfeed0000); /* DMA video RAM instance */
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ps3vram_out_ring(priv, 0xfeed0001); /* DMA system RAM instance */
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ps3vram_fire_ring(mtd);
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}
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static int ps3vram_upload(struct mtd_info *mtd, unsigned int src_offset,
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unsigned int dst_offset, int len, int count)
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{
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struct ps3vram_priv *priv = mtd->priv;
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ps3vram_begin_ring(priv, UPLOAD_SUBCH,
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NV_MEMORY_TO_MEMORY_FORMAT_OFFSET_IN, 8);
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ps3vram_out_ring(priv, XDR_IOIF + src_offset);
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ps3vram_out_ring(priv, dst_offset);
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ps3vram_out_ring(priv, len);
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ps3vram_out_ring(priv, len);
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ps3vram_out_ring(priv, len);
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ps3vram_out_ring(priv, count);
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ps3vram_out_ring(priv, (1 << 8) | 1);
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ps3vram_out_ring(priv, 0);
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ps3vram_notifier_reset(mtd);
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ps3vram_begin_ring(priv, UPLOAD_SUBCH,
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NV_MEMORY_TO_MEMORY_FORMAT_NOTIFY, 1);
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ps3vram_out_ring(priv, 0);
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ps3vram_begin_ring(priv, UPLOAD_SUBCH, 0x100, 1);
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ps3vram_out_ring(priv, 0);
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ps3vram_fire_ring(mtd);
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if (ps3vram_notifier_wait(mtd, 200) < 0) {
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pr_err("notifier timeout\n");
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ps3vram_dump_ring(mtd);
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ps3vram_dump_reports(mtd);
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return -1;
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}
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return 0;
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}
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static int ps3vram_download(struct mtd_info *mtd, unsigned int src_offset,
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unsigned int dst_offset, int len, int count)
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{
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struct ps3vram_priv *priv = mtd->priv;
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ps3vram_begin_ring(priv, DOWNLOAD_SUBCH,
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NV_MEMORY_TO_MEMORY_FORMAT_OFFSET_IN, 8);
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ps3vram_out_ring(priv, src_offset);
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ps3vram_out_ring(priv, XDR_IOIF + dst_offset);
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ps3vram_out_ring(priv, len);
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ps3vram_out_ring(priv, len);
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ps3vram_out_ring(priv, len);
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ps3vram_out_ring(priv, count);
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ps3vram_out_ring(priv, (1 << 8) | 1);
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ps3vram_out_ring(priv, 0);
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ps3vram_notifier_reset(mtd);
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ps3vram_begin_ring(priv, DOWNLOAD_SUBCH,
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NV_MEMORY_TO_MEMORY_FORMAT_NOTIFY, 1);
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ps3vram_out_ring(priv, 0);
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ps3vram_begin_ring(priv, DOWNLOAD_SUBCH, 0x100, 1);
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ps3vram_out_ring(priv, 0);
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ps3vram_fire_ring(mtd);
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if (ps3vram_notifier_wait(mtd, 200) < 0) {
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pr_err("notifier timeout\n");
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ps3vram_dump_ring(mtd);
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ps3vram_dump_reports(mtd);
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return -1;
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}
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return 0;
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}
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static void ps3vram_cache_evict(struct mtd_info *mtd, int entry)
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{
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struct ps3vram_priv *priv = mtd->priv;
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struct ps3vram_cache *cache = &priv->cache;
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if (cache->tags[entry].flags & CACHE_PAGE_DIRTY) {
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dbg("flushing %d : 0x%08x", entry, cache->tags[entry].address);
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if (ps3vram_upload(mtd,
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CACHE_OFFSET + entry * cache->page_size,
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cache->tags[entry].address,
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DMA_PAGE_SIZE,
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cache->page_size / DMA_PAGE_SIZE) < 0) {
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pr_err("failed to upload from 0x%x to 0x%x size 0x%x\n",
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entry * cache->page_size,
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cache->tags[entry].address,
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cache->page_size);
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}
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cache->tags[entry].flags &= ~CACHE_PAGE_DIRTY;
|
||||
}
|
||||
}
|
||||
|
||||
static void ps3vram_cache_load(struct mtd_info *mtd, int entry,
|
||||
unsigned int address)
|
||||
{
|
||||
struct ps3vram_priv *priv = mtd->priv;
|
||||
struct ps3vram_cache *cache = &priv->cache;
|
||||
|
||||
dbg("fetching %d : 0x%08x", entry, address);
|
||||
if (ps3vram_download(mtd,
|
||||
address,
|
||||
CACHE_OFFSET + entry * cache->page_size,
|
||||
DMA_PAGE_SIZE,
|
||||
cache->page_size / DMA_PAGE_SIZE) < 0) {
|
||||
pr_err("failed to download from 0x%x to 0x%x size 0x%x\n",
|
||||
address,
|
||||
entry * cache->page_size,
|
||||
cache->page_size);
|
||||
}
|
||||
|
||||
cache->tags[entry].address = address;
|
||||
cache->tags[entry].flags |= CACHE_PAGE_PRESENT;
|
||||
}
|
||||
|
||||
|
||||
static void ps3vram_cache_flush(struct mtd_info *mtd)
|
||||
{
|
||||
struct ps3vram_priv *priv = mtd->priv;
|
||||
struct ps3vram_cache *cache = &priv->cache;
|
||||
int i;
|
||||
|
||||
dbg("FLUSH");
|
||||
for (i = 0; i < cache->page_count; i++) {
|
||||
ps3vram_cache_evict(mtd, i);
|
||||
cache->tags[i].flags = 0;
|
||||
}
|
||||
}
|
||||
|
||||
static unsigned int ps3vram_cache_match(struct mtd_info *mtd, loff_t address)
|
||||
{
|
||||
struct ps3vram_priv *priv = mtd->priv;
|
||||
struct ps3vram_cache *cache = &priv->cache;
|
||||
unsigned int base;
|
||||
unsigned int offset;
|
||||
int i;
|
||||
static int counter;
|
||||
|
||||
offset = (unsigned int) (address & (cache->page_size - 1));
|
||||
base = (unsigned int) (address - offset);
|
||||
|
||||
/* fully associative check */
|
||||
for (i = 0; i < cache->page_count; i++) {
|
||||
if ((cache->tags[i].flags & CACHE_PAGE_PRESENT) &&
|
||||
cache->tags[i].address == base) {
|
||||
dbg("found entry %d : 0x%08x",
|
||||
i, cache->tags[i].address);
|
||||
return i;
|
||||
}
|
||||
}
|
||||
|
||||
/* choose a random entry */
|
||||
i = (jiffies + (counter++)) % cache->page_count;
|
||||
dbg("using cache entry %d", i);
|
||||
|
||||
ps3vram_cache_evict(mtd, i);
|
||||
ps3vram_cache_load(mtd, i, base);
|
||||
|
||||
return i;
|
||||
}
|
||||
|
||||
static int ps3vram_cache_init(struct mtd_info *mtd)
|
||||
{
|
||||
struct ps3vram_priv *priv = mtd->priv;
|
||||
|
||||
pr_info("creating cache: %d entries, %d bytes pages\n",
|
||||
CACHE_PAGE_COUNT, CACHE_PAGE_SIZE);
|
||||
|
||||
priv->cache.page_count = CACHE_PAGE_COUNT;
|
||||
priv->cache.page_size = CACHE_PAGE_SIZE;
|
||||
priv->cache.tags = kzalloc(sizeof(struct ps3vram_tag) *
|
||||
CACHE_PAGE_COUNT, GFP_KERNEL);
|
||||
if (priv->cache.tags == NULL) {
|
||||
pr_err("could not allocate cache tags\n");
|
||||
return -ENOMEM;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void ps3vram_cache_cleanup(struct mtd_info *mtd)
|
||||
{
|
||||
struct ps3vram_priv *priv = mtd->priv;
|
||||
|
||||
ps3vram_cache_flush(mtd);
|
||||
kfree(priv->cache.tags);
|
||||
}
|
||||
|
||||
static int ps3vram_erase(struct mtd_info *mtd, struct erase_info *instr)
|
||||
{
|
||||
struct ps3vram_priv *priv = mtd->priv;
|
||||
|
||||
if (instr->addr + instr->len > mtd->size)
|
||||
return -EINVAL;
|
||||
|
||||
mutex_lock(&priv->lock);
|
||||
|
||||
ps3vram_cache_flush(mtd);
|
||||
|
||||
/* Set bytes to 0xFF */
|
||||
memset(priv->base + instr->addr, 0xFF, instr->len);
|
||||
|
||||
mutex_unlock(&priv->lock);
|
||||
|
||||
instr->state = MTD_ERASE_DONE;
|
||||
mtd_erase_callback(instr);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
static int ps3vram_read(struct mtd_info *mtd, loff_t from, size_t len,
|
||||
size_t *retlen, u_char *buf)
|
||||
{
|
||||
struct ps3vram_priv *priv = mtd->priv;
|
||||
unsigned int cached, count;
|
||||
|
||||
dbg("from = 0x%08x len = 0x%zx", (unsigned int) from, len);
|
||||
|
||||
if (from >= mtd->size)
|
||||
return -EINVAL;
|
||||
|
||||
if (len > mtd->size - from)
|
||||
len = mtd->size - from;
|
||||
|
||||
/* Copy from vram to buf */
|
||||
count = len;
|
||||
while (count) {
|
||||
unsigned int offset, avail;
|
||||
unsigned int entry;
|
||||
|
||||
offset = (unsigned int) (from & (priv->cache.page_size - 1));
|
||||
avail = priv->cache.page_size - offset;
|
||||
|
||||
mutex_lock(&priv->lock);
|
||||
|
||||
entry = ps3vram_cache_match(mtd, from);
|
||||
cached = CACHE_OFFSET + entry * priv->cache.page_size + offset;
|
||||
|
||||
dbg("from=%08x cached=%08x offset=%08x avail=%08x count=%08x",
|
||||
(unsigned)from, cached, offset, avail, count);
|
||||
|
||||
if (avail > count)
|
||||
avail = count;
|
||||
memcpy(buf, priv->xdr_buf + cached, avail);
|
||||
|
||||
mutex_unlock(&priv->lock);
|
||||
|
||||
buf += avail;
|
||||
count -= avail;
|
||||
from += avail;
|
||||
}
|
||||
|
||||
*retlen = len;
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int ps3vram_write(struct mtd_info *mtd, loff_t to, size_t len,
|
||||
size_t *retlen, const u_char *buf)
|
||||
{
|
||||
struct ps3vram_priv *priv = mtd->priv;
|
||||
unsigned int cached, count;
|
||||
|
||||
if (to >= mtd->size)
|
||||
return -EINVAL;
|
||||
|
||||
if (len > mtd->size - to)
|
||||
len = mtd->size - to;
|
||||
|
||||
/* Copy from buf to vram */
|
||||
count = len;
|
||||
while (count) {
|
||||
unsigned int offset, avail;
|
||||
unsigned int entry;
|
||||
|
||||
offset = (unsigned int) (to & (priv->cache.page_size - 1));
|
||||
avail = priv->cache.page_size - offset;
|
||||
|
||||
mutex_lock(&priv->lock);
|
||||
|
||||
entry = ps3vram_cache_match(mtd, to);
|
||||
cached = CACHE_OFFSET + entry * priv->cache.page_size + offset;
|
||||
|
||||
dbg("to=%08x cached=%08x offset=%08x avail=%08x count=%08x",
|
||||
(unsigned) to, cached, offset, avail, count);
|
||||
|
||||
if (avail > count)
|
||||
avail = count;
|
||||
memcpy(priv->xdr_buf + cached, buf, avail);
|
||||
|
||||
priv->cache.tags[entry].flags |= CACHE_PAGE_DIRTY;
|
||||
|
||||
mutex_unlock(&priv->lock);
|
||||
|
||||
buf += avail;
|
||||
count -= avail;
|
||||
to += avail;
|
||||
}
|
||||
|
||||
*retlen = len;
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int __devinit ps3vram_probe(struct ps3_system_bus_device *dev)
|
||||
{
|
||||
struct ps3vram_priv *priv;
|
||||
uint64_t status;
|
||||
uint64_t ddr_lpar, ctrl_lpar, info_lpar, reports_lpar;
|
||||
int64_t ddr_size;
|
||||
uint64_t reports_size;
|
||||
int ret = -ENOMEM;
|
||||
char *rest;
|
||||
|
||||
ret = -EIO;
|
||||
ps3vram_mtd.priv = kzalloc(sizeof(struct ps3vram_priv), GFP_KERNEL);
|
||||
if (!ps3vram_mtd.priv)
|
||||
goto out;
|
||||
priv = ps3vram_mtd.priv;
|
||||
|
||||
mutex_init(&priv->lock);
|
||||
|
||||
/* Allocate XDR buffer (1MiB aligned) */
|
||||
priv->xdr_buf = (uint8_t *) __get_free_pages(GFP_KERNEL,
|
||||
get_order(XDR_BUF_SIZE));
|
||||
if (priv->xdr_buf == NULL) {
|
||||
pr_err("ps3vram: could not allocate XDR buffer\n");
|
||||
ret = -ENOMEM;
|
||||
goto out_free_priv;
|
||||
}
|
||||
|
||||
/* Put FIFO at begginning of XDR buffer */
|
||||
priv->fifo_base = (uint32_t *) (priv->xdr_buf + FIFO_OFFSET);
|
||||
priv->fifo_ptr = priv->fifo_base;
|
||||
|
||||
/* XXX: Need to open GPU, in case ps3fb or snd_ps3 aren't loaded */
|
||||
if (ps3_open_hv_device(dev)) {
|
||||
pr_err("ps3vram: ps3_open_hv_device failed\n");
|
||||
ret = -EAGAIN;
|
||||
goto out_close_gpu;
|
||||
}
|
||||
|
||||
/* Request memory */
|
||||
status = -1;
|
||||
ddr_size = memparse(size, &rest);
|
||||
if (*rest == '-')
|
||||
ddr_size -= ps3fb_videomemory.size;
|
||||
ddr_size = ALIGN(ddr_size, 1024*1024);
|
||||
if (ddr_size <= 0) {
|
||||
printk(KERN_ERR "ps3vram: specified size is too small\n");
|
||||
ret = -EINVAL;
|
||||
goto out_close_gpu;
|
||||
}
|
||||
|
||||
while (ddr_size > 0) {
|
||||
status = lv1_gpu_memory_allocate(ddr_size, 0, 0, 0, 0,
|
||||
&priv->memory_handle,
|
||||
&ddr_lpar);
|
||||
if (status == 0)
|
||||
break;
|
||||
ddr_size -= 1024*1024;
|
||||
}
|
||||
if (status != 0 || ddr_size <= 0) {
|
||||
pr_err("ps3vram: lv1_gpu_memory_allocate failed\n");
|
||||
ret = -ENOMEM;
|
||||
goto out_free_xdr_buf;
|
||||
}
|
||||
pr_info("ps3vram: allocated %u MiB of DDR memory\n",
|
||||
(unsigned int) (ddr_size / 1024 / 1024));
|
||||
|
||||
/* Request context */
|
||||
status = lv1_gpu_context_allocate(priv->memory_handle,
|
||||
0,
|
||||
&priv->context_handle,
|
||||
&ctrl_lpar,
|
||||
&info_lpar,
|
||||
&reports_lpar,
|
||||
&reports_size);
|
||||
if (status) {
|
||||
pr_err("ps3vram: lv1_gpu_context_allocate failed\n");
|
||||
ret = -ENOMEM;
|
||||
goto out_free_memory;
|
||||
}
|
||||
|
||||
/* Map XDR buffer to RSX */
|
||||
status = lv1_gpu_context_iomap(priv->context_handle, XDR_IOIF,
|
||||
ps3_mm_phys_to_lpar(__pa(priv->xdr_buf)),
|
||||
XDR_BUF_SIZE, 0);
|
||||
if (status) {
|
||||
pr_err("ps3vram: lv1_gpu_context_iomap failed\n");
|
||||
ret = -ENOMEM;
|
||||
goto out_free_context;
|
||||
}
|
||||
|
||||
priv->base = ioremap(ddr_lpar, ddr_size);
|
||||
if (!priv->base) {
|
||||
pr_err("ps3vram: ioremap failed\n");
|
||||
ret = -ENOMEM;
|
||||
goto out_free_context;
|
||||
}
|
||||
|
||||
priv->ctrl = ioremap(ctrl_lpar, 64 * 1024);
|
||||
if (!priv->ctrl) {
|
||||
pr_err("ps3vram: ioremap failed\n");
|
||||
ret = -ENOMEM;
|
||||
goto out_unmap_vram;
|
||||
}
|
||||
|
||||
priv->reports = ioremap(reports_lpar, reports_size);
|
||||
if (!priv->reports) {
|
||||
pr_err("ps3vram: ioremap failed\n");
|
||||
ret = -ENOMEM;
|
||||
goto out_unmap_ctrl;
|
||||
}
|
||||
|
||||
mutex_lock(&ps3_gpu_mutex);
|
||||
ps3vram_init_ring(&ps3vram_mtd);
|
||||
mutex_unlock(&ps3_gpu_mutex);
|
||||
|
||||
ps3vram_mtd.name = "ps3vram";
|
||||
ps3vram_mtd.size = ddr_size;
|
||||
ps3vram_mtd.flags = MTD_CAP_RAM;
|
||||
ps3vram_mtd.erase = ps3vram_erase;
|
||||
ps3vram_mtd.point = NULL;
|
||||
ps3vram_mtd.unpoint = NULL;
|
||||
ps3vram_mtd.read = ps3vram_read;
|
||||
ps3vram_mtd.write = ps3vram_write;
|
||||
ps3vram_mtd.owner = THIS_MODULE;
|
||||
ps3vram_mtd.type = MTD_RAM;
|
||||
ps3vram_mtd.erasesize = CACHE_PAGE_SIZE;
|
||||
ps3vram_mtd.writesize = 1;
|
||||
|
||||
ps3vram_bind(&ps3vram_mtd);
|
||||
|
||||
mutex_lock(&ps3_gpu_mutex);
|
||||
ret = ps3vram_wait_ring(&ps3vram_mtd, 100);
|
||||
mutex_unlock(&ps3_gpu_mutex);
|
||||
if (ret < 0) {
|
||||
pr_err("failed to initialize channels\n");
|
||||
ret = -ETIMEDOUT;
|
||||
goto out_unmap_reports;
|
||||
}
|
||||
|
||||
ps3vram_cache_init(&ps3vram_mtd);
|
||||
|
||||
if (add_mtd_device(&ps3vram_mtd)) {
|
||||
pr_err("ps3vram: failed to register device\n");
|
||||
ret = -EAGAIN;
|
||||
goto out_cache_cleanup;
|
||||
}
|
||||
|
||||
pr_info("ps3vram mtd device registered, %lu bytes\n", ddr_size);
|
||||
return 0;
|
||||
|
||||
out_cache_cleanup:
|
||||
ps3vram_cache_cleanup(&ps3vram_mtd);
|
||||
out_unmap_reports:
|
||||
iounmap(priv->reports);
|
||||
out_unmap_ctrl:
|
||||
iounmap(priv->ctrl);
|
||||
out_unmap_vram:
|
||||
iounmap(priv->base);
|
||||
out_free_context:
|
||||
lv1_gpu_context_free(priv->context_handle);
|
||||
out_free_memory:
|
||||
lv1_gpu_memory_free(priv->memory_handle);
|
||||
out_close_gpu:
|
||||
ps3_close_hv_device(dev);
|
||||
out_free_xdr_buf:
|
||||
free_pages((unsigned long) priv->xdr_buf, get_order(XDR_BUF_SIZE));
|
||||
out_free_priv:
|
||||
kfree(ps3vram_mtd.priv);
|
||||
ps3vram_mtd.priv = NULL;
|
||||
out:
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int ps3vram_shutdown(struct ps3_system_bus_device *dev)
|
||||
{
|
||||
struct ps3vram_priv *priv;
|
||||
|
||||
priv = ps3vram_mtd.priv;
|
||||
|
||||
del_mtd_device(&ps3vram_mtd);
|
||||
ps3vram_cache_cleanup(&ps3vram_mtd);
|
||||
iounmap(priv->reports);
|
||||
iounmap(priv->ctrl);
|
||||
iounmap(priv->base);
|
||||
lv1_gpu_context_free(priv->context_handle);
|
||||
lv1_gpu_memory_free(priv->memory_handle);
|
||||
ps3_close_hv_device(dev);
|
||||
free_pages((unsigned long) priv->xdr_buf, get_order(XDR_BUF_SIZE));
|
||||
kfree(priv);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static struct ps3_system_bus_driver ps3vram_driver = {
|
||||
.match_id = PS3_MATCH_ID_GPU,
|
||||
.match_sub_id = PS3_MATCH_SUB_ID_GPU_RAMDISK,
|
||||
.core.name = DEVICE_NAME,
|
||||
.core.owner = THIS_MODULE,
|
||||
.probe = ps3vram_probe,
|
||||
.remove = ps3vram_shutdown,
|
||||
.shutdown = ps3vram_shutdown,
|
||||
};
|
||||
|
||||
static int __init ps3vram_init(void)
|
||||
{
|
||||
return ps3_system_bus_driver_register(&ps3vram_driver);
|
||||
}
|
||||
|
||||
static void __exit ps3vram_exit(void)
|
||||
{
|
||||
ps3_system_bus_driver_unregister(&ps3vram_driver);
|
||||
}
|
||||
|
||||
module_init(ps3vram_init);
|
||||
module_exit(ps3vram_exit);
|
||||
|
||||
MODULE_LICENSE("GPL");
|
||||
MODULE_AUTHOR("Jim Paris <jim@jtan.com>");
|
||||
MODULE_DESCRIPTION("MTD driver for PS3 video RAM");
|
||||
Loading…
Reference in New Issue
Block a user