Merge branch 'drm-fixes' of git://people.freedesktop.org/~airlied/linux
Pull drm fixes from Dave Airlie: "This is made up 4 groups of fixes detailed below. vgem: Due to some misgivings about possible bad use cases this allow, backout a chunk of the interface to stop those use cases for now. radeon: Fix for an oops regression in the audio code, and a partial revert for a fix that was cauing problems. nouveau: regression fix for Fermi, and display-less Maxwell boot fixes. drm core: a fix for i915 cursor vblank waiting in the atomic helpers" * 'drm-fixes' of git://people.freedesktop.org/~airlied/linux: drm/nouveau/gr/gm204: remove a stray printk drm/nouveau/devinit/gm100-: force devinit table execution on boards without PDISP drm/nouveau/devinit/gf100: make the force-post condition more obvious drm/nouveau/gr/gf100-: fix wrong constant definition drm/radeon: partially revert "fix VM_CONTEXT*_PAGE_TABLE_END_ADDR handling" drm/radeon/audio: make sure connector is valid in hotplug case Revert "drm/radeon: only mark audio as connected if the monitor supports it (v3)" drm/radeon: don't share plls if monitors differ in audio support drm/vgem: drop DRIVER_PRIME (v2) drm/plane-helper: Adapt cursor hack to transitional helpers
This commit is contained in:
commit
d0af698866
@ -465,6 +465,9 @@ int drm_plane_helper_commit(struct drm_plane *plane,
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if (!crtc[i])
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if (!crtc[i])
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continue;
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continue;
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if (crtc[i]->cursor == plane)
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continue;
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/* There's no other way to figure out whether the crtc is running. */
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/* There's no other way to figure out whether the crtc is running. */
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ret = drm_crtc_vblank_get(crtc[i]);
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ret = drm_crtc_vblank_get(crtc[i]);
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if (ret == 0) {
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if (ret == 0) {
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@ -14,7 +14,7 @@
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#define FERMI_TWOD_A 0x0000902d
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#define FERMI_TWOD_A 0x0000902d
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#define FERMI_MEMORY_TO_MEMORY_FORMAT_A 0x0000903d
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#define FERMI_MEMORY_TO_MEMORY_FORMAT_A 0x00009039
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#define KEPLER_INLINE_TO_MEMORY_A 0x0000a040
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#define KEPLER_INLINE_TO_MEMORY_A 0x0000a040
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#define KEPLER_INLINE_TO_MEMORY_B 0x0000a140
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#define KEPLER_INLINE_TO_MEMORY_B 0x0000a140
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@ -329,7 +329,6 @@ gm204_gr_init(struct nvkm_object *object)
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nv_mask(priv, 0x419cc0, 0x00000008, 0x00000008);
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nv_mask(priv, 0x419cc0, 0x00000008, 0x00000008);
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for (gpc = 0; gpc < priv->gpc_nr; gpc++) {
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for (gpc = 0; gpc < priv->gpc_nr; gpc++) {
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printk(KERN_ERR "ppc %d %d\n", gpc, priv->ppc_nr[gpc]);
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for (ppc = 0; ppc < priv->ppc_nr[gpc]; ppc++)
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for (ppc = 0; ppc < priv->ppc_nr[gpc]; ppc++)
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nv_wr32(priv, PPC_UNIT(gpc, ppc, 0x038), 0xc0000000);
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nv_wr32(priv, PPC_UNIT(gpc, ppc, 0x038), 0xc0000000);
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nv_wr32(priv, GPC_UNIT(gpc, 0x0420), 0xc0000000);
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nv_wr32(priv, GPC_UNIT(gpc, 0x0420), 0xc0000000);
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@ -90,12 +90,14 @@ gf100_devinit_disable(struct nvkm_devinit *devinit)
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return disable;
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return disable;
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}
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}
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static int
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int
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gf100_devinit_ctor(struct nvkm_object *parent, struct nvkm_object *engine,
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gf100_devinit_ctor(struct nvkm_object *parent, struct nvkm_object *engine,
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struct nvkm_oclass *oclass, void *data, u32 size,
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struct nvkm_oclass *oclass, void *data, u32 size,
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struct nvkm_object **pobject)
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struct nvkm_object **pobject)
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{
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{
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struct nvkm_devinit_impl *impl = (void *)oclass;
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struct nv50_devinit_priv *priv;
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struct nv50_devinit_priv *priv;
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u64 disable;
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int ret;
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int ret;
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ret = nvkm_devinit_create(parent, engine, oclass, &priv);
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ret = nvkm_devinit_create(parent, engine, oclass, &priv);
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@ -103,7 +105,8 @@ gf100_devinit_ctor(struct nvkm_object *parent, struct nvkm_object *engine,
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if (ret)
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if (ret)
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return ret;
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return ret;
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if (nv_rd32(priv, 0x022500) & 0x00000001)
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disable = impl->disable(&priv->base);
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if (disable & (1ULL << NVDEV_ENGINE_DISP))
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priv->base.post = true;
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priv->base.post = true;
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return 0;
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return 0;
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@ -48,7 +48,7 @@ struct nvkm_oclass *
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gm107_devinit_oclass = &(struct nvkm_devinit_impl) {
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gm107_devinit_oclass = &(struct nvkm_devinit_impl) {
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.base.handle = NV_SUBDEV(DEVINIT, 0x07),
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.base.handle = NV_SUBDEV(DEVINIT, 0x07),
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.base.ofuncs = &(struct nvkm_ofuncs) {
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.base.ofuncs = &(struct nvkm_ofuncs) {
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.ctor = nv50_devinit_ctor,
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.ctor = gf100_devinit_ctor,
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.dtor = _nvkm_devinit_dtor,
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.dtor = _nvkm_devinit_dtor,
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.init = nv50_devinit_init,
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.init = nv50_devinit_init,
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.fini = _nvkm_devinit_fini,
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.fini = _nvkm_devinit_fini,
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@ -161,7 +161,7 @@ struct nvkm_oclass *
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gm204_devinit_oclass = &(struct nvkm_devinit_impl) {
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gm204_devinit_oclass = &(struct nvkm_devinit_impl) {
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.base.handle = NV_SUBDEV(DEVINIT, 0x07),
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.base.handle = NV_SUBDEV(DEVINIT, 0x07),
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.base.ofuncs = &(struct nvkm_ofuncs) {
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.base.ofuncs = &(struct nvkm_ofuncs) {
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.ctor = nv50_devinit_ctor,
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.ctor = gf100_devinit_ctor,
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.dtor = _nvkm_devinit_dtor,
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.dtor = _nvkm_devinit_dtor,
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.init = nv50_devinit_init,
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.init = nv50_devinit_init,
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.fini = _nvkm_devinit_fini,
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.fini = _nvkm_devinit_fini,
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@ -15,6 +15,9 @@ int nv50_devinit_pll_set(struct nvkm_devinit *, u32, u32);
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int gt215_devinit_pll_set(struct nvkm_devinit *, u32, u32);
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int gt215_devinit_pll_set(struct nvkm_devinit *, u32, u32);
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int gf100_devinit_ctor(struct nvkm_object *, struct nvkm_object *,
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struct nvkm_oclass *, void *, u32,
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struct nvkm_object **);
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int gf100_devinit_pll_set(struct nvkm_devinit *, u32, u32);
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int gf100_devinit_pll_set(struct nvkm_devinit *, u32, u32);
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u64 gm107_devinit_disable(struct nvkm_devinit *);
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u64 gm107_devinit_disable(struct nvkm_devinit *);
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@ -1798,7 +1798,9 @@ static int radeon_get_shared_nondp_ppll(struct drm_crtc *crtc)
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if ((crtc->mode.clock == test_crtc->mode.clock) &&
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if ((crtc->mode.clock == test_crtc->mode.clock) &&
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(adjusted_clock == test_adjusted_clock) &&
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(adjusted_clock == test_adjusted_clock) &&
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(radeon_crtc->ss_enabled == test_radeon_crtc->ss_enabled) &&
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(radeon_crtc->ss_enabled == test_radeon_crtc->ss_enabled) &&
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(test_radeon_crtc->pll_id != ATOM_PPLL_INVALID))
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(test_radeon_crtc->pll_id != ATOM_PPLL_INVALID) &&
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(drm_detect_monitor_audio(radeon_connector_edid(test_radeon_crtc->connector)) ==
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drm_detect_monitor_audio(radeon_connector_edid(radeon_crtc->connector))))
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return test_radeon_crtc->pll_id;
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return test_radeon_crtc->pll_id;
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}
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}
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}
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}
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@ -5822,7 +5822,7 @@ static int cik_pcie_gart_enable(struct radeon_device *rdev)
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L2_CACHE_BIGK_FRAGMENT_SIZE(4));
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L2_CACHE_BIGK_FRAGMENT_SIZE(4));
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/* setup context0 */
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/* setup context0 */
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WREG32(VM_CONTEXT0_PAGE_TABLE_START_ADDR, rdev->mc.gtt_start >> 12);
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WREG32(VM_CONTEXT0_PAGE_TABLE_START_ADDR, rdev->mc.gtt_start >> 12);
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WREG32(VM_CONTEXT0_PAGE_TABLE_END_ADDR, (rdev->mc.gtt_end >> 12) - 1);
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WREG32(VM_CONTEXT0_PAGE_TABLE_END_ADDR, rdev->mc.gtt_end >> 12);
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WREG32(VM_CONTEXT0_PAGE_TABLE_BASE_ADDR, rdev->gart.table_addr >> 12);
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WREG32(VM_CONTEXT0_PAGE_TABLE_BASE_ADDR, rdev->gart.table_addr >> 12);
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WREG32(VM_CONTEXT0_PROTECTION_FAULT_DEFAULT_ADDR,
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WREG32(VM_CONTEXT0_PROTECTION_FAULT_DEFAULT_ADDR,
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(u32)(rdev->dummy_page.addr >> 12));
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(u32)(rdev->dummy_page.addr >> 12));
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@ -2485,7 +2485,7 @@ static int evergreen_pcie_gart_enable(struct radeon_device *rdev)
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WREG32(MC_VM_MB_L1_TLB2_CNTL, tmp);
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WREG32(MC_VM_MB_L1_TLB2_CNTL, tmp);
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WREG32(MC_VM_MB_L1_TLB3_CNTL, tmp);
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WREG32(MC_VM_MB_L1_TLB3_CNTL, tmp);
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WREG32(VM_CONTEXT0_PAGE_TABLE_START_ADDR, rdev->mc.gtt_start >> 12);
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WREG32(VM_CONTEXT0_PAGE_TABLE_START_ADDR, rdev->mc.gtt_start >> 12);
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WREG32(VM_CONTEXT0_PAGE_TABLE_END_ADDR, (rdev->mc.gtt_end >> 12) - 1);
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WREG32(VM_CONTEXT0_PAGE_TABLE_END_ADDR, rdev->mc.gtt_end >> 12);
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WREG32(VM_CONTEXT0_PAGE_TABLE_BASE_ADDR, rdev->gart.table_addr >> 12);
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WREG32(VM_CONTEXT0_PAGE_TABLE_BASE_ADDR, rdev->gart.table_addr >> 12);
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WREG32(VM_CONTEXT0_CNTL, ENABLE_CONTEXT | PAGE_TABLE_DEPTH(0) |
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WREG32(VM_CONTEXT0_CNTL, ENABLE_CONTEXT | PAGE_TABLE_DEPTH(0) |
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RANGE_PROTECTION_FAULT_ENABLE_DEFAULT);
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RANGE_PROTECTION_FAULT_ENABLE_DEFAULT);
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@ -400,7 +400,7 @@ void evergreen_hdmi_enable(struct drm_encoder *encoder, bool enable)
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if (enable) {
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if (enable) {
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struct drm_connector *connector = radeon_get_connector_for_encoder(encoder);
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struct drm_connector *connector = radeon_get_connector_for_encoder(encoder);
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if (drm_detect_monitor_audio(radeon_connector_edid(connector))) {
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if (connector && drm_detect_monitor_audio(radeon_connector_edid(connector))) {
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WREG32(HDMI_INFOFRAME_CONTROL0 + dig->afmt->offset,
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WREG32(HDMI_INFOFRAME_CONTROL0 + dig->afmt->offset,
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HDMI_AVI_INFO_SEND | /* enable AVI info frames */
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HDMI_AVI_INFO_SEND | /* enable AVI info frames */
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HDMI_AVI_INFO_CONT | /* required for audio info values to be updated */
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HDMI_AVI_INFO_CONT | /* required for audio info values to be updated */
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@ -438,7 +438,8 @@ void evergreen_dp_enable(struct drm_encoder *encoder, bool enable)
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if (!dig || !dig->afmt)
|
if (!dig || !dig->afmt)
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return;
|
return;
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|
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||||||
if (enable && drm_detect_monitor_audio(radeon_connector_edid(connector))) {
|
if (enable && connector &&
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|
drm_detect_monitor_audio(radeon_connector_edid(connector))) {
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struct drm_connector *connector = radeon_get_connector_for_encoder(encoder);
|
struct drm_connector *connector = radeon_get_connector_for_encoder(encoder);
|
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struct radeon_connector *radeon_connector = to_radeon_connector(connector);
|
struct radeon_connector *radeon_connector = to_radeon_connector(connector);
|
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struct radeon_connector_atom_dig *dig_connector;
|
struct radeon_connector_atom_dig *dig_connector;
|
||||||
|
@ -1282,7 +1282,7 @@ static int cayman_pcie_gart_enable(struct radeon_device *rdev)
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L2_CACHE_BIGK_FRAGMENT_SIZE(6));
|
L2_CACHE_BIGK_FRAGMENT_SIZE(6));
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/* setup context0 */
|
/* setup context0 */
|
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WREG32(VM_CONTEXT0_PAGE_TABLE_START_ADDR, rdev->mc.gtt_start >> 12);
|
WREG32(VM_CONTEXT0_PAGE_TABLE_START_ADDR, rdev->mc.gtt_start >> 12);
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||||||
WREG32(VM_CONTEXT0_PAGE_TABLE_END_ADDR, (rdev->mc.gtt_end >> 12) - 1);
|
WREG32(VM_CONTEXT0_PAGE_TABLE_END_ADDR, rdev->mc.gtt_end >> 12);
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||||||
WREG32(VM_CONTEXT0_PAGE_TABLE_BASE_ADDR, rdev->gart.table_addr >> 12);
|
WREG32(VM_CONTEXT0_PAGE_TABLE_BASE_ADDR, rdev->gart.table_addr >> 12);
|
||||||
WREG32(VM_CONTEXT0_PROTECTION_FAULT_DEFAULT_ADDR,
|
WREG32(VM_CONTEXT0_PROTECTION_FAULT_DEFAULT_ADDR,
|
||||||
(u32)(rdev->dummy_page.addr >> 12));
|
(u32)(rdev->dummy_page.addr >> 12));
|
||||||
|
@ -1112,7 +1112,7 @@ static int r600_pcie_gart_enable(struct radeon_device *rdev)
|
|||||||
WREG32(MC_VM_L1_TLB_MCB_RD_SEM_CNTL, tmp | ENABLE_SEMAPHORE_MODE);
|
WREG32(MC_VM_L1_TLB_MCB_RD_SEM_CNTL, tmp | ENABLE_SEMAPHORE_MODE);
|
||||||
WREG32(MC_VM_L1_TLB_MCB_WR_SEM_CNTL, tmp | ENABLE_SEMAPHORE_MODE);
|
WREG32(MC_VM_L1_TLB_MCB_WR_SEM_CNTL, tmp | ENABLE_SEMAPHORE_MODE);
|
||||||
WREG32(VM_CONTEXT0_PAGE_TABLE_START_ADDR, rdev->mc.gtt_start >> 12);
|
WREG32(VM_CONTEXT0_PAGE_TABLE_START_ADDR, rdev->mc.gtt_start >> 12);
|
||||||
WREG32(VM_CONTEXT0_PAGE_TABLE_END_ADDR, (rdev->mc.gtt_end >> 12) - 1);
|
WREG32(VM_CONTEXT0_PAGE_TABLE_END_ADDR, rdev->mc.gtt_end >> 12);
|
||||||
WREG32(VM_CONTEXT0_PAGE_TABLE_BASE_ADDR, rdev->gart.table_addr >> 12);
|
WREG32(VM_CONTEXT0_PAGE_TABLE_BASE_ADDR, rdev->gart.table_addr >> 12);
|
||||||
WREG32(VM_CONTEXT0_CNTL, ENABLE_CONTEXT | PAGE_TABLE_DEPTH(0) |
|
WREG32(VM_CONTEXT0_CNTL, ENABLE_CONTEXT | PAGE_TABLE_DEPTH(0) |
|
||||||
RANGE_PROTECTION_FAULT_ENABLE_DEFAULT);
|
RANGE_PROTECTION_FAULT_ENABLE_DEFAULT);
|
||||||
|
@ -460,9 +460,6 @@ void radeon_audio_detect(struct drm_connector *connector,
|
|||||||
if (!connector || !connector->encoder)
|
if (!connector || !connector->encoder)
|
||||||
return;
|
return;
|
||||||
|
|
||||||
if (!radeon_encoder_is_digital(connector->encoder))
|
|
||||||
return;
|
|
||||||
|
|
||||||
rdev = connector->encoder->dev->dev_private;
|
rdev = connector->encoder->dev->dev_private;
|
||||||
|
|
||||||
if (!radeon_audio_chipset_supported(rdev))
|
if (!radeon_audio_chipset_supported(rdev))
|
||||||
@ -471,30 +468,30 @@ void radeon_audio_detect(struct drm_connector *connector,
|
|||||||
radeon_encoder = to_radeon_encoder(connector->encoder);
|
radeon_encoder = to_radeon_encoder(connector->encoder);
|
||||||
dig = radeon_encoder->enc_priv;
|
dig = radeon_encoder->enc_priv;
|
||||||
|
|
||||||
if (!dig->afmt)
|
|
||||||
return;
|
|
||||||
|
|
||||||
if (status == connector_status_connected) {
|
if (status == connector_status_connected) {
|
||||||
struct radeon_connector *radeon_connector = to_radeon_connector(connector);
|
struct radeon_connector *radeon_connector;
|
||||||
|
int sink_type;
|
||||||
|
|
||||||
|
if (!drm_detect_monitor_audio(radeon_connector_edid(connector))) {
|
||||||
|
radeon_encoder->audio = NULL;
|
||||||
|
return;
|
||||||
|
}
|
||||||
|
|
||||||
|
radeon_connector = to_radeon_connector(connector);
|
||||||
|
sink_type = radeon_dp_getsinktype(radeon_connector);
|
||||||
|
|
||||||
if (connector->connector_type == DRM_MODE_CONNECTOR_DisplayPort &&
|
if (connector->connector_type == DRM_MODE_CONNECTOR_DisplayPort &&
|
||||||
radeon_dp_getsinktype(radeon_connector) ==
|
sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT)
|
||||||
CONNECTOR_OBJECT_ID_DISPLAYPORT)
|
|
||||||
radeon_encoder->audio = rdev->audio.dp_funcs;
|
radeon_encoder->audio = rdev->audio.dp_funcs;
|
||||||
else
|
else
|
||||||
radeon_encoder->audio = rdev->audio.hdmi_funcs;
|
radeon_encoder->audio = rdev->audio.hdmi_funcs;
|
||||||
|
|
||||||
dig->afmt->pin = radeon_audio_get_pin(connector->encoder);
|
dig->afmt->pin = radeon_audio_get_pin(connector->encoder);
|
||||||
if (drm_detect_monitor_audio(radeon_connector_edid(connector))) {
|
|
||||||
radeon_audio_enable(rdev, dig->afmt->pin, 0xf);
|
radeon_audio_enable(rdev, dig->afmt->pin, 0xf);
|
||||||
} else {
|
} else {
|
||||||
radeon_audio_enable(rdev, dig->afmt->pin, 0);
|
radeon_audio_enable(rdev, dig->afmt->pin, 0);
|
||||||
dig->afmt->pin = NULL;
|
dig->afmt->pin = NULL;
|
||||||
}
|
}
|
||||||
} else {
|
|
||||||
radeon_audio_enable(rdev, dig->afmt->pin, 0);
|
|
||||||
dig->afmt->pin = NULL;
|
|
||||||
}
|
|
||||||
}
|
}
|
||||||
|
|
||||||
void radeon_audio_fini(struct radeon_device *rdev)
|
void radeon_audio_fini(struct radeon_device *rdev)
|
||||||
|
@ -1379,10 +1379,8 @@ radeon_dvi_detect(struct drm_connector *connector, bool force)
|
|||||||
/* updated in get modes as well since we need to know if it's analog or digital */
|
/* updated in get modes as well since we need to know if it's analog or digital */
|
||||||
radeon_connector_update_scratch_regs(connector, ret);
|
radeon_connector_update_scratch_regs(connector, ret);
|
||||||
|
|
||||||
if (radeon_audio != 0) {
|
if (radeon_audio != 0)
|
||||||
radeon_connector_get_edid(connector);
|
|
||||||
radeon_audio_detect(connector, ret);
|
radeon_audio_detect(connector, ret);
|
||||||
}
|
|
||||||
|
|
||||||
exit:
|
exit:
|
||||||
pm_runtime_mark_last_busy(connector->dev->dev);
|
pm_runtime_mark_last_busy(connector->dev->dev);
|
||||||
@ -1719,10 +1717,8 @@ radeon_dp_detect(struct drm_connector *connector, bool force)
|
|||||||
|
|
||||||
radeon_connector_update_scratch_regs(connector, ret);
|
radeon_connector_update_scratch_regs(connector, ret);
|
||||||
|
|
||||||
if (radeon_audio != 0) {
|
if (radeon_audio != 0)
|
||||||
radeon_connector_get_edid(connector);
|
|
||||||
radeon_audio_detect(connector, ret);
|
radeon_audio_detect(connector, ret);
|
||||||
}
|
|
||||||
|
|
||||||
out:
|
out:
|
||||||
pm_runtime_mark_last_busy(connector->dev->dev);
|
pm_runtime_mark_last_busy(connector->dev->dev);
|
||||||
|
@ -921,7 +921,7 @@ static int rv770_pcie_gart_enable(struct radeon_device *rdev)
|
|||||||
WREG32(MC_VM_MB_L1_TLB2_CNTL, tmp);
|
WREG32(MC_VM_MB_L1_TLB2_CNTL, tmp);
|
||||||
WREG32(MC_VM_MB_L1_TLB3_CNTL, tmp);
|
WREG32(MC_VM_MB_L1_TLB3_CNTL, tmp);
|
||||||
WREG32(VM_CONTEXT0_PAGE_TABLE_START_ADDR, rdev->mc.gtt_start >> 12);
|
WREG32(VM_CONTEXT0_PAGE_TABLE_START_ADDR, rdev->mc.gtt_start >> 12);
|
||||||
WREG32(VM_CONTEXT0_PAGE_TABLE_END_ADDR, (rdev->mc.gtt_end >> 12) - 1);
|
WREG32(VM_CONTEXT0_PAGE_TABLE_END_ADDR, rdev->mc.gtt_end >> 12);
|
||||||
WREG32(VM_CONTEXT0_PAGE_TABLE_BASE_ADDR, rdev->gart.table_addr >> 12);
|
WREG32(VM_CONTEXT0_PAGE_TABLE_BASE_ADDR, rdev->gart.table_addr >> 12);
|
||||||
WREG32(VM_CONTEXT0_CNTL, ENABLE_CONTEXT | PAGE_TABLE_DEPTH(0) |
|
WREG32(VM_CONTEXT0_CNTL, ENABLE_CONTEXT | PAGE_TABLE_DEPTH(0) |
|
||||||
RANGE_PROTECTION_FAULT_ENABLE_DEFAULT);
|
RANGE_PROTECTION_FAULT_ENABLE_DEFAULT);
|
||||||
|
@ -4303,7 +4303,7 @@ static int si_pcie_gart_enable(struct radeon_device *rdev)
|
|||||||
L2_CACHE_BIGK_FRAGMENT_SIZE(4));
|
L2_CACHE_BIGK_FRAGMENT_SIZE(4));
|
||||||
/* setup context0 */
|
/* setup context0 */
|
||||||
WREG32(VM_CONTEXT0_PAGE_TABLE_START_ADDR, rdev->mc.gtt_start >> 12);
|
WREG32(VM_CONTEXT0_PAGE_TABLE_START_ADDR, rdev->mc.gtt_start >> 12);
|
||||||
WREG32(VM_CONTEXT0_PAGE_TABLE_END_ADDR, (rdev->mc.gtt_end >> 12) - 1);
|
WREG32(VM_CONTEXT0_PAGE_TABLE_END_ADDR, rdev->mc.gtt_end >> 12);
|
||||||
WREG32(VM_CONTEXT0_PAGE_TABLE_BASE_ADDR, rdev->gart.table_addr >> 12);
|
WREG32(VM_CONTEXT0_PAGE_TABLE_BASE_ADDR, rdev->gart.table_addr >> 12);
|
||||||
WREG32(VM_CONTEXT0_PROTECTION_FAULT_DEFAULT_ADDR,
|
WREG32(VM_CONTEXT0_PROTECTION_FAULT_DEFAULT_ADDR,
|
||||||
(u32)(rdev->dummy_page.addr >> 12));
|
(u32)(rdev->dummy_page.addr >> 12));
|
||||||
|
@ -1,4 +1,4 @@
|
|||||||
ccflags-y := -Iinclude/drm
|
ccflags-y := -Iinclude/drm
|
||||||
vgem-y := vgem_drv.o vgem_dma_buf.o
|
vgem-y := vgem_drv.o
|
||||||
|
|
||||||
obj-$(CONFIG_DRM_VGEM) += vgem.o
|
obj-$(CONFIG_DRM_VGEM) += vgem.o
|
||||||
|
@ -1,94 +0,0 @@
|
|||||||
/*
|
|
||||||
* Copyright © 2012 Intel Corporation
|
|
||||||
* Copyright © 2014 The Chromium OS Authors
|
|
||||||
*
|
|
||||||
* Permission is hereby granted, free of charge, to any person obtaining a
|
|
||||||
* copy of this software and associated documentation files (the "Software"),
|
|
||||||
* to deal in the Software without restriction, including without limitation
|
|
||||||
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
|
|
||||||
* and/or sell copies of the Software, and to permit persons to whom the
|
|
||||||
* Software is furnished to do so, subject to the following conditions:
|
|
||||||
*
|
|
||||||
* The above copyright notice and this permission notice (including the next
|
|
||||||
* paragraph) shall be included in all copies or substantial portions of the
|
|
||||||
* Software.
|
|
||||||
*
|
|
||||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
|
||||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
|
||||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
|
||||||
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
|
||||||
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
|
|
||||||
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
|
|
||||||
* IN THE SOFTWARE.
|
|
||||||
*
|
|
||||||
* Authors:
|
|
||||||
* Ben Widawsky <ben@bwidawsk.net>
|
|
||||||
*
|
|
||||||
*/
|
|
||||||
|
|
||||||
#include <linux/dma-buf.h>
|
|
||||||
#include "vgem_drv.h"
|
|
||||||
|
|
||||||
struct sg_table *vgem_gem_prime_get_sg_table(struct drm_gem_object *gobj)
|
|
||||||
{
|
|
||||||
struct drm_vgem_gem_object *obj = to_vgem_bo(gobj);
|
|
||||||
BUG_ON(obj->pages == NULL);
|
|
||||||
|
|
||||||
return drm_prime_pages_to_sg(obj->pages, obj->base.size / PAGE_SIZE);
|
|
||||||
}
|
|
||||||
|
|
||||||
int vgem_gem_prime_pin(struct drm_gem_object *gobj)
|
|
||||||
{
|
|
||||||
struct drm_vgem_gem_object *obj = to_vgem_bo(gobj);
|
|
||||||
return vgem_gem_get_pages(obj);
|
|
||||||
}
|
|
||||||
|
|
||||||
void vgem_gem_prime_unpin(struct drm_gem_object *gobj)
|
|
||||||
{
|
|
||||||
struct drm_vgem_gem_object *obj = to_vgem_bo(gobj);
|
|
||||||
vgem_gem_put_pages(obj);
|
|
||||||
}
|
|
||||||
|
|
||||||
void *vgem_gem_prime_vmap(struct drm_gem_object *gobj)
|
|
||||||
{
|
|
||||||
struct drm_vgem_gem_object *obj = to_vgem_bo(gobj);
|
|
||||||
BUG_ON(obj->pages == NULL);
|
|
||||||
|
|
||||||
return vmap(obj->pages, obj->base.size / PAGE_SIZE, 0, PAGE_KERNEL);
|
|
||||||
}
|
|
||||||
|
|
||||||
void vgem_gem_prime_vunmap(struct drm_gem_object *obj, void *vaddr)
|
|
||||||
{
|
|
||||||
vunmap(vaddr);
|
|
||||||
}
|
|
||||||
|
|
||||||
struct drm_gem_object *vgem_gem_prime_import(struct drm_device *dev,
|
|
||||||
struct dma_buf *dma_buf)
|
|
||||||
{
|
|
||||||
struct drm_vgem_gem_object *obj = NULL;
|
|
||||||
int ret;
|
|
||||||
|
|
||||||
obj = kzalloc(sizeof(*obj), GFP_KERNEL);
|
|
||||||
if (obj == NULL) {
|
|
||||||
ret = -ENOMEM;
|
|
||||||
goto fail;
|
|
||||||
}
|
|
||||||
|
|
||||||
ret = drm_gem_object_init(dev, &obj->base, dma_buf->size);
|
|
||||||
if (ret) {
|
|
||||||
ret = -ENOMEM;
|
|
||||||
goto fail_free;
|
|
||||||
}
|
|
||||||
|
|
||||||
get_dma_buf(dma_buf);
|
|
||||||
|
|
||||||
obj->base.dma_buf = dma_buf;
|
|
||||||
obj->use_dma_buf = true;
|
|
||||||
|
|
||||||
return &obj->base;
|
|
||||||
|
|
||||||
fail_free:
|
|
||||||
kfree(obj);
|
|
||||||
fail:
|
|
||||||
return ERR_PTR(ret);
|
|
||||||
}
|
|
@ -302,22 +302,13 @@ static const struct file_operations vgem_driver_fops = {
|
|||||||
};
|
};
|
||||||
|
|
||||||
static struct drm_driver vgem_driver = {
|
static struct drm_driver vgem_driver = {
|
||||||
.driver_features = DRIVER_GEM | DRIVER_PRIME,
|
.driver_features = DRIVER_GEM,
|
||||||
.gem_free_object = vgem_gem_free_object,
|
.gem_free_object = vgem_gem_free_object,
|
||||||
.gem_vm_ops = &vgem_gem_vm_ops,
|
.gem_vm_ops = &vgem_gem_vm_ops,
|
||||||
.ioctls = vgem_ioctls,
|
.ioctls = vgem_ioctls,
|
||||||
.fops = &vgem_driver_fops,
|
.fops = &vgem_driver_fops,
|
||||||
.dumb_create = vgem_gem_dumb_create,
|
.dumb_create = vgem_gem_dumb_create,
|
||||||
.dumb_map_offset = vgem_gem_dumb_map,
|
.dumb_map_offset = vgem_gem_dumb_map,
|
||||||
.prime_handle_to_fd = drm_gem_prime_handle_to_fd,
|
|
||||||
.prime_fd_to_handle = drm_gem_prime_fd_to_handle,
|
|
||||||
.gem_prime_export = drm_gem_prime_export,
|
|
||||||
.gem_prime_import = vgem_gem_prime_import,
|
|
||||||
.gem_prime_pin = vgem_gem_prime_pin,
|
|
||||||
.gem_prime_unpin = vgem_gem_prime_unpin,
|
|
||||||
.gem_prime_get_sg_table = vgem_gem_prime_get_sg_table,
|
|
||||||
.gem_prime_vmap = vgem_gem_prime_vmap,
|
|
||||||
.gem_prime_vunmap = vgem_gem_prime_vunmap,
|
|
||||||
.name = DRIVER_NAME,
|
.name = DRIVER_NAME,
|
||||||
.desc = DRIVER_DESC,
|
.desc = DRIVER_DESC,
|
||||||
.date = DRIVER_DATE,
|
.date = DRIVER_DATE,
|
||||||
|
@ -43,15 +43,4 @@ struct drm_vgem_gem_object {
|
|||||||
extern void vgem_gem_put_pages(struct drm_vgem_gem_object *obj);
|
extern void vgem_gem_put_pages(struct drm_vgem_gem_object *obj);
|
||||||
extern int vgem_gem_get_pages(struct drm_vgem_gem_object *obj);
|
extern int vgem_gem_get_pages(struct drm_vgem_gem_object *obj);
|
||||||
|
|
||||||
/* vgem_dma_buf.c */
|
|
||||||
extern struct sg_table *vgem_gem_prime_get_sg_table(
|
|
||||||
struct drm_gem_object *gobj);
|
|
||||||
extern int vgem_gem_prime_pin(struct drm_gem_object *gobj);
|
|
||||||
extern void vgem_gem_prime_unpin(struct drm_gem_object *gobj);
|
|
||||||
extern void *vgem_gem_prime_vmap(struct drm_gem_object *gobj);
|
|
||||||
extern void vgem_gem_prime_vunmap(struct drm_gem_object *obj, void *vaddr);
|
|
||||||
extern struct drm_gem_object *vgem_gem_prime_import(struct drm_device *dev,
|
|
||||||
struct dma_buf *dma_buf);
|
|
||||||
|
|
||||||
|
|
||||||
#endif
|
#endif
|
||||||
|
Loading…
Reference in New Issue
Block a user