[PATCH] mmc: Secure Digital Host Controller Interface driver
Driver for the Secure Digital Host Controller Interface specification. Signed-off-by: Pierre Ossman <drzeus@drzeus.cx> Cc: Russell King <rmk@arm.linux.org.uk> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
This commit is contained in:
Pierre Ossman
Linus Torvalds
parent
97f2478db1
commit
d129bceb1d
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@ -2488,6 +2488,13 @@ M: kristen.c.accardi@intel.com
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L: pcihpd-discuss@lists.sourceforge.net
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S: Maintained
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SECURE DIGITAL HOST CONTROLLER INTERFACE DRIVER
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P: Pierre Ossman
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M: drzeus-sdhci@drzeus.cx
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L: sdhci-devel@list.drzeus.cx
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W: http://mmc.drzeus.cx/wiki/Linux/Drivers/sdhci
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S: Maintained
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SKGE, SKY2 10/100/1000 GIGABIT ETHERNET DRIVERS
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P: Stephen Hemminger
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M: shemminger@osdl.org
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@ -49,6 +49,17 @@ config MMC_PXA
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If unsure, say N.
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config MMC_SDHCI
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tristate "Secure Digital Host Controller Interface support (EXPERIMENTAL)"
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depends on PCI && MMC && EXPERIMENTAL
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help
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This select the generic Secure Digital Host Controller Interface.
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It is used by manufacturers such as Texas Instruments(R), Ricoh(R)
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and Toshiba(R). Most controllers found in laptops are of this type.
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If you have a controller with this interface, say Y or M here.
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If unsure, say N.
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config MMC_WBSD
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tristate "Winbond W83L51xD SD/MMC Card Interface support"
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depends on MMC && ISA_DMA_API
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@ -17,6 +17,7 @@ obj-$(CONFIG_MMC_BLOCK) += mmc_block.o
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#
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obj-$(CONFIG_MMC_ARMMMCI) += mmci.o
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obj-$(CONFIG_MMC_PXA) += pxamci.o
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obj-$(CONFIG_MMC_SDHCI) += sdhci.o
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obj-$(CONFIG_MMC_WBSD) += wbsd.o
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obj-$(CONFIG_MMC_AU1X) += au1xmmc.o
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1265
drivers/mmc/sdhci.c
Normal file
1265
drivers/mmc/sdhci.c
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File diff suppressed because it is too large
Load Diff
185
drivers/mmc/sdhci.h
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185
drivers/mmc/sdhci.h
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@ -0,0 +1,185 @@
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/*
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* linux/drivers/mmc/sdhci.h - Secure Digital Host Controller Interface driver
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*
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* Copyright (C) 2005 Pierre Ossman, All Rights Reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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/*
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* PCI registers
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*/
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#define PCI_SLOT_INFO 0x40 /* 8 bits */
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#define PCI_SLOT_INFO_SLOTS(x) ((x >> 4) & 7)
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#define PCI_SLOT_INFO_FIRST_BAR_MASK 0x07
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/*
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* Controller registers
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*/
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#define SDHCI_DMA_ADDRESS 0x00
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#define SDHCI_BLOCK_SIZE 0x04
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#define SDHCI_BLOCK_COUNT 0x06
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#define SDHCI_ARGUMENT 0x08
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#define SDHCI_TRANSFER_MODE 0x0C
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#define SDHCI_TRNS_DMA 0x01
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#define SDHCI_TRNS_BLK_CNT_EN 0x02
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#define SDHCI_TRNS_ACMD12 0x04
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#define SDHCI_TRNS_READ 0x10
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#define SDHCI_TRNS_MULTI 0x20
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#define SDHCI_COMMAND 0x0E
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#define SDHCI_CMD_RESP_MASK 0x03
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#define SDHCI_CMD_CRC 0x08
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#define SDHCI_CMD_INDEX 0x10
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#define SDHCI_CMD_DATA 0x20
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#define SDHCI_CMD_RESP_NONE 0x00
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#define SDHCI_CMD_RESP_LONG 0x01
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#define SDHCI_CMD_RESP_SHORT 0x02
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#define SDHCI_CMD_RESP_SHORT_BUSY 0x03
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#define SDHCI_MAKE_CMD(c, f) (((c & 0xff) << 8) | (f & 0xff))
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#define SDHCI_RESPONSE 0x10
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#define SDHCI_BUFFER 0x20
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#define SDHCI_PRESENT_STATE 0x24
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#define SDHCI_CMD_INHIBIT 0x00000001
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#define SDHCI_DATA_INHIBIT 0x00000002
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#define SDHCI_DOING_WRITE 0x00000100
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#define SDHCI_DOING_READ 0x00000200
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#define SDHCI_SPACE_AVAILABLE 0x00000400
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#define SDHCI_DATA_AVAILABLE 0x00000800
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#define SDHCI_CARD_PRESENT 0x00010000
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#define SDHCI_WRITE_PROTECT 0x00080000
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#define SDHCI_HOST_CONTROL 0x28
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#define SDHCI_CTRL_LED 0x01
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#define SDHCI_CTRL_4BITBUS 0x02
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#define SDHCI_POWER_CONTROL 0x29
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#define SDHCI_BLOCK_GAP_CONTROL 0x2A
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#define SDHCI_WALK_UP_CONTROL 0x2B
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#define SDHCI_CLOCK_CONTROL 0x2C
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#define SDHCI_DIVIDER_SHIFT 8
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#define SDHCI_CLOCK_CARD_EN 0x0004
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#define SDHCI_CLOCK_INT_STABLE 0x0002
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#define SDHCI_CLOCK_INT_EN 0x0001
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#define SDHCI_TIMEOUT_CONTROL 0x2E
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#define SDHCI_SOFTWARE_RESET 0x2F
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#define SDHCI_RESET_ALL 0x01
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#define SDHCI_RESET_CMD 0x02
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#define SDHCI_RESET_DATA 0x04
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#define SDHCI_INT_STATUS 0x30
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#define SDHCI_INT_ENABLE 0x34
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#define SDHCI_SIGNAL_ENABLE 0x38
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#define SDHCI_INT_RESPONSE 0x00000001
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#define SDHCI_INT_DATA_END 0x00000002
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#define SDHCI_INT_DMA_END 0x00000008
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#define SDHCI_INT_BUF_EMPTY 0x00000010
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#define SDHCI_INT_BUF_FULL 0x00000020
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#define SDHCI_INT_CARD_INSERT 0x00000040
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#define SDHCI_INT_CARD_REMOVE 0x00000080
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#define SDHCI_INT_CARD_INT 0x00000100
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#define SDHCI_INT_TIMEOUT 0x00010000
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#define SDHCI_INT_CRC 0x00020000
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#define SDHCI_INT_END_BIT 0x00040000
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#define SDHCI_INT_INDEX 0x00080000
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#define SDHCI_INT_DATA_TIMEOUT 0x00100000
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#define SDHCI_INT_DATA_CRC 0x00200000
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#define SDHCI_INT_DATA_END_BIT 0x00400000
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#define SDHCI_INT_BUS_POWER 0x00800000
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#define SDHCI_INT_ACMD12ERR 0x01000000
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#define SDHCI_INT_NORMAL_MASK 0x00007FFF
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#define SDHCI_INT_ERROR_MASK 0xFFFF8000
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#define SDHCI_INT_CMD_MASK (SDHCI_INT_RESPONSE | SDHCI_INT_TIMEOUT | \
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SDHCI_INT_CRC | SDHCI_INT_END_BIT | SDHCI_INT_INDEX)
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#define SDHCI_INT_DATA_MASK (SDHCI_INT_DATA_END | SDHCI_INT_DMA_END | \
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SDHCI_INT_BUF_EMPTY | SDHCI_INT_BUF_FULL | \
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SDHCI_INT_DATA_TIMEOUT | SDHCI_INT_DATA_CRC | \
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SDHCI_INT_DATA_END_BIT)
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#define SDHCI_ACMD12_ERR 0x3C
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/* 3E-3F reserved */
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#define SDHCI_CAPABILITIES 0x40
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#define SDHCI_CAN_DO_DMA 0x00400000
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#define SDHCI_CLOCK_BASE_MASK 0x00003F00
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#define SDHCI_CLOCK_BASE_SHIFT 8
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/* 44-47 reserved for more caps */
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#define SDHCI_MAX_CURRENT 0x48
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/* 4C-4F reserved for more max current */
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/* 50-FB reserved */
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#define SDHCI_SLOT_INT_STATUS 0xFC
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#define SDHCI_HOST_VERSION 0xFE
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struct sdhci_chip;
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struct sdhci_host {
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struct sdhci_chip *chip;
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struct mmc_host *mmc; /* MMC structure */
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spinlock_t lock; /* Mutex */
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int flags; /* Host attributes */
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#define SDHCI_USE_DMA (1<<0)
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unsigned int max_clk; /* Max possible freq (MHz) */
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unsigned int clock; /* Current clock (MHz) */
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struct mmc_request *mrq; /* Current request */
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struct mmc_command *cmd; /* Current command */
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struct mmc_data *data; /* Current data request */
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struct scatterlist *cur_sg; /* We're working on this */
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char *mapped_sg; /* This is where it's mapped */
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int num_sg; /* Entries left */
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int offset; /* Offset into current sg */
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int remain; /* Bytes left in current */
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int size; /* Remaining bytes in transfer */
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char slot_descr[20]; /* Name for reservations */
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int irq; /* Device IRQ */
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int bar; /* PCI BAR index */
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unsigned long addr; /* Bus address */
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void __iomem * ioaddr; /* Mapped address */
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struct tasklet_struct card_tasklet; /* Tasklet structures */
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struct tasklet_struct finish_tasklet;
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struct timer_list timer; /* Timer for timeouts */
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};
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struct sdhci_chip {
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struct pci_dev *pdev;
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int num_slots; /* Slots on controller */
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struct sdhci_host *hosts[0]; /* Pointers to hosts */
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};
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