[PATCH] i386: move SIMD initialization
Move some code unrelated to any dealing with hardware bugs from i386's bugs.h to a more logical place. Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
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@ -1098,6 +1098,28 @@ void __init trap_init(void)
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#endif
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#endif
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set_trap_gate(19,&simd_coprocessor_error);
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set_trap_gate(19,&simd_coprocessor_error);
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if (cpu_has_fxsr) {
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/*
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* Verify that the FXSAVE/FXRSTOR data will be 16-byte aligned.
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* Generates a compile-time "error: zero width for bit-field" if
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* the alignment is wrong.
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*/
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struct fxsrAlignAssert {
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int _:!(offsetof(struct task_struct,
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thread.i387.fxsave) & 15);
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};
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printk(KERN_INFO "Enabling fast FPU save and restore... ");
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set_in_cr4(X86_CR4_OSFXSR);
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printk("done.\n");
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}
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if (cpu_has_xmm) {
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printk(KERN_INFO "Enabling unmasked SIMD FPU exception "
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"support... ");
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set_in_cr4(X86_CR4_OSXMMEXCPT);
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printk("done.\n");
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}
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set_system_gate(SYSCALL_VECTOR,&system_call);
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set_system_gate(SYSCALL_VECTOR,&system_call);
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/*
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/*
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@ -8,9 +8,6 @@
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* <rreilova@ececs.uc.edu>
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* <rreilova@ececs.uc.edu>
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* - Channing Corn (tests & fixes),
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* - Channing Corn (tests & fixes),
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* - Andrew D. Balsa (code cleanup).
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* - Andrew D. Balsa (code cleanup).
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*
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* Pentium III FXSR, SSE support
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* Gareth Hughes <gareth@valinux.com>, May 2000
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*/
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*/
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/*
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/*
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@ -76,25 +73,7 @@ static void __init check_fpu(void)
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return;
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return;
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}
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}
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/* Enable FXSR and company _before_ testing for FP problems. */
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/* trap_init() enabled FXSR and company _before_ testing for FP problems here. */
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/*
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* Verify that the FXSAVE/FXRSTOR data will be 16-byte aligned.
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*/
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if (offsetof(struct task_struct, thread.i387.fxsave) & 15) {
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extern void __buggy_fxsr_alignment(void);
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__buggy_fxsr_alignment();
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}
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if (cpu_has_fxsr) {
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printk(KERN_INFO "Enabling fast FPU save and restore... ");
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set_in_cr4(X86_CR4_OSFXSR);
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printk("done.\n");
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}
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if (cpu_has_xmm) {
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printk(KERN_INFO "Enabling unmasked SIMD FPU exception support... ");
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set_in_cr4(X86_CR4_OSXMMEXCPT);
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printk("done.\n");
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}
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/* Test for the divl bug.. */
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/* Test for the divl bug.. */
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__asm__("fninit\n\t"
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__asm__("fninit\n\t"
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"fldl %1\n\t"
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"fldl %1\n\t"
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