[POWERPC] prpmc2800: Convert DTS to v1 and add labels
Update the prpmc2800 DTS file to version 1 and add labels. I verified that there was no change in the resulting dtb file. Signed-off-by: Mark A. Greer <mgreer@mvista.com> Signed-off-by: Dale Farnsworth <dale@farnsworth.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
This commit is contained in:
Mark A. Greer
Paul Mackerras
parent
53bcddb915
commit
d528be50c6
@ -11,6 +11,8 @@
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* if it can determine the exact PrPMC type.
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*/
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/dts-v1/;
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/ {
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#address-cells = <1>;
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#size-cells = <1>;
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@ -25,19 +27,19 @@ cpus {
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PowerPC,7447 {
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device_type = "cpu";
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reg = <0>;
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clock-frequency = <2bb0b140>; /* Default (733 MHz) */
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bus-frequency = <7f28155>; /* 133.333333 MHz */
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timebase-frequency = <1fca055>; /* 33.333333 MHz */
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i-cache-line-size = <20>;
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d-cache-line-size = <20>;
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i-cache-size = <8000>;
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d-cache-size = <8000>;
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clock-frequency = <733000000>; /* Default */
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bus-frequency = <133333333>;
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timebase-frequency = <33333333>;
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i-cache-line-size = <32>;
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d-cache-line-size = <32>;
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i-cache-size = <32768>;
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d-cache-size = <32768>;
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};
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};
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memory {
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device_type = "memory";
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reg = <00000000 20000000>; /* Default (512MB) */
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reg = <0x0 0x20000000>; /* Default (512MB) */
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};
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mv64x60@f1000000 { /* Marvell Discovery */
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@ -45,26 +47,26 @@ mv64x60@f1000000 { /* Marvell Discovery */
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#size-cells = <1>;
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model = "mv64360"; /* Default */
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compatible = "marvell,mv64x60";
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clock-frequency = <7f28155>; /* 133.333333 MHz */
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reg = <f1000000 00010000>;
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virtual-reg = <f1000000>;
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ranges = <88000000 88000000 01000000 /* PCI 0 I/O Space */
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80000000 80000000 08000000 /* PCI 0 MEM Space */
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a0000000 a0000000 04000000 /* User FLASH */
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00000000 f1000000 00010000 /* Bridge's regs */
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f2000000 f2000000 00040000>; /* Integrated SRAM */
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clock-frequency = <133333333>;
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reg = <0xf1000000 0x10000>;
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virtual-reg = <0xf1000000>;
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ranges = <0x88000000 0x88000000 0x1000000 /* PCI 0 I/O Space */
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0x80000000 0x80000000 0x8000000 /* PCI 0 MEM Space */
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0xa0000000 0xa0000000 0x4000000 /* User FLASH */
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0x00000000 0xf1000000 0x0010000 /* Bridge's regs */
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0xf2000000 0xf2000000 0x0040000>;/* Integrated SRAM */
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flash@a0000000 {
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device_type = "rom";
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compatible = "direct-mapped";
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reg = <a0000000 4000000>; /* Default (64MB) */
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reg = <0xa0000000 0x4000000>; /* Default (64MB) */
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probe-type = "CFI";
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bank-width = <4>;
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partitions = <00000000 00100000 /* RO */
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00100000 00040001 /* RW */
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00140000 00400000 /* RO */
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00540000 039c0000 /* RO */
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03f00000 00100000>; /* RO */
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partitions = <0x00000000 0x00100000 /* RO */
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0x00100000 0x00040001 /* RW */
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0x00140000 0x00400000 /* RO */
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0x00540000 0x039c0000 /* RO */
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0x03f00000 0x00100000>; /* RO */
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partition-names = "FW Image A", "FW Config Data", "Kernel Image", "Filesystem", "FW Image B";
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};
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@ -73,170 +75,170 @@ mdio {
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#size-cells = <0>;
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device_type = "mdio";
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compatible = "marvell,mv64x60-mdio";
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ethernet-phy@1 {
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PHY0: ethernet-phy@1 {
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device_type = "ethernet-phy";
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compatible = "broadcom,bcm5421";
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interrupts = <4c>; /* GPP 12 */
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interrupt-parent = <&/mv64x60/pic>;
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interrupts = <76>; /* GPP 12 */
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interrupt-parent = <&PIC>;
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reg = <1>;
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};
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ethernet-phy@3 {
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PHY1: ethernet-phy@3 {
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device_type = "ethernet-phy";
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compatible = "broadcom,bcm5421";
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interrupts = <4c>; /* GPP 12 */
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interrupt-parent = <&/mv64x60/pic>;
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interrupts = <76>; /* GPP 12 */
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interrupt-parent = <&PIC>;
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reg = <3>;
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};
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};
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ethernet@2000 {
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reg = <2000 2000>;
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reg = <0x2000 0x2000>;
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eth0 {
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device_type = "network";
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compatible = "marvell,mv64x60-eth";
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block-index = <0>;
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interrupts = <20>;
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interrupt-parent = <&/mv64x60/pic>;
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phy = <&/mv64x60/mdio/ethernet-phy@1>;
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interrupts = <32>;
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interrupt-parent = <&PIC>;
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phy = <&PHY0>;
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local-mac-address = [ 00 00 00 00 00 00 ];
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};
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eth1 {
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device_type = "network";
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compatible = "marvell,mv64x60-eth";
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block-index = <1>;
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interrupts = <21>;
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interrupt-parent = <&/mv64x60/pic>;
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phy = <&/mv64x60/mdio/ethernet-phy@3>;
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interrupts = <33>;
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interrupt-parent = <&PIC>;
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phy = <&PHY1>;
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local-mac-address = [ 00 00 00 00 00 00 ];
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};
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};
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sdma@4000 {
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SDMA0: sdma@4000 {
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device_type = "dma";
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compatible = "marvell,mv64x60-sdma";
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reg = <4000 c18>;
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virtual-reg = <f1004000>;
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reg = <0x4000 0xc18>;
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virtual-reg = <0xf1004000>;
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interrupt-base = <0>;
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interrupts = <24>;
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interrupt-parent = <&/mv64x60/pic>;
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interrupts = <36>;
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interrupt-parent = <&PIC>;
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};
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sdma@6000 {
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SDMA1: sdma@6000 {
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device_type = "dma";
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compatible = "marvell,mv64x60-sdma";
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reg = <6000 c18>;
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virtual-reg = <f1006000>;
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reg = <0x6000 0xc18>;
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virtual-reg = <0xf1006000>;
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interrupt-base = <0>;
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interrupts = <26>;
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interrupt-parent = <&/mv64x60/pic>;
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interrupts = <38>;
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interrupt-parent = <&PIC>;
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};
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brg@b200 {
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BRG0: brg@b200 {
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compatible = "marvell,mv64x60-brg";
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reg = <b200 8>;
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reg = <0xb200 0x8>;
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clock-src = <8>;
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clock-frequency = <7ed6b40>;
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current-speed = <2580>;
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clock-frequency = <133000000>;
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current-speed = <9600>;
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bcr = <0>;
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};
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brg@b208 {
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BRG1: brg@b208 {
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compatible = "marvell,mv64x60-brg";
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reg = <b208 8>;
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reg = <0xb208 0x8>;
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clock-src = <8>;
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clock-frequency = <7ed6b40>;
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current-speed = <2580>;
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clock-frequency = <133000000>;
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current-speed = <9600>;
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bcr = <0>;
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};
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cunit@f200 {
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reg = <f200 200>;
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CUNIT: cunit@f200 {
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reg = <0xf200 0x200>;
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};
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mpscrouting@b400 {
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reg = <b400 c>;
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MPSCROUTING: mpscrouting@b400 {
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reg = <0xb400 0xc>;
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};
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mpscintr@b800 {
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reg = <b800 100>;
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virtual-reg = <f100b800>;
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MPSCINTR: mpscintr@b800 {
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reg = <0xb800 0x100>;
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virtual-reg = <0xf100b800>;
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};
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mpsc@8000 {
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MPSC0: mpsc@8000 {
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device_type = "serial";
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compatible = "marvell,mpsc";
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reg = <8000 38>;
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virtual-reg = <f1008000>;
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sdma = <&/mv64x60/sdma@4000>;
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brg = <&/mv64x60/brg@b200>;
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cunit = <&/mv64x60/cunit@f200>;
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mpscrouting = <&/mv64x60/mpscrouting@b400>;
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mpscintr = <&/mv64x60/mpscintr@b800>;
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reg = <0x8000 0x38>;
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virtual-reg = <0xf1008000>;
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sdma = <&SDMA0>;
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brg = <&BRG0>;
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cunit = <&CUNIT>;
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mpscrouting = <&MPSCROUTING>;
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mpscintr = <&MPSCINTR>;
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block-index = <0>;
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max_idle = <28>;
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max_idle = <40>;
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chr_1 = <0>;
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chr_2 = <0>;
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chr_10 = <3>;
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mpcr = <0>;
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interrupts = <28>;
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interrupt-parent = <&/mv64x60/pic>;
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interrupts = <40>;
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interrupt-parent = <&PIC>;
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};
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mpsc@9000 {
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MPSC1: mpsc@9000 {
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device_type = "serial";
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compatible = "marvell,mpsc";
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reg = <9000 38>;
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virtual-reg = <f1009000>;
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sdma = <&/mv64x60/sdma@6000>;
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brg = <&/mv64x60/brg@b208>;
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cunit = <&/mv64x60/cunit@f200>;
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mpscrouting = <&/mv64x60/mpscrouting@b400>;
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mpscintr = <&/mv64x60/mpscintr@b800>;
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reg = <0x9000 0x38>;
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virtual-reg = <0xf1009000>;
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sdma = <&SDMA1>;
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brg = <&BRG1>;
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cunit = <&CUNIT>;
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mpscrouting = <&MPSCROUTING>;
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mpscintr = <&MPSCINTR>;
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block-index = <1>;
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max_idle = <28>;
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max_idle = <40>;
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chr_1 = <0>;
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chr_2 = <0>;
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chr_10 = <3>;
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mpcr = <0>;
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interrupts = <2a>;
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interrupt-parent = <&/mv64x60/pic>;
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interrupts = <42>;
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interrupt-parent = <&PIC>;
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};
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wdt@b410 { /* watchdog timer */
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compatible = "marvell,mv64x60-wdt";
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reg = <b410 8>;
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timeout = <a>; /* wdt timeout in seconds */
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reg = <0xb410 0x8>;
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timeout = <10>; /* wdt timeout in seconds */
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};
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i2c@c000 {
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device_type = "i2c";
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compatible = "marvell,mv64x60-i2c";
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reg = <c000 20>;
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virtual-reg = <f100c000>;
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reg = <0xc000 0x20>;
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virtual-reg = <0xf100c000>;
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freq_m = <8>;
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freq_n = <3>;
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timeout = <3e8>; /* 1000 = 1 second */
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timeout = <1000>; /* 1000 = 1 second */
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retries = <1>;
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interrupts = <25>;
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interrupt-parent = <&/mv64x60/pic>;
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interrupts = <37>;
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interrupt-parent = <&PIC>;
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};
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pic {
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PIC: pic {
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#interrupt-cells = <1>;
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#address-cells = <0>;
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compatible = "marvell,mv64x60-pic";
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reg = <0000 88>;
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reg = <0x0 0x88>;
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interrupt-controller;
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};
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mpp@f000 {
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compatible = "marvell,mv64x60-mpp";
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reg = <f000 10>;
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reg = <0xf000 0x10>;
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};
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gpp@f100 {
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compatible = "marvell,mv64x60-gpp";
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reg = <f100 20>;
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reg = <0xf100 0x20>;
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};
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pci@80000000 {
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@ -245,72 +247,74 @@ pci@80000000 {
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#interrupt-cells = <1>;
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device_type = "pci";
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compatible = "marvell,mv64x60-pci";
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reg = <0cf8 8>;
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ranges = <01000000 0 0 88000000 0 01000000
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02000000 0 80000000 80000000 0 08000000>;
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bus-range = <0 ff>;
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clock-frequency = <3EF1480>;
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interrupt-pci-iack = <0c34>;
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interrupt-parent = <&/mv64x60/pic>;
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interrupt-map-mask = <f800 0 0 7>;
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reg = <0xcf8 0x8>;
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ranges = <0x01000000 0x0 0x0
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0x88000000 0x0 0x01000000
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0x02000000 0x0 0x80000000
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0x80000000 0x0 0x08000000>;
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bus-range = <0 255>;
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clock-frequency = <66000000>;
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interrupt-pci-iack = <0xc34>;
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interrupt-parent = <&PIC>;
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interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
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interrupt-map = <
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/* IDSEL 0x0a */
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5000 0 0 1 &/mv64x60/pic 50
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5000 0 0 2 &/mv64x60/pic 51
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5000 0 0 3 &/mv64x60/pic 5b
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5000 0 0 4 &/mv64x60/pic 5d
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0x5000 0 0 1 &PIC 80
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0x5000 0 0 2 &PIC 81
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0x5000 0 0 3 &PIC 91
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0x5000 0 0 4 &PIC 93
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/* IDSEL 0x0b */
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5800 0 0 1 &/mv64x60/pic 5b
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5800 0 0 2 &/mv64x60/pic 5d
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5800 0 0 3 &/mv64x60/pic 50
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5800 0 0 4 &/mv64x60/pic 51
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0x5800 0 0 1 &PIC 91
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0x5800 0 0 2 &PIC 93
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0x5800 0 0 3 &PIC 80
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0x5800 0 0 4 &PIC 81
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/* IDSEL 0x0c */
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6000 0 0 1 &/mv64x60/pic 5b
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6000 0 0 2 &/mv64x60/pic 5d
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6000 0 0 3 &/mv64x60/pic 50
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6000 0 0 4 &/mv64x60/pic 51
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0x6000 0 0 1 &PIC 91
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0x6000 0 0 2 &PIC 93
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0x6000 0 0 3 &PIC 80
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0x6000 0 0 4 &PIC 81
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/* IDSEL 0x0d */
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6800 0 0 1 &/mv64x60/pic 5d
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6800 0 0 2 &/mv64x60/pic 50
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6800 0 0 3 &/mv64x60/pic 51
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6800 0 0 4 &/mv64x60/pic 5b
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0x6800 0 0 1 &PIC 93
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0x6800 0 0 2 &PIC 80
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0x6800 0 0 3 &PIC 81
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0x6800 0 0 4 &PIC 91
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>;
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};
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cpu-error@0070 {
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compatible = "marvell,mv64x60-cpu-error";
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reg = <0070 10 0128 28>;
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interrupts = <03>;
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interrupt-parent = <&/mv64x60/pic>;
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reg = <0x70 0x10 0x128 0x28>;
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interrupts = <3>;
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interrupt-parent = <&PIC>;
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};
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sram-ctrl@0380 {
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compatible = "marvell,mv64x60-sram-ctrl";
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reg = <0380 80>;
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interrupts = <0d>;
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interrupt-parent = <&/mv64x60/pic>;
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reg = <0x380 0x80>;
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interrupts = <13>;
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interrupt-parent = <&PIC>;
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};
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pci-error@1d40 {
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compatible = "marvell,mv64x60-pci-error";
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reg = <1d40 40 0c28 4>;
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interrupts = <0c>;
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interrupt-parent = <&/mv64x60/pic>;
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reg = <0x1d40 0x40 0xc28 0x4>;
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interrupts = <12>;
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interrupt-parent = <&PIC>;
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};
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mem-ctrl@1400 {
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compatible = "marvell,mv64x60-mem-ctrl";
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reg = <1400 60>;
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interrupts = <11>;
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interrupt-parent = <&/mv64x60/pic>;
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reg = <0x1400 0x60>;
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interrupts = <17>;
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interrupt-parent = <&PIC>;
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};
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};
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chosen {
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bootargs = "ip=on";
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linux,stdout-path = "/mv64x60@f1000000/mpsc@8000";
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linux,stdout-path = &MPSC0;
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};
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};
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