EDAC: Prefer 'unsigned int' to bare use of 'unsigned'
Use of 'unsigned int' instead of bare use of 'unsigned'. Fix this for edac_mc*, ghes and the i5100 driver as reported by checkpatch.pl. While at it, struct member dev_ch_attribute->channel is always used as unsigned int. Change type to unsigned int to avoid type casts. [ bp: Massage. ] Signed-off-by: Robert Richter <rrichter@marvell.com> Signed-off-by: Borislav Petkov <bp@suse.de> Reviewed-by: Mauro Carvalho Chehab <mchehab@kernel.org> Cc: "linux-edac@vger.kernel.org" <linux-edac@vger.kernel.org> Cc: James Morse <james.morse@arm.com> Cc: Tony Luck <tony.luck@intel.com> Link: https://lkml.kernel.org/r/20190902123216.9809-2-rrichter@marvell.com
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@ -114,8 +114,8 @@ static const struct kernel_param_ops edac_report_ops = {
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module_param_cb(edac_report, &edac_report_ops, &edac_report, 0644);
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unsigned edac_dimm_info_location(struct dimm_info *dimm, char *buf,
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unsigned len)
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unsigned int edac_dimm_info_location(struct dimm_info *dimm, char *buf,
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unsigned int len)
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{
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struct mem_ctl_info *mci = dimm->mci;
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int i, n, count = 0;
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@ -236,9 +236,9 @@ EXPORT_SYMBOL_GPL(edac_mem_types);
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* At return, the pointer 'p' will be incremented to be used on a next call
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* to this function.
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*/
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void *edac_align_ptr(void **p, unsigned size, int n_elems)
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void *edac_align_ptr(void **p, unsigned int size, int n_elems)
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{
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unsigned align, r;
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unsigned int align, r;
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void *ptr = *p;
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*p += size * n_elems;
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@ -302,10 +302,10 @@ static void _edac_mc_free(struct mem_ctl_info *mci)
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kfree(mci);
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}
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struct mem_ctl_info *edac_mc_alloc(unsigned mc_num,
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unsigned n_layers,
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struct mem_ctl_info *edac_mc_alloc(unsigned int mc_num,
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unsigned int n_layers,
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struct edac_mc_layer *layers,
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unsigned sz_pvt)
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unsigned int sz_pvt)
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{
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struct mem_ctl_info *mci;
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struct edac_mc_layer *layer;
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@ -313,9 +313,9 @@ struct mem_ctl_info *edac_mc_alloc(unsigned mc_num,
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struct rank_info *chan;
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struct dimm_info *dimm;
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u32 *ce_per_layer[EDAC_MAX_LAYERS], *ue_per_layer[EDAC_MAX_LAYERS];
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unsigned pos[EDAC_MAX_LAYERS];
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unsigned size, tot_dimms = 1, count = 1;
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unsigned tot_csrows = 1, tot_channels = 1, tot_errcount = 0;
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unsigned int pos[EDAC_MAX_LAYERS];
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unsigned int size, tot_dimms = 1, count = 1;
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unsigned int tot_csrows = 1, tot_channels = 1, tot_errcount = 0;
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void *pvt, *p, *ptr = NULL;
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int i, j, row, chn, n, len, off;
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bool per_rank = false;
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@ -122,10 +122,10 @@ do { \
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* On success, return a pointer to struct mem_ctl_info pointer;
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* %NULL otherwise
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*/
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struct mem_ctl_info *edac_mc_alloc(unsigned mc_num,
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unsigned n_layers,
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struct mem_ctl_info *edac_mc_alloc(unsigned int mc_num,
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unsigned int n_layers,
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struct edac_mc_layer *layers,
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unsigned sz_pvt);
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unsigned int sz_pvt);
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/**
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* edac_get_owner - Return the owner's mod_name of EDAC MC
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@ -131,7 +131,7 @@ static const char * const edac_caps[] = {
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struct dev_ch_attribute {
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struct device_attribute attr;
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int channel;
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unsigned int channel;
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};
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#define DEVICE_CHANNEL(_name, _mode, _show, _store, _var) \
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@ -200,7 +200,7 @@ static ssize_t channel_dimm_label_show(struct device *dev,
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char *data)
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{
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struct csrow_info *csrow = to_csrow(dev);
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unsigned chan = to_channel(mattr);
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unsigned int chan = to_channel(mattr);
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struct rank_info *rank = csrow->channels[chan];
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/* if field has not been initialized, there is nothing to send */
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@ -216,7 +216,7 @@ static ssize_t channel_dimm_label_store(struct device *dev,
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const char *data, size_t count)
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{
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struct csrow_info *csrow = to_csrow(dev);
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unsigned chan = to_channel(mattr);
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unsigned int chan = to_channel(mattr);
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struct rank_info *rank = csrow->channels[chan];
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size_t copy_count = count;
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@ -240,7 +240,7 @@ static ssize_t channel_ce_count_show(struct device *dev,
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struct device_attribute *mattr, char *data)
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{
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struct csrow_info *csrow = to_csrow(dev);
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unsigned chan = to_channel(mattr);
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unsigned int chan = to_channel(mattr);
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struct rank_info *rank = csrow->channels[chan];
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return sprintf(data, "%u\n", rank->ce_count);
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@ -68,7 +68,7 @@ struct memdev_dmi_entry {
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struct ghes_edac_dimm_fill {
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struct mem_ctl_info *mci;
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unsigned count;
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unsigned int count;
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};
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static void ghes_edac_count_dimms(const struct dmi_header *dh, void *arg)
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@ -417,7 +417,8 @@ static const char *i5100_err_msg(unsigned err)
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}
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/* convert csrow index into a rank (per channel -- 0..5) */
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static int i5100_csrow_to_rank(const struct mem_ctl_info *mci, int csrow)
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static unsigned int i5100_csrow_to_rank(const struct mem_ctl_info *mci,
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unsigned int csrow)
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{
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const struct i5100_priv *priv = mci->pvt_info;
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@ -425,7 +426,8 @@ static int i5100_csrow_to_rank(const struct mem_ctl_info *mci, int csrow)
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}
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/* convert csrow index into a channel (0..1) */
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static int i5100_csrow_to_chan(const struct mem_ctl_info *mci, int csrow)
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static unsigned int i5100_csrow_to_chan(const struct mem_ctl_info *mci,
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unsigned int csrow)
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{
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const struct i5100_priv *priv = mci->pvt_info;
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@ -653,11 +655,11 @@ static struct pci_dev *pci_get_device_func(unsigned vendor,
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return ret;
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}
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static unsigned long i5100_npages(struct mem_ctl_info *mci, int csrow)
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static unsigned long i5100_npages(struct mem_ctl_info *mci, unsigned int csrow)
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{
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struct i5100_priv *priv = mci->pvt_info;
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const unsigned chan_rank = i5100_csrow_to_rank(mci, csrow);
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const unsigned chan = i5100_csrow_to_chan(mci, csrow);
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const unsigned int chan_rank = i5100_csrow_to_rank(mci, csrow);
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const unsigned int chan = i5100_csrow_to_chan(mci, csrow);
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unsigned addr_lines;
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/* dimm present? */
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@ -852,8 +854,8 @@ static void i5100_init_csrows(struct mem_ctl_info *mci)
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for (i = 0; i < mci->tot_dimms; i++) {
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struct dimm_info *dimm;
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const unsigned long npages = i5100_npages(mci, i);
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const unsigned chan = i5100_csrow_to_chan(mci, i);
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const unsigned rank = i5100_csrow_to_rank(mci, i);
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const unsigned int chan = i5100_csrow_to_chan(mci, i);
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const unsigned int rank = i5100_csrow_to_rank(mci, i);
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if (!npages)
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continue;
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@ -440,7 +440,7 @@ struct dimm_info {
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char label[EDAC_MC_LABEL_LEN + 1]; /* DIMM label on motherboard */
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/* Memory location data */
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unsigned location[EDAC_MAX_LAYERS];
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unsigned int location[EDAC_MAX_LAYERS];
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struct mem_ctl_info *mci; /* the parent */
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@ -451,7 +451,7 @@ struct dimm_info {
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u32 nr_pages; /* number of pages on this dimm */
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unsigned csrow, cschannel; /* Points to the old API data */
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unsigned int csrow, cschannel; /* Points to the old API data */
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u16 smbios_handle; /* Handle for SMBIOS type 17 */
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};
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@ -597,7 +597,7 @@ struct mem_ctl_info {
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unsigned long page);
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int mc_idx;
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struct csrow_info **csrows;
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unsigned nr_csrows, num_cschannel;
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unsigned int nr_csrows, num_cschannel;
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/*
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* Memory Controller hierarchy
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@ -608,14 +608,14 @@ struct mem_ctl_info {
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* of the recent drivers enumerate memories per DIMM, instead.
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* When the memory controller is per rank, csbased is true.
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*/
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unsigned n_layers;
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unsigned int n_layers;
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struct edac_mc_layer *layers;
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bool csbased;
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/*
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* DIMM info. Will eventually remove the entire csrows_info some day
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*/
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unsigned tot_dimms;
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unsigned int tot_dimms;
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struct dimm_info **dimms;
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/*
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