[WATCHDOG] the scheduled removal of the i8xx_tco watchdog driver
This patch contains the scheduled removal of the i8xx_tco watchdog driver. Signed-off-by: Adrian Bunk <bunk@stusta.de> Signed-off-by: Wim Van Sebroeck <wim@iguana.be>
This commit is contained in:
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@ -288,14 +288,6 @@ Who: Richard Purdie <rpurdie@rpsys.net>
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---------------------------
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What: i8xx_tco watchdog driver
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When: in 2.6.22
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Why: the i8xx_tco watchdog driver has been replaced by the iTCO_wdt
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watchdog driver.
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Who: Wim Van Sebroeck <wim@iguana.be>
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---------------------------
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What: Multipath cached routing support in ipv4
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When: in 2.6.23
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Why: Code was merged, then submitter immediately disappeared leaving
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@ -1644,12 +1644,6 @@ P: H. Peter Anvin
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M: hpa@zytor.com
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S: Maintained
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i810 TCO TIMER WATCHDOG
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P: Nils Faerber
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M: nils@kernelconcepts.de
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W: http://www.kernelconcepts.de/
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S: Maintained
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IA64 (Itanium) PLATFORM
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P: Tony Luck
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M: tony.luck@intel.com
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@ -298,28 +298,6 @@ config I6300ESB_WDT
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To compile this driver as a module, choose M here: the
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module will be called i6300esb.
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config I8XX_TCO
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tristate "Intel i8xx TCO Timer/Watchdog"
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depends on WATCHDOG && (X86 || IA64) && PCI
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default n
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---help---
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Hardware driver for the TCO timer built into the Intel 82801
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I/O Controller Hub family. The TCO (Total Cost of Ownership)
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timer is a watchdog timer that will reboot the machine after
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its second expiration. The expiration time can be configured
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with the "heartbeat" parameter.
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On some motherboards the driver may fail to reset the chipset's
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NO_REBOOT flag which prevents the watchdog from rebooting the
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machine. If this is the case you will get a kernel message like
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"failed to reset NO_REBOOT flag, reboot disabled by hardware".
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To compile this driver as a module, choose M here: the
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module will be called i8xx_tco.
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Note: This driver will be removed in the near future. Please
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use the Intel TCO Timer/Watchdog driver.
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config ITCO_WDT
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tristate "Intel TCO Timer/Watchdog"
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depends on WATCHDOG && (X86 || IA64) && PCI
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@ -46,7 +46,6 @@ obj-$(CONFIG_IB700_WDT) += ib700wdt.o
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obj-$(CONFIG_IBMASR) += ibmasr.o
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obj-$(CONFIG_WAFER_WDT) += wafer5823wdt.o
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obj-$(CONFIG_I6300ESB_WDT) += i6300esb.o
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obj-$(CONFIG_I8XX_TCO) += i8xx_tco.o
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obj-$(CONFIG_ITCO_WDT) += iTCO_wdt.o iTCO_vendor_support.o
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obj-$(CONFIG_SC1200_WDT) += sc1200wdt.o
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obj-$(CONFIG_SCx200_WDT) += scx200_wdt.o
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@ -1,571 +0,0 @@
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/*
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* i8xx_tco: TCO timer driver for i8xx chipsets
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*
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* (c) Copyright 2000 kernel concepts <nils@kernelconcepts.de>, All Rights Reserved.
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* http://www.kernelconcepts.de
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*
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* Neither kernel concepts nor Nils Faerber admit liability nor provide
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* warranty for any of this software. This material is provided
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* "AS-IS" and at no charge.
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*
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* (c) Copyright 2000 kernel concepts <nils@kernelconcepts.de>
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* developed for
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* Jentro AG, Haar/Munich (Germany)
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*
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* TCO timer driver for i8xx chipsets
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* based on softdog.c by Alan Cox <alan@redhat.com>
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*
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* The TCO timer is implemented in the following I/O controller hubs:
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* (See the intel documentation on http://developer.intel.com.)
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* 82801AA (ICH) : document number 290655-003, 290677-014,
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* 82801AB (ICHO) : document number 290655-003, 290677-014,
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* 82801BA (ICH2) : document number 290687-002, 298242-027,
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* 82801BAM (ICH2-M) : document number 290687-002, 298242-027,
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* 82801CA (ICH3-S) : document number 290733-003, 290739-013,
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* 82801CAM (ICH3-M) : document number 290716-001, 290718-007,
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* 82801DB (ICH4) : document number 290744-001, 290745-020,
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* 82801DBM (ICH4-M) : document number 252337-001, 252663-005,
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* 82801E (C-ICH) : document number 273599-001, 273645-002,
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* 82801EB (ICH5) : document number 252516-001, 252517-003,
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* 82801ER (ICH5R) : document number 252516-001, 252517-003,
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*
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* 20000710 Nils Faerber
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* Initial Version 0.01
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* 20000728 Nils Faerber
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* 0.02 Fix for SMI_EN->TCO_EN bit, some cleanups
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* 20011214 Matt Domsch <Matt_Domsch@dell.com>
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* 0.03 Added nowayout module option to override CONFIG_WATCHDOG_NOWAYOUT
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* Didn't add timeout option as i810_margin already exists.
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* 20020224 Joel Becker, Wim Van Sebroeck
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* 0.04 Support for 82801CA(M) chipset, timer margin needs to be > 3,
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* add support for WDIOC_SETTIMEOUT and WDIOC_GETTIMEOUT.
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* 20020412 Rob Radez <rob@osinvestor.com>, Wim Van Sebroeck
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* 0.05 Fix possible timer_alive race, add expect close support,
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* clean up ioctls (WDIOC_GETSTATUS, WDIOC_GETBOOTSTATUS and
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* WDIOC_SETOPTIONS), made i810tco_getdevice __init,
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* removed boot_status, removed tco_timer_read,
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* added support for 82801DB and 82801E chipset,
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* added support for 82801EB and 8280ER chipset,
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* general cleanup.
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* 20030921 Wim Van Sebroeck <wim@iguana.be>
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* 0.06 change i810_margin to heartbeat, use module_param,
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* added notify system support, renamed module to i8xx_tco.
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* 20050128 Wim Van Sebroeck <wim@iguana.be>
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* 0.07 Added support for the ICH4-M, ICH6, ICH6R, ICH6-M, ICH6W and ICH6RW
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* chipsets. Also added support for the "undocumented" ICH7 chipset.
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* 20050807 Wim Van Sebroeck <wim@iguana.be>
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* 0.08 Make sure that the watchdog is only "armed" when started.
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* (Kernel Bug 4251)
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* 20060416 Wim Van Sebroeck <wim@iguana.be>
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* 0.09 Remove support for the ICH6, ICH6R, ICH6-M, ICH6W and ICH6RW and
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* ICH7 chipsets. (See Kernel Bug 6031 - other code will support these
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* chipsets)
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*/
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/*
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* Includes, defines, variables, module parameters, ...
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*/
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#include <linux/module.h>
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#include <linux/moduleparam.h>
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#include <linux/types.h>
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#include <linux/miscdevice.h>
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#include <linux/watchdog.h>
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#include <linux/notifier.h>
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#include <linux/reboot.h>
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#include <linux/init.h>
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#include <linux/fs.h>
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#include <linux/pci.h>
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#include <linux/ioport.h>
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#include <asm/uaccess.h>
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#include <asm/io.h>
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#include "i8xx_tco.h"
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/* Module and version information */
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#define TCO_VERSION "0.09"
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#define TCO_MODULE_NAME "i8xx TCO timer"
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#define TCO_DRIVER_NAME TCO_MODULE_NAME ", v" TCO_VERSION
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#define PFX TCO_MODULE_NAME ": "
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/* internal variables */
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static unsigned int ACPIBASE;
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static spinlock_t tco_lock; /* Guards the hardware */
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static unsigned long timer_alive;
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static char tco_expect_close;
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static struct pci_dev *i8xx_tco_pci;
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/* module parameters */
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#define WATCHDOG_HEARTBEAT 30 /* 30 sec default heartbeat (2<heartbeat<39) */
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static int heartbeat = WATCHDOG_HEARTBEAT; /* in seconds */
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module_param(heartbeat, int, 0);
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MODULE_PARM_DESC(heartbeat, "Watchdog heartbeat in seconds. (2<heartbeat<39, default=" __MODULE_STRING(WATCHDOG_HEARTBEAT) ")");
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static int nowayout = WATCHDOG_NOWAYOUT;
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module_param(nowayout, int, 0);
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MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
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/*
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* Some TCO specific functions
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*/
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static inline unsigned char seconds_to_ticks(int seconds)
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{
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/* the internal timer is stored as ticks which decrement
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* every 0.6 seconds */
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return (seconds * 10) / 6;
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}
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static int tco_timer_start (void)
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{
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unsigned char val;
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spin_lock(&tco_lock);
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/* disable chipset's NO_REBOOT bit */
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pci_read_config_byte (i8xx_tco_pci, 0xd4, &val);
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val &= 0xfd;
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pci_write_config_byte (i8xx_tco_pci, 0xd4, val);
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/* Bit 11: TCO Timer Halt -> 0 = The TCO timer is enabled to count */
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val = inb (TCO1_CNT + 1);
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val &= 0xf7;
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outb (val, TCO1_CNT + 1);
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val = inb (TCO1_CNT + 1);
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spin_unlock(&tco_lock);
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if (val & 0x08)
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return -1;
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return 0;
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}
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static int tco_timer_stop (void)
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{
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unsigned char val, val1;
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spin_lock(&tco_lock);
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/* Bit 11: TCO Timer Halt -> 1 = The TCO timer is disabled */
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val = inb (TCO1_CNT + 1);
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val |= 0x08;
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outb (val, TCO1_CNT + 1);
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val = inb (TCO1_CNT + 1);
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/* Set the NO_REBOOT bit to prevent later reboots, just for sure */
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pci_read_config_byte (i8xx_tco_pci, 0xd4, &val1);
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val1 |= 0x02;
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pci_write_config_byte (i8xx_tco_pci, 0xd4, val1);
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spin_unlock(&tco_lock);
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if ((val & 0x08) == 0)
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return -1;
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return 0;
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}
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static int tco_timer_keepalive (void)
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{
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spin_lock(&tco_lock);
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/* Reload the timer by writing to the TCO Timer Reload register */
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outb (0x01, TCO1_RLD);
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spin_unlock(&tco_lock);
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return 0;
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}
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static int tco_timer_set_heartbeat (int t)
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{
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unsigned char val;
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unsigned char tmrval;
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tmrval = seconds_to_ticks(t);
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/* from the specs: */
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/* "Values of 0h-3h are ignored and should not be attempted" */
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if (tmrval > 0x3f || tmrval < 0x04)
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return -EINVAL;
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/* Write new heartbeat to watchdog */
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spin_lock(&tco_lock);
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val = inb (TCO1_TMR);
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val &= 0xc0;
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val |= tmrval;
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outb (val, TCO1_TMR);
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val = inb (TCO1_TMR);
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spin_unlock(&tco_lock);
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if ((val & 0x3f) != tmrval)
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return -EINVAL;
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heartbeat = t;
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return 0;
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}
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static int tco_timer_get_timeleft (int *time_left)
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{
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unsigned char val;
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spin_lock(&tco_lock);
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/* read the TCO Timer */
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val = inb (TCO1_RLD);
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val &= 0x3f;
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spin_unlock(&tco_lock);
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*time_left = (int)((val * 6) / 10);
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return 0;
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}
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/*
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* /dev/watchdog handling
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*/
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static int i8xx_tco_open (struct inode *inode, struct file *file)
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{
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/* /dev/watchdog can only be opened once */
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if (test_and_set_bit(0, &timer_alive))
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return -EBUSY;
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/*
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* Reload and activate timer
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*/
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tco_timer_keepalive ();
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tco_timer_start ();
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return nonseekable_open(inode, file);
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}
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static int i8xx_tco_release (struct inode *inode, struct file *file)
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{
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/*
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* Shut off the timer.
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*/
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if (tco_expect_close == 42) {
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tco_timer_stop ();
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} else {
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printk(KERN_CRIT PFX "Unexpected close, not stopping watchdog!\n");
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tco_timer_keepalive ();
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}
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clear_bit(0, &timer_alive);
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tco_expect_close = 0;
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return 0;
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}
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static ssize_t i8xx_tco_write (struct file *file, const char __user *data,
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size_t len, loff_t * ppos)
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{
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/* See if we got the magic character 'V' and reload the timer */
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if (len) {
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if (!nowayout) {
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size_t i;
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/* note: just in case someone wrote the magic character
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* five months ago... */
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tco_expect_close = 0;
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/* scan to see whether or not we got the magic character */
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for (i = 0; i != len; i++) {
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char c;
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if(get_user(c, data+i))
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return -EFAULT;
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if (c == 'V')
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tco_expect_close = 42;
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}
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}
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/* someone wrote to us, we should reload the timer */
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tco_timer_keepalive ();
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}
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return len;
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}
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static int i8xx_tco_ioctl (struct inode *inode, struct file *file,
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unsigned int cmd, unsigned long arg)
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{
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int new_options, retval = -EINVAL;
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int new_heartbeat;
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int time_left;
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void __user *argp = (void __user *)arg;
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int __user *p = argp;
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static struct watchdog_info ident = {
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.options = WDIOF_SETTIMEOUT |
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WDIOF_KEEPALIVEPING |
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WDIOF_MAGICCLOSE,
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.firmware_version = 0,
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.identity = TCO_MODULE_NAME,
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};
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switch (cmd) {
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case WDIOC_GETSUPPORT:
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return copy_to_user(argp, &ident,
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sizeof (ident)) ? -EFAULT : 0;
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case WDIOC_GETSTATUS:
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case WDIOC_GETBOOTSTATUS:
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return put_user (0, p);
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case WDIOC_KEEPALIVE:
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tco_timer_keepalive ();
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return 0;
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case WDIOC_SETOPTIONS:
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{
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if (get_user (new_options, p))
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return -EFAULT;
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if (new_options & WDIOS_DISABLECARD) {
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tco_timer_stop ();
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retval = 0;
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}
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if (new_options & WDIOS_ENABLECARD) {
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tco_timer_keepalive ();
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tco_timer_start ();
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retval = 0;
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}
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return retval;
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}
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case WDIOC_SETTIMEOUT:
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{
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if (get_user(new_heartbeat, p))
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return -EFAULT;
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if (tco_timer_set_heartbeat(new_heartbeat))
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return -EINVAL;
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tco_timer_keepalive ();
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/* Fall */
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}
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case WDIOC_GETTIMEOUT:
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return put_user(heartbeat, p);
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case WDIOC_GETTIMELEFT:
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{
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if (tco_timer_get_timeleft(&time_left))
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return -EINVAL;
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return put_user(time_left, p);
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}
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default:
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return -ENOTTY;
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}
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}
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/*
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* Notify system
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*/
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static int i8xx_tco_notify_sys (struct notifier_block *this, unsigned long code, void *unused)
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{
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if (code==SYS_DOWN || code==SYS_HALT) {
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/* Turn the WDT off */
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tco_timer_stop ();
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}
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return NOTIFY_DONE;
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}
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/*
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* Kernel Interfaces
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*/
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static const struct file_operations i8xx_tco_fops = {
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.owner = THIS_MODULE,
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.llseek = no_llseek,
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.write = i8xx_tco_write,
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.ioctl = i8xx_tco_ioctl,
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.open = i8xx_tco_open,
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.release = i8xx_tco_release,
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};
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static struct miscdevice i8xx_tco_miscdev = {
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.minor = WATCHDOG_MINOR,
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.name = "watchdog",
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.fops = &i8xx_tco_fops,
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};
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static struct notifier_block i8xx_tco_notifier = {
|
||||
.notifier_call = i8xx_tco_notify_sys,
|
||||
};
|
||||
|
||||
/*
|
||||
* Data for PCI driver interface
|
||||
*
|
||||
* This data only exists for exporting the supported
|
||||
* PCI ids via MODULE_DEVICE_TABLE. We do not actually
|
||||
* register a pci_driver, because someone else might one day
|
||||
* want to register another driver on the same PCI id.
|
||||
*/
|
||||
static struct pci_device_id i8xx_tco_pci_tbl[] = {
|
||||
{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801AA_0) },
|
||||
{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801AB_0) },
|
||||
{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801BA_0) },
|
||||
{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801BA_10) },
|
||||
{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801CA_0) },
|
||||
{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801CA_12) },
|
||||
{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801DB_0) },
|
||||
{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801DB_12) },
|
||||
{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801E_0) },
|
||||
{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801EB_0) },
|
||||
{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ESB_1) },
|
||||
{ }, /* End of list */
|
||||
};
|
||||
MODULE_DEVICE_TABLE (pci, i8xx_tco_pci_tbl);
|
||||
|
||||
/*
|
||||
* Init & exit routines
|
||||
*/
|
||||
|
||||
static unsigned char __init i8xx_tco_getdevice (void)
|
||||
{
|
||||
struct pci_dev *dev = NULL;
|
||||
u8 val1, val2;
|
||||
u16 badr;
|
||||
/*
|
||||
* Find the PCI device
|
||||
*/
|
||||
|
||||
for_each_pci_dev(dev)
|
||||
if (pci_match_id(i8xx_tco_pci_tbl, dev)) {
|
||||
i8xx_tco_pci = dev;
|
||||
break;
|
||||
}
|
||||
|
||||
if (i8xx_tco_pci) {
|
||||
/*
|
||||
* Find the ACPI base I/O address which is the base
|
||||
* for the TCO registers (TCOBASE=ACPIBASE + 0x60)
|
||||
* ACPIBASE is bits [15:7] from 0x40-0x43
|
||||
*/
|
||||
pci_read_config_byte (i8xx_tco_pci, 0x40, &val1);
|
||||
pci_read_config_byte (i8xx_tco_pci, 0x41, &val2);
|
||||
badr = ((val2 << 1) | (val1 >> 7)) << 7;
|
||||
ACPIBASE = badr;
|
||||
/* Something's wrong here, ACPIBASE has to be set */
|
||||
if (badr == 0x0001 || badr == 0x0000) {
|
||||
printk (KERN_ERR PFX "failed to get TCOBASE address\n");
|
||||
pci_dev_put(i8xx_tco_pci);
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* Check chipset's NO_REBOOT bit */
|
||||
pci_read_config_byte (i8xx_tco_pci, 0xd4, &val1);
|
||||
if (val1 & 0x02) {
|
||||
val1 &= 0xfd;
|
||||
pci_write_config_byte (i8xx_tco_pci, 0xd4, val1);
|
||||
pci_read_config_byte (i8xx_tco_pci, 0xd4, &val1);
|
||||
if (val1 & 0x02) {
|
||||
printk (KERN_ERR PFX "failed to reset NO_REBOOT flag, reboot disabled by hardware\n");
|
||||
pci_dev_put(i8xx_tco_pci);
|
||||
return 0; /* Cannot reset NO_REBOOT bit */
|
||||
}
|
||||
}
|
||||
/* Disable reboots untill the watchdog starts */
|
||||
val1 |= 0x02;
|
||||
pci_write_config_byte (i8xx_tco_pci, 0xd4, val1);
|
||||
|
||||
/* Set the TCO_EN bit in SMI_EN register */
|
||||
if (!request_region (SMI_EN + 1, 1, "i8xx TCO")) {
|
||||
printk (KERN_ERR PFX "I/O address 0x%04x already in use\n",
|
||||
SMI_EN + 1);
|
||||
pci_dev_put(i8xx_tco_pci);
|
||||
return 0;
|
||||
}
|
||||
val1 = inb (SMI_EN + 1);
|
||||
val1 &= 0xdf;
|
||||
outb (val1, SMI_EN + 1);
|
||||
release_region (SMI_EN + 1, 1);
|
||||
return 1;
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int __init watchdog_init (void)
|
||||
{
|
||||
int ret;
|
||||
|
||||
spin_lock_init(&tco_lock);
|
||||
|
||||
/* Check whether or not the hardware watchdog is there */
|
||||
if (!i8xx_tco_getdevice () || i8xx_tco_pci == NULL)
|
||||
return -ENODEV;
|
||||
|
||||
if (!request_region (TCOBASE, 0x10, "i8xx TCO")) {
|
||||
printk (KERN_ERR PFX "I/O address 0x%04x already in use\n",
|
||||
TCOBASE);
|
||||
ret = -EIO;
|
||||
goto out;
|
||||
}
|
||||
|
||||
/* Clear out the (probably old) status */
|
||||
outb (0, TCO1_STS);
|
||||
outb (3, TCO2_STS);
|
||||
|
||||
/* Check that the heartbeat value is within it's range ; if not reset to the default */
|
||||
if (tco_timer_set_heartbeat (heartbeat)) {
|
||||
heartbeat = WATCHDOG_HEARTBEAT;
|
||||
tco_timer_set_heartbeat (heartbeat);
|
||||
printk(KERN_INFO PFX "heartbeat value must be 2<heartbeat<39, using %d\n",
|
||||
heartbeat);
|
||||
}
|
||||
|
||||
ret = register_reboot_notifier(&i8xx_tco_notifier);
|
||||
if (ret != 0) {
|
||||
printk(KERN_ERR PFX "cannot register reboot notifier (err=%d)\n",
|
||||
ret);
|
||||
goto unreg_region;
|
||||
}
|
||||
|
||||
ret = misc_register(&i8xx_tco_miscdev);
|
||||
if (ret != 0) {
|
||||
printk(KERN_ERR PFX "cannot register miscdev on minor=%d (err=%d)\n",
|
||||
WATCHDOG_MINOR, ret);
|
||||
goto unreg_notifier;
|
||||
}
|
||||
|
||||
tco_timer_stop ();
|
||||
|
||||
printk (KERN_INFO PFX "initialized (0x%04x). heartbeat=%d sec (nowayout=%d)\n",
|
||||
TCOBASE, heartbeat, nowayout);
|
||||
|
||||
return 0;
|
||||
|
||||
unreg_notifier:
|
||||
unregister_reboot_notifier(&i8xx_tco_notifier);
|
||||
unreg_region:
|
||||
release_region (TCOBASE, 0x10);
|
||||
out:
|
||||
pci_dev_put(i8xx_tco_pci);
|
||||
return ret;
|
||||
}
|
||||
|
||||
static void __exit watchdog_cleanup (void)
|
||||
{
|
||||
/* Stop the timer before we leave */
|
||||
if (!nowayout)
|
||||
tco_timer_stop ();
|
||||
|
||||
/* Deregister */
|
||||
misc_deregister (&i8xx_tco_miscdev);
|
||||
unregister_reboot_notifier(&i8xx_tco_notifier);
|
||||
release_region (TCOBASE, 0x10);
|
||||
|
||||
pci_dev_put(i8xx_tco_pci);
|
||||
}
|
||||
|
||||
module_init(watchdog_init);
|
||||
module_exit(watchdog_cleanup);
|
||||
|
||||
MODULE_AUTHOR("Nils Faerber");
|
||||
MODULE_DESCRIPTION("TCO timer driver for i8xx chipsets");
|
||||
MODULE_LICENSE("GPL");
|
||||
MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);
|
@ -1,42 +0,0 @@
|
||||
/*
|
||||
* i8xx_tco: TCO timer driver for i8xx chipsets
|
||||
*
|
||||
* (c) Copyright 2000 kernel concepts <nils@kernelconcepts.de>, All Rights Reserved.
|
||||
* http://www.kernelconcepts.de
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License
|
||||
* as published by the Free Software Foundation; either version
|
||||
* 2 of the License, or (at your option) any later version.
|
||||
*
|
||||
* Neither kernel concepts nor Nils Faerber admit liability nor provide
|
||||
* warranty for any of this software. This material is provided
|
||||
* "AS-IS" and at no charge.
|
||||
*
|
||||
* (c) Copyright 2000 kernel concepts <nils@kernelconcepts.de>
|
||||
* developed for
|
||||
* Jentro AG, Haar/Munich (Germany)
|
||||
*
|
||||
* TCO timer driver for i8xx chipsets
|
||||
* based on softdog.c by Alan Cox <alan@redhat.com>
|
||||
*
|
||||
* For history and the complete list of supported I/O Controller Hub's
|
||||
* see i8xx_tco.c
|
||||
*/
|
||||
|
||||
|
||||
/*
|
||||
* Some address definitions for the TCO
|
||||
*/
|
||||
|
||||
#define TCOBASE ACPIBASE + 0x60 /* TCO base address */
|
||||
#define TCO1_RLD TCOBASE + 0x00 /* TCO Timer Reload and Current Value */
|
||||
#define TCO1_TMR TCOBASE + 0x01 /* TCO Timer Initial Value */
|
||||
#define TCO1_DAT_IN TCOBASE + 0x02 /* TCO Data In Register */
|
||||
#define TCO1_DAT_OUT TCOBASE + 0x03 /* TCO Data Out Register */
|
||||
#define TCO1_STS TCOBASE + 0x04 /* TCO1 Status Register */
|
||||
#define TCO2_STS TCOBASE + 0x06 /* TCO2 Status Register */
|
||||
#define TCO1_CNT TCOBASE + 0x08 /* TCO1 Control Register */
|
||||
#define TCO2_CNT TCOBASE + 0x0a /* TCO2 Control Register */
|
||||
|
||||
#define SMI_EN ACPIBASE + 0x30 /* SMI Control and Enable Register */
|
Loading…
Reference in New Issue
Block a user