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[PATCH] ZyDAS ZD1211 USB-WLAN driver

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There are 60+ USB wifi adapters available on the market based on the ZyDAS
ZD1211 chip.

Unlike the predecessor (ZD1201), ZD1211 does not have a hardware MAC, so most
data operations are coordinated by the device driver. The ZD1211 chip sits
alongside an RF transceiver which is also controlled by the driver. Our driver
currently supports 2 RF types, we know of one other available in a few marketed
products which we will be supporting soon.

Our driver also supports the newer revision of ZD1211, called ZD1211B. The
initialization and RF operations are slightly different for the new revision,
but the main difference is 802.11e support. Our driver does not support the
QoS features yet, but we think we know how to use them.

This driver is based on ZyDAS's own GPL driver available from www.zydas.com.tw.
ZyDAS engineers have been responsive and supportive of our efforts, so thumbs
up to them. Additionally, the firmware is redistributable and they have
provided device specs.

This driver has been written primarily by Ulrich Kunitz and myself. Graham
Gower, Greg KH, Remco and Bryan Rittmeyer have also contributed. The
developers of ieee80211 and softmac have made our lives so much easier- thanks!

We maintain a small info-page: http://zd1211.ath.cx/wiki/DriverRewrite

If there is enough time for review, we would like to aim for inclusion in
2.6.18. The driver works nicely as a STA, and can connect to both open and
encrypted networks (we are using software-based encryption for now). We will
work towards supporting more advanced features in the future (ad-hoc, master
mode, 802.11a, ...).

Signed-off-by: Daniel Drake <dsd@gentoo.org>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
This commit is contained in:
Daniel Drake 2006-06-02 17:11:32 +01:00 committed by Jeff Garzik
parent 4a232e725b
commit e85d0918b5
22 changed files with 6911 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
drivers/net/wireless/Kconfig
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@ -550,6 +550,7 @@ config USB_ZD1201
source "drivers/net/wireless/hostap/Kconfig"
source "drivers/net/wireless/bcm43xx/Kconfig"
source "drivers/net/wireless/zd1211rw/Kconfig"
# yes, this works even when no drivers are selected
config NET_WIRELESS

1
drivers/net/wireless/Makefile
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@ -36,6 +36,7 @@ obj-$(CONFIG_PRISM54) += prism54/
obj-$(CONFIG_HOSTAP) += hostap/
obj-$(CONFIG_BCM43XX) += bcm43xx/
obj-$(CONFIG_ZD1211RW) += zd1211rw/
# 16-bit wireless PCMCIA client drivers
obj-$(CONFIG_PCMCIA_RAYCS) += ray_cs.o

19
drivers/net/wireless/zd1211rw/Kconfig Normal file
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@ -0,0 +1,19 @@
config ZD1211RW
tristate "ZyDAS ZD1211/ZD1211B USB-wireless support"
depends on USB && IEEE80211 && IEEE80211_SOFTMAC && NET_RADIO && EXPERIMENTAL
select FW_LOADER
---help---
This is an experimental driver for the ZyDAS ZD1211/ZD1211B wireless
chip, present in many USB-wireless adapters.
Device firmware is required alongside this driver. You can download the
firmware distribution from http://zd1211.ath.cx/get-firmware
config ZD1211RW_DEBUG
bool "ZyDAS ZD1211 debugging"
depends on ZD1211RW
---help---
ZD1211 debugging messages. Choosing Y will result in additional debug
messages being saved to your kernel logs, which may help debug any
problems.

11
drivers/net/wireless/zd1211rw/Makefile Normal file
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@ -0,0 +1,11 @@
obj-$(CONFIG_ZD1211RW) += zd1211rw.o
zd1211rw-objs := zd_chip.o zd_ieee80211.o \
zd_mac.o zd_netdev.o \
zd_rf_al2230.o zd_rf_rf2959.o \
zd_rf.o zd_usb.o zd_util.o
ifeq ($(CONFIG_ZD1211RW_DEBUG),y)
EXTRA_CFLAGS += -DDEBUG
endif

1615
drivers/net/wireless/zd1211rw/zd_chip.c Normal file
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File diff suppressed because it is too large Load Diff

825
drivers/net/wireless/zd1211rw/zd_chip.h Normal file
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@ -0,0 +1,825 @@
/* zd_chip.h
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#ifndef _ZD_CHIP_H
#define _ZD_CHIP_H
#include "zd_types.h"
#include "zd_rf.h"
#include "zd_usb.h"
/* Header for the Media Access Controller (MAC) and the Baseband Processor
* (BBP). It appears that the ZD1211 wraps the old ZD1205 with USB glue and
* adds a processor for handling the USB protocol.
*/
/* 8-bit hardware registers */
#define CR0 CTL_REG(0x0000)
#define CR1 CTL_REG(0x0004)
#define CR2 CTL_REG(0x0008)
#define CR3 CTL_REG(0x000C)
#define CR5 CTL_REG(0x0010)
/* bit 5: if set short preamble used
* bit 6: filter band - Japan channel 14 on, else off
*/
#define CR6 CTL_REG(0x0014)
#define CR7 CTL_REG(0x0018)
#define CR8 CTL_REG(0x001C)
#define CR4 CTL_REG(0x0020)
#define CR9 CTL_REG(0x0024)
/* bit 2: antenna switch (together with CR10) */
#define CR10 CTL_REG(0x0028)
/* bit 1: antenna switch (together with CR9)
* RF2959 controls with CR11 radion on and off
*/
#define CR11 CTL_REG(0x002C)
/* bit 6: TX power control for OFDM
* RF2959 controls with CR10 radio on and off
*/
#define CR12 CTL_REG(0x0030)
#define CR13 CTL_REG(0x0034)
#define CR14 CTL_REG(0x0038)
#define CR15 CTL_REG(0x003C)
#define CR16 CTL_REG(0x0040)
#define CR17 CTL_REG(0x0044)
#define CR18 CTL_REG(0x0048)
#define CR19 CTL_REG(0x004C)
#define CR20 CTL_REG(0x0050)
#define CR21 CTL_REG(0x0054)
#define CR22 CTL_REG(0x0058)
#define CR23 CTL_REG(0x005C)
#define CR24 CTL_REG(0x0060) /* CCA threshold */
#define CR25 CTL_REG(0x0064)
#define CR26 CTL_REG(0x0068)
#define CR27 CTL_REG(0x006C)
#define CR28 CTL_REG(0x0070)
#define CR29 CTL_REG(0x0074)
#define CR30 CTL_REG(0x0078)
#define CR31 CTL_REG(0x007C) /* TX power control for RF in CCK mode */
#define CR32 CTL_REG(0x0080)
#define CR33 CTL_REG(0x0084)
#define CR34 CTL_REG(0x0088)
#define CR35 CTL_REG(0x008C)
#define CR36 CTL_REG(0x0090)
#define CR37 CTL_REG(0x0094)
#define CR38 CTL_REG(0x0098)
#define CR39 CTL_REG(0x009C)
#define CR40 CTL_REG(0x00A0)
#define CR41 CTL_REG(0x00A4)
#define CR42 CTL_REG(0x00A8)
#define CR43 CTL_REG(0x00AC)
#define CR44 CTL_REG(0x00B0)
#define CR45 CTL_REG(0x00B4)
#define CR46 CTL_REG(0x00B8)
#define CR47 CTL_REG(0x00BC) /* CCK baseband gain
* (patch value might be in EEPROM)
*/
#define CR48 CTL_REG(0x00C0)
#define CR49 CTL_REG(0x00C4)
#define CR50 CTL_REG(0x00C8)
#define CR51 CTL_REG(0x00CC) /* TX power control for RF in 6-36M modes */
#define CR52 CTL_REG(0x00D0) /* TX power control for RF in 48M mode */
#define CR53 CTL_REG(0x00D4) /* TX power control for RF in 54M mode */
#define CR54 CTL_REG(0x00D8)
#define CR55 CTL_REG(0x00DC)
#define CR56 CTL_REG(0x00E0)
#define CR57 CTL_REG(0x00E4)
#define CR58 CTL_REG(0x00E8)
#define CR59 CTL_REG(0x00EC)
#define CR60 CTL_REG(0x00F0)
#define CR61 CTL_REG(0x00F4)
#define CR62 CTL_REG(0x00F8)
#define CR63 CTL_REG(0x00FC)
#define CR64 CTL_REG(0x0100)
#define CR65 CTL_REG(0x0104) /* OFDM 54M calibration */
#define CR66 CTL_REG(0x0108) /* OFDM 48M calibration */
#define CR67 CTL_REG(0x010C) /* OFDM 36M calibration */
#define CR68 CTL_REG(0x0110) /* CCK calibration */
#define CR69 CTL_REG(0x0114)
#define CR70 CTL_REG(0x0118)
#define CR71 CTL_REG(0x011C)
#define CR72 CTL_REG(0x0120)
#define CR73 CTL_REG(0x0124)
#define CR74 CTL_REG(0x0128)
#define CR75 CTL_REG(0x012C)
#define CR76 CTL_REG(0x0130)
#define CR77 CTL_REG(0x0134)
#define CR78 CTL_REG(0x0138)
#define CR79 CTL_REG(0x013C)
#define CR80 CTL_REG(0x0140)
#define CR81 CTL_REG(0x0144)
#define CR82 CTL_REG(0x0148)
#define CR83 CTL_REG(0x014C)
#define CR84 CTL_REG(0x0150)
#define CR85 CTL_REG(0x0154)
#define CR86 CTL_REG(0x0158)
#define CR87 CTL_REG(0x015C)
#define CR88 CTL_REG(0x0160)
#define CR89 CTL_REG(0x0164)
#define CR90 CTL_REG(0x0168)
#define CR91 CTL_REG(0x016C)
#define CR92 CTL_REG(0x0170)
#define CR93 CTL_REG(0x0174)
#define CR94 CTL_REG(0x0178)
#define CR95 CTL_REG(0x017C)
#define CR96 CTL_REG(0x0180)
#define CR97 CTL_REG(0x0184)
#define CR98 CTL_REG(0x0188)
#define CR99 CTL_REG(0x018C)
#define CR100 CTL_REG(0x0190)
#define CR101 CTL_REG(0x0194)
#define CR102 CTL_REG(0x0198)
#define CR103 CTL_REG(0x019C)
#define CR104 CTL_REG(0x01A0)
#define CR105 CTL_REG(0x01A4)
#define CR106 CTL_REG(0x01A8)
#define CR107 CTL_REG(0x01AC)
#define CR108 CTL_REG(0x01B0)
#define CR109 CTL_REG(0x01B4)
#define CR110 CTL_REG(0x01B8)
#define CR111 CTL_REG(0x01BC)
#define CR112 CTL_REG(0x01C0)
#define CR113 CTL_REG(0x01C4)
#define CR114 CTL_REG(0x01C8)
#define CR115 CTL_REG(0x01CC)
#define CR116 CTL_REG(0x01D0)
#define CR117 CTL_REG(0x01D4)
#define CR118 CTL_REG(0x01D8)
#define CR119 CTL_REG(0x01DC)
#define CR120 CTL_REG(0x01E0)
#define CR121 CTL_REG(0x01E4)
#define CR122 CTL_REG(0x01E8)
#define CR123 CTL_REG(0x01EC)
#define CR124 CTL_REG(0x01F0)
#define CR125 CTL_REG(0x01F4)
#define CR126 CTL_REG(0x01F8)
#define CR127 CTL_REG(0x01FC)
#define CR128 CTL_REG(0x0200)
#define CR129 CTL_REG(0x0204)
#define CR130 CTL_REG(0x0208)
#define CR131 CTL_REG(0x020C)
#define CR132 CTL_REG(0x0210)
#define CR133 CTL_REG(0x0214)
#define CR134 CTL_REG(0x0218)
#define CR135 CTL_REG(0x021C)
#define CR136 CTL_REG(0x0220)
#define CR137 CTL_REG(0x0224)
#define CR138 CTL_REG(0x0228)
#define CR139 CTL_REG(0x022C)
#define CR140 CTL_REG(0x0230)
#define CR141 CTL_REG(0x0234)
#define CR142 CTL_REG(0x0238)
#define CR143 CTL_REG(0x023C)
#define CR144 CTL_REG(0x0240)
#define CR145 CTL_REG(0x0244)
#define CR146 CTL_REG(0x0248)
#define CR147 CTL_REG(0x024C)
#define CR148 CTL_REG(0x0250)
#define CR149 CTL_REG(0x0254)
#define CR150 CTL_REG(0x0258)
#define CR151 CTL_REG(0x025C)
#define CR152 CTL_REG(0x0260)
#define CR153 CTL_REG(0x0264)
#define CR154 CTL_REG(0x0268)
#define CR155 CTL_REG(0x026C)
#define CR156 CTL_REG(0x0270)
#define CR157 CTL_REG(0x0274)
#define CR158 CTL_REG(0x0278)
#define CR159 CTL_REG(0x027C)
#define CR160 CTL_REG(0x0280)
#define CR161 CTL_REG(0x0284)
#define CR162 CTL_REG(0x0288)
#define CR163 CTL_REG(0x028C)
#define CR164 CTL_REG(0x0290)
#define CR165 CTL_REG(0x0294)
#define CR166 CTL_REG(0x0298)
#define CR167 CTL_REG(0x029C)
#define CR168 CTL_REG(0x02A0)
#define CR169 CTL_REG(0x02A4)
#define CR170 CTL_REG(0x02A8)
#define CR171 CTL_REG(0x02AC)
#define CR172 CTL_REG(0x02B0)
#define CR173 CTL_REG(0x02B4)
#define CR174 CTL_REG(0x02B8)
#define CR175 CTL_REG(0x02BC)
#define CR176 CTL_REG(0x02C0)
#define CR177 CTL_REG(0x02C4)
#define CR178 CTL_REG(0x02C8)
#define CR179 CTL_REG(0x02CC)
#define CR180 CTL_REG(0x02D0)
#define CR181 CTL_REG(0x02D4)
#define CR182 CTL_REG(0x02D8)
#define CR183 CTL_REG(0x02DC)
#define CR184 CTL_REG(0x02E0)
#define CR185 CTL_REG(0x02E4)
#define CR186 CTL_REG(0x02E8)
#define CR187 CTL_REG(0x02EC)
#define CR188 CTL_REG(0x02F0)
#define CR189 CTL_REG(0x02F4)
#define CR190 CTL_REG(0x02F8)
#define CR191 CTL_REG(0x02FC)
#define CR192 CTL_REG(0x0300)
#define CR193 CTL_REG(0x0304)
#define CR194 CTL_REG(0x0308)
#define CR195 CTL_REG(0x030C)
#define CR196 CTL_REG(0x0310)
#define CR197 CTL_REG(0x0314)
#define CR198 CTL_REG(0x0318)
#define CR199 CTL_REG(0x031C)
#define CR200 CTL_REG(0x0320)
#define CR201 CTL_REG(0x0324)
#define CR202 CTL_REG(0x0328)
#define CR203 CTL_REG(0x032C) /* I2C bus template value & flash control */
#define CR204 CTL_REG(0x0330)
#define CR205 CTL_REG(0x0334)
#define CR206 CTL_REG(0x0338)
#define CR207 CTL_REG(0x033C)
#define CR208 CTL_REG(0x0340)
#define CR209 CTL_REG(0x0344)
#define CR210 CTL_REG(0x0348)
#define CR211 CTL_REG(0x034C)
#define CR212 CTL_REG(0x0350)
#define CR213 CTL_REG(0x0354)
#define CR214 CTL_REG(0x0358)
#define CR215 CTL_REG(0x035C)
#define CR216 CTL_REG(0x0360)
#define CR217 CTL_REG(0x0364)
#define CR218 CTL_REG(0x0368)
#define CR219 CTL_REG(0x036C)
#define CR220 CTL_REG(0x0370)
#define CR221 CTL_REG(0x0374)
#define CR222 CTL_REG(0x0378)
#define CR223 CTL_REG(0x037C)
#define CR224 CTL_REG(0x0380)
#define CR225 CTL_REG(0x0384)
#define CR226 CTL_REG(0x0388)
#define CR227 CTL_REG(0x038C)
#define CR228 CTL_REG(0x0390)
#define CR229 CTL_REG(0x0394)
#define CR230 CTL_REG(0x0398)
#define CR231 CTL_REG(0x039C)
#define CR232 CTL_REG(0x03A0)
#define CR233 CTL_REG(0x03A4)
#define CR234 CTL_REG(0x03A8)
#define CR235 CTL_REG(0x03AC)
#define CR236 CTL_REG(0x03B0)
#define CR240 CTL_REG(0x03C0)
/* bit 7: host-controlled RF register writes
* CR241-CR245: for hardware controlled writing of RF bits, not needed for
* USB
*/
#define CR241 CTL_REG(0x03C4)
#define CR242 CTL_REG(0x03C8)
#define CR243 CTL_REG(0x03CC)
#define CR244 CTL_REG(0x03D0)
#define CR245 CTL_REG(0x03D4)
#define CR251 CTL_REG(0x03EC) /* only used for activation and deactivation of
* Airoha RFs AL2230 and AL7230B
*/
#define CR252 CTL_REG(0x03F0)
#define CR253 CTL_REG(0x03F4)
#define CR254 CTL_REG(0x03F8)
#define CR255 CTL_REG(0x03FC)
#define CR_MAX_PHY_REG 255
/* Taken from the ZYDAS driver, not all of them are relevant for the ZSD1211
* driver.
*/
#define CR_RF_IF_CLK CTL_REG(0x0400)
#define CR_RF_IF_DATA CTL_REG(0x0404)
#define CR_PE1_PE2 CTL_REG(0x0408)
#define CR_PE2_DLY CTL_REG(0x040C)
#define CR_LE1 CTL_REG(0x0410)
#define CR_LE2 CTL_REG(0x0414)
/* Seems to enable/disable GPI (General Purpose IO?) */
#define CR_GPI_EN CTL_REG(0x0418)
#define CR_RADIO_PD CTL_REG(0x042C)
#define CR_RF2948_PD CTL_REG(0x042C)
#define CR_ENABLE_PS_MANUAL_AGC CTL_REG(0x043C)
#define CR_CONFIG_PHILIPS CTL_REG(0x0440)
#define CR_SA2400_SER_AP CTL_REG(0x0444)
#define CR_I2C_WRITE CTL_REG(0x0444)
#define CR_SA2400_SER_RP CTL_REG(0x0448)
#define CR_RADIO_PE CTL_REG(0x0458)
#define CR_RST_BUS_MASTER CTL_REG(0x045C)
#define CR_RFCFG CTL_REG(0x0464)
#define CR_HSTSCHG CTL_REG(0x046C)
#define CR_PHY_ON CTL_REG(0x0474)
#define CR_RX_DELAY CTL_REG(0x0478)
#define CR_RX_PE_DELAY CTL_REG(0x047C)
#define CR_GPIO_1 CTL_REG(0x0490)
#define CR_GPIO_2 CTL_REG(0x0494)
#define CR_EncryBufMux CTL_REG(0x04A8)
#define CR_PS_CTRL CTL_REG(0x0500)
#define CR_ADDA_PWR_DWN CTL_REG(0x0504)
#define CR_ADDA_MBIAS_WARMTIME CTL_REG(0x0508)
#define CR_MAC_PS_STATE CTL_REG(0x050C)
#define CR_INTERRUPT CTL_REG(0x0510)
#define INT_TX_COMPLETE 0x00000001
#define INT_RX_COMPLETE 0x00000002
#define INT_RETRY_FAIL 0x00000004
#define INT_WAKEUP 0x00000008
#define INT_DTIM_NOTIFY 0x00000020
#define INT_CFG_NEXT_BCN 0x00000040
#define INT_BUS_ABORT 0x00000080
#define INT_TX_FIFO_READY 0x00000100
#define INT_UART 0x00000200
#define INT_TX_COMPLETE_EN 0x00010000
#define INT_RX_COMPLETE_EN 0x00020000
#define INT_RETRY_FAIL_EN 0x00040000
#define INT_WAKEUP_EN 0x00080000
#define INT_DTIM_NOTIFY_EN 0x00200000
#define INT_CFG_NEXT_BCN_EN 0x00400000
#define INT_BUS_ABORT_EN 0x00800000
#define INT_TX_FIFO_READY_EN 0x01000000
#define INT_UART_EN 0x02000000
#define CR_TSF_LOW_PART CTL_REG(0x0514)
#define CR_TSF_HIGH_PART CTL_REG(0x0518)
/* Following three values are in time units (1024us)
* Following condition must be met:
* atim < tbtt < bcn
*/
#define CR_ATIM_WND_PERIOD CTL_REG(0x051C)
#define CR_BCN_INTERVAL CTL_REG(0x0520)
#define CR_PRE_TBTT CTL_REG(0x0524)
/* in units of TU(1024us) */
/* for UART support */
#define CR_UART_RBR_THR_DLL CTL_REG(0x0540)
#define CR_UART_DLM_IER CTL_REG(0x0544)
#define CR_UART_IIR_FCR CTL_REG(0x0548)
#define CR_UART_LCR CTL_REG(0x054c)
#define CR_UART_MCR CTL_REG(0x0550)
#define CR_UART_LSR CTL_REG(0x0554)
#define CR_UART_MSR CTL_REG(0x0558)
#define CR_UART_ECR CTL_REG(0x055c)
#define CR_UART_STATUS CTL_REG(0x0560)
#define CR_PCI_TX_ADDR_P1 CTL_REG(0x0600)
#define CR_PCI_TX_AddR_P2 CTL_REG(0x0604)
#define CR_PCI_RX_AddR_P1 CTL_REG(0x0608)
#define CR_PCI_RX_AddR_P2 CTL_REG(0x060C)
/* must be overwritten if custom MAC address will be used */
#define CR_MAC_ADDR_P1 CTL_REG(0x0610)
#define CR_MAC_ADDR_P2 CTL_REG(0x0614)
#define CR_BSSID_P1 CTL_REG(0x0618)
#define CR_BSSID_P2 CTL_REG(0x061C)
#define CR_BCN_PLCP_CFG CTL_REG(0x0620)
#define CR_GROUP_HASH_P1 CTL_REG(0x0624)
#define CR_GROUP_HASH_P2 CTL_REG(0x0628)
#define CR_RX_TIMEOUT CTL_REG(0x062C)
/* Basic rates supported by the BSS. When producing ACK or CTS messages, the
* device will use a rate in this table that is less than or equal to the rate
* of the incoming frame which prompted the response */
#define CR_BASIC_RATE_TBL CTL_REG(0x0630)
#define CR_RATE_1M 0x0001 /* 802.11b */
#define CR_RATE_2M 0x0002 /* 802.11b */
#define CR_RATE_5_5M 0x0004 /* 802.11b */
#define CR_RATE_11M 0x0008 /* 802.11b */
#define CR_RATE_6M 0x0100 /* 802.11g */
#define CR_RATE_9M 0x0200 /* 802.11g */
#define CR_RATE_12M 0x0400 /* 802.11g */
#define CR_RATE_18M 0x0800 /* 802.11g */
#define CR_RATE_24M 0x1000 /* 802.11g */
#define CR_RATE_36M 0x2000 /* 802.11g */
#define CR_RATE_48M 0x4000 /* 802.11g */
#define CR_RATE_54M 0x8000 /* 802.11g */
#define CR_RATES_80211G 0xff00
#define CR_RATES_80211B 0x000f
/* Mandatory rates required in the BSS. When producing ACK or CTS messages, if
* the device could not find an appropriate rate in CR_BASIC_RATE_TBL, it will
* look for a rate in this table that is less than or equal to the rate of
* the incoming frame. */
#define CR_MANDATORY_RATE_TBL CTL_REG(0x0634)
#define CR_RTS_CTS_RATE CTL_REG(0x0638)
#define CR_WEP_PROTECT CTL_REG(0x063C)
#define CR_RX_THRESHOLD CTL_REG(0x0640)
/* register for controlling the LEDS */
#define CR_LED CTL_REG(0x0644)
/* masks for controlling LEDs */
#define LED1 0x0100
#define LED2 0x0200
/* Seems to indicate that the configuration is over.
*/
#define CR_AFTER_PNP CTL_REG(0x0648)
#define CR_ACK_TIME_80211 CTL_REG(0x0658)
#define CR_RX_OFFSET CTL_REG(0x065c)
#define CR_PHY_DELAY CTL_REG(0x066C)
#define CR_BCN_FIFO CTL_REG(0x0670)
#define CR_SNIFFER_ON CTL_REG(0x0674)
#define CR_ENCRYPTION_TYPE CTL_REG(0x0678)
#define NO_WEP 0
#define WEP64 1
#define WEP128 5
#define WEP256 6
#define ENC_SNIFFER 8
#define CR_ZD1211_RETRY_MAX CTL_REG(0x067C)
#define CR_REG1 CTL_REG(0x0680)
/* Setting the bit UNLOCK_PHY_REGS disallows the write access to physical
* registers, so one could argue it is a LOCK bit. But calling it
* LOCK_PHY_REGS makes it confusing.
*/
#define UNLOCK_PHY_REGS 0x0080
#define CR_DEVICE_STATE CTL_REG(0x0684)
#define CR_UNDERRUN_CNT CTL_REG(0x0688)
#define CR_RX_FILTER CTL_REG(0x068c)
#define RX_FILTER_ASSOC_RESPONSE 0x0002
#define RX_FILTER_PROBE_RESPONSE 0x0020
#define RX_FILTER_BEACON 0x0100
#define RX_FILTER_AUTH 0x0800
/* Sniff modus sets filter to 0xfffff */
#define CR_ACK_TIMEOUT_EXT CTL_REG(0x0690)
#define CR_BCN_FIFO_SEMAPHORE CTL_REG(0x0694)
#define CR_IFS_VALUE CTL_REG(0x0698)
#define CR_RX_TIME_OUT CTL_REG(0x069C)
#define CR_TOTAL_RX_FRM CTL_REG(0x06A0)
#define CR_CRC32_CNT CTL_REG(0x06A4)
#define CR_CRC16_CNT CTL_REG(0x06A8)
#define CR_DECRYPTION_ERR_UNI CTL_REG(0x06AC)
#define CR_RX_FIFO_OVERRUN CTL_REG(0x06B0)
#define CR_DECRYPTION_ERR_MUL CTL_REG(0x06BC)
#define CR_NAV_CNT CTL_REG(0x06C4)
#define CR_NAV_CCA CTL_REG(0x06C8)
#define CR_RETRY_CNT CTL_REG(0x06CC)
#define CR_READ_TCB_ADDR CTL_REG(0x06E8)
#define CR_READ_RFD_ADDR CTL_REG(0x06EC)
#define CR_CWMIN_CWMAX CTL_REG(0x06F0)
#define CR_TOTAL_TX_FRM CTL_REG(0x06F4)
/* CAM: Continuous Access Mode (power management) */
#define CR_CAM_MODE CTL_REG(0x0700)
#define CR_CAM_ROLL_TB_LOW CTL_REG(0x0704)
#define CR_CAM_ROLL_TB_HIGH CTL_REG(0x0708)
#define CR_CAM_ADDRESS CTL_REG(0x070C)
#define CR_CAM_DATA CTL_REG(0x0710)
#define CR_ROMDIR CTL_REG(0x0714)
#define CR_DECRY_ERR_FLG_LOW CTL_REG(0x0714)
#define CR_DECRY_ERR_FLG_HIGH CTL_REG(0x0718)
#define CR_WEPKEY0 CTL_REG(0x0720)
#define CR_WEPKEY1 CTL_REG(0x0724)
#define CR_WEPKEY2 CTL_REG(0x0728)
#define CR_WEPKEY3 CTL_REG(0x072C)
#define CR_WEPKEY4 CTL_REG(0x0730)
#define CR_WEPKEY5 CTL_REG(0x0734)
#define CR_WEPKEY6 CTL_REG(0x0738)
#define CR_WEPKEY7 CTL_REG(0x073C)
#define CR_WEPKEY8 CTL_REG(0x0740)
#define CR_WEPKEY9 CTL_REG(0x0744)
#define CR_WEPKEY10 CTL_REG(0x0748)
#define CR_WEPKEY11 CTL_REG(0x074C)
#define CR_WEPKEY12 CTL_REG(0x0750)
#define CR_WEPKEY13 CTL_REG(0x0754)
#define CR_WEPKEY14 CTL_REG(0x0758)
#define CR_WEPKEY15 CTL_REG(0x075c)
#define CR_TKIP_MODE CTL_REG(0x0760)
#define CR_EEPROM_PROTECT0 CTL_REG(0x0758)
#define CR_EEPROM_PROTECT1 CTL_REG(0x075C)
#define CR_DBG_FIFO_RD CTL_REG(0x0800)
#define CR_DBG_SELECT CTL_REG(0x0804)
#define CR_FIFO_Length CTL_REG(0x0808)
#define CR_RSSI_MGC CTL_REG(0x0810)
#define CR_PON CTL_REG(0x0818)
#define CR_RX_ON CTL_REG(0x081C)
#define CR_TX_ON CTL_REG(0x0820)
#define CR_CHIP_EN CTL_REG(0x0824)
#define CR_LO_SW CTL_REG(0x0828)
#define CR_TXRX_SW CTL_REG(0x082C)
#define CR_S_MD CTL_REG(0x0830)
#define CR_USB_DEBUG_PORT CTL_REG(0x0888)
#define CR_ZD1211B_TX_PWR_CTL1 CTL_REG(0x0b00)
#define CR_ZD1211B_TX_PWR_CTL2 CTL_REG(0x0b04)
#define CR_ZD1211B_TX_PWR_CTL3 CTL_REG(0x0b08)
#define CR_ZD1211B_TX_PWR_CTL4 CTL_REG(0x0b0c)
#define CR_ZD1211B_AIFS_CTL1 CTL_REG(0x0b10)
#define CR_ZD1211B_AIFS_CTL2 CTL_REG(0x0b14)
#define CR_ZD1211B_TXOP CTL_REG(0x0b20)
#define CR_ZD1211B_RETRY_MAX CTL_REG(0x0b28)
#define AP_RX_FILTER 0x0400feff
#define STA_RX_FILTER 0x0000ffff
#define CWIN_SIZE 0x007f043f
#define HWINT_ENABLED 0x004f0000
#define HWINT_DISABLED 0
#define E2P_PWR_INT_GUARD 8
#define E2P_CHANNEL_COUNT 14
/* If you compare this addresses with the ZYDAS orignal driver, please notify
* that we use word mapping for the EEPROM.
*/
/*
* Upper 16 bit contains the regulatory domain.
*/
#define E2P_SUBID E2P_REG(0x00)
#define E2P_POD E2P_REG(0x02)
#define E2P_MAC_ADDR_P1 E2P_REG(0x04)
#define E2P_MAC_ADDR_P2 E2P_REG(0x06)
#define E2P_PWR_CAL_VALUE1 E2P_REG(0x08)
#define E2P_PWR_CAL_VALUE2 E2P_REG(0x0a)
#define E2P_PWR_CAL_VALUE3 E2P_REG(0x0c)
#define E2P_PWR_CAL_VALUE4 E2P_REG(0x0e)
#define E2P_PWR_INT_VALUE1 E2P_REG(0x10)
#define E2P_PWR_INT_VALUE2 E2P_REG(0x12)
#define E2P_PWR_INT_VALUE3 E2P_REG(0x14)
#define E2P_PWR_INT_VALUE4 E2P_REG(0x16)
/* Contains a bit for each allowed channel. It gives for Europe (ETSI 0x30)
* also only 11 channels. */
#define E2P_ALLOWED_CHANNEL E2P_REG(0x18)
#define E2P_PHY_REG E2P_REG(0x1a)
#define E2P_DEVICE_VER E2P_REG(0x20)
#define E2P_36M_CAL_VALUE1 E2P_REG(0x28)
#define E2P_36M_CAL_VALUE2 E2P_REG(0x2a)
#define E2P_36M_CAL_VALUE3 E2P_REG(0x2c)
#define E2P_36M_CAL_VALUE4 E2P_REG(0x2e)
#define E2P_11A_INT_VALUE1 E2P_REG(0x30)
#define E2P_11A_INT_VALUE2 E2P_REG(0x32)
#define E2P_11A_INT_VALUE3 E2P_REG(0x34)
#define E2P_11A_INT_VALUE4 E2P_REG(0x36)
#define E2P_48M_CAL_VALUE1 E2P_REG(0x38)
#define E2P_48M_CAL_VALUE2 E2P_REG(0x3a)
#define E2P_48M_CAL_VALUE3 E2P_REG(0x3c)
#define E2P_48M_CAL_VALUE4 E2P_REG(0x3e)
#define E2P_48M_INT_VALUE1 E2P_REG(0x40)
#define E2P_48M_INT_VALUE2 E2P_REG(0x42)
#define E2P_48M_INT_VALUE3 E2P_REG(0x44)
#define E2P_48M_INT_VALUE4 E2P_REG(0x46)
#define E2P_54M_CAL_VALUE1 E2P_REG(0x48) /* ??? */
#define E2P_54M_CAL_VALUE2 E2P_REG(0x4a)
#define E2P_54M_CAL_VALUE3 E2P_REG(0x4c)
#define E2P_54M_CAL_VALUE4 E2P_REG(0x4e)
#define E2P_54M_INT_VALUE1 E2P_REG(0x50)
#define E2P_54M_INT_VALUE2 E2P_REG(0x52)
#define E2P_54M_INT_VALUE3 E2P_REG(0x54)
#define E2P_54M_INT_VALUE4 E2P_REG(0x56)
/* All 16 bit values */
#define FW_FIRMWARE_VER FW_REG(0)
/* non-zero if USB high speed connection */
#define FW_USB_SPEED FW_REG(1)
#define FW_FIX_TX_RATE FW_REG(2)
/* Seems to be able to control LEDs over the firmware */
#define FW_LINK_STATUS FW_REG(3)
#define FW_SOFT_RESET FW_REG(4)
#define FW_FLASH_CHK FW_REG(5)
enum {
CR_BASE_OFFSET = 0x9000,
FW_START_OFFSET = 0xee00,
FW_BASE_ADDR_OFFSET = FW_START_OFFSET + 0x1d,
EEPROM_START_OFFSET = 0xf800,
EEPROM_SIZE = 0x800, /* words */
LOAD_CODE_SIZE = 0xe, /* words */
LOAD_VECT_SIZE = 0x10000 - 0xfff7, /* words */
EEPROM_REGS_OFFSET = LOAD_CODE_SIZE + LOAD_VECT_SIZE,
E2P_BASE_OFFSET = EEPROM_START_OFFSET +
EEPROM_REGS_OFFSET,
};
#define FW_REG_TABLE_ADDR USB_ADDR(FW_START_OFFSET + 0x1d)
enum {
/* indices for ofdm_cal_values */
OFDM_36M_INDEX = 0,
OFDM_48M_INDEX = 1,
OFDM_54M_INDEX = 2,
};
struct zd_chip {
struct zd_usb usb;
struct zd_rf rf;
struct mutex mutex;
u8 e2p_mac[ETH_ALEN];
/* EepSetPoint in the vendor driver */
u8 pwr_cal_values[E2P_CHANNEL_COUNT];
/* integration values in the vendor driver */
u8 pwr_int_values[E2P_CHANNEL_COUNT];
/* SetPointOFDM in the vendor driver */
u8 ofdm_cal_values[3][E2P_CHANNEL_COUNT];
u8 pa_type:4, patch_cck_gain:1, patch_cr157:1, patch_6m_band_edge:1,
is_zd1211b:1;
};
static inline struct zd_chip *zd_usb_to_chip(struct zd_usb *usb)
{
return container_of(usb, struct zd_chip, usb);
}
static inline struct zd_chip *zd_rf_to_chip(struct zd_rf *rf)
{
return container_of(rf, struct zd_chip, rf);
}
#define zd_chip_dev(chip) (&(chip)->usb.intf->dev)
void zd_chip_init(struct zd_chip *chip,
struct net_device *netdev,
struct usb_interface *intf);
void zd_chip_clear(struct zd_chip *chip);
int zd_chip_init_hw(struct zd_chip *chip, u8 device_type);
int zd_chip_reset(struct zd_chip *chip);
static inline int zd_ioread16v_locked(struct zd_chip *chip, u16 *values,
const zd_addr_t *addresses,
unsigned int count)
{
ZD_ASSERT(mutex_is_locked(&chip->mutex));
return zd_usb_ioread16v(&chip->usb, values, addresses, count);
}
static inline int zd_ioread16_locked(struct zd_chip *chip, u16 *value,
const zd_addr_t addr)
{
ZD_ASSERT(mutex_is_locked(&chip->mutex));
return zd_usb_ioread16(&chip->usb, value, addr);
}
int zd_ioread32v_locked(struct zd_chip *chip, u32 *values,
const zd_addr_t *addresses, unsigned int count);
static inline int zd_ioread32_locked(struct zd_chip *chip, u32 *value,
const zd_addr_t addr)
{
return zd_ioread32v_locked(chip, value, (const zd_addr_t *)&addr, 1);
}
static inline int zd_iowrite16_locked(struct zd_chip *chip, u16 value,
zd_addr_t addr)
{
struct zd_ioreq16 ioreq;
ZD_ASSERT(mutex_is_locked(&chip->mutex));
ioreq.addr = addr;
ioreq.value = value;
return zd_usb_iowrite16v(&chip->usb, &ioreq, 1);
}
int zd_iowrite16a_locked(struct zd_chip *chip,
const struct zd_ioreq16 *ioreqs, unsigned int count);
int _zd_iowrite32v_locked(struct zd_chip *chip, const struct zd_ioreq32 *ioreqs,
unsigned int count);
static inline int zd_iowrite32_locked(struct zd_chip *chip, u32 value,
zd_addr_t addr)
{
struct zd_ioreq32 ioreq;
ioreq.addr = addr;
ioreq.value = value;
return _zd_iowrite32v_locked(chip, &ioreq, 1);
}
int zd_iowrite32a_locked(struct zd_chip *chip,
const struct zd_ioreq32 *ioreqs, unsigned int count);
static inline int zd_rfwrite_locked(struct zd_chip *chip, u32 value, u8 bits)
{
ZD_ASSERT(mutex_is_locked(&chip->mutex));
return zd_usb_rfwrite(&chip->usb, value, bits);
}
int zd_rfwritev_locked(struct zd_chip *chip,
const u32* values, unsigned int count, u8 bits);
/* Locking functions for reading and writing registers.
* The different parameters are intentional.
*/
int zd_ioread16(struct zd_chip *chip, zd_addr_t addr, u16 *value);
int zd_iowrite16(struct zd_chip *chip, zd_addr_t addr, u16 value);
int zd_ioread32(struct zd_chip *chip, zd_addr_t addr, u32 *value);
int zd_iowrite32(struct zd_chip *chip, zd_addr_t addr, u32 value);
int zd_ioread32v(struct zd_chip *chip, const zd_addr_t *addresses,
u32 *values, unsigned int count);
int zd_iowrite32a(struct zd_chip *chip, const struct zd_ioreq32 *ioreqs,
unsigned int count);
int zd_chip_set_channel(struct zd_chip *chip, u8 channel);
static inline u8 _zd_chip_get_channel(struct zd_chip *chip)
{
return chip->rf.channel;
}
u8 zd_chip_get_channel(struct zd_chip *chip);
int zd_read_regdomain(struct zd_chip *chip, u8 *regdomain);
void zd_get_e2p_mac_addr(struct zd_chip *chip, u8 *mac_addr);
int zd_read_mac_addr(struct zd_chip *chip, u8 *mac_addr);
int zd_write_mac_addr(struct zd_chip *chip, const u8 *mac_addr);
int zd_chip_switch_radio_on(struct zd_chip *chip);
int zd_chip_switch_radio_off(struct zd_chip *chip);
int zd_chip_enable_int(struct zd_chip *chip);
void zd_chip_disable_int(struct zd_chip *chip);
int zd_chip_enable_rx(struct zd_chip *chip);
void zd_chip_disable_rx(struct zd_chip *chip);
int zd_chip_enable_hwint(struct zd_chip *chip);
int zd_chip_disable_hwint(struct zd_chip *chip);
static inline int zd_get_encryption_type(struct zd_chip *chip, u32 *type)
{
return zd_ioread32(chip, CR_ENCRYPTION_TYPE, type);
}
static inline int zd_set_encryption_type(struct zd_chip *chip, u32 type)
{
return zd_iowrite32(chip, CR_ENCRYPTION_TYPE, type);
}
static inline int zd_chip_get_basic_rates(struct zd_chip *chip, u16 *cr_rates)
{
return zd_ioread16(chip, CR_BASIC_RATE_TBL, cr_rates);
}
int zd_chip_set_basic_rates(struct zd_chip *chip, u16 cr_rates);
static inline int zd_chip_set_rx_filter(struct zd_chip *chip, u32 filter)
{
return zd_iowrite32(chip, CR_RX_FILTER, filter);
}
int zd_chip_lock_phy_regs(struct zd_chip *chip);
int zd_chip_unlock_phy_regs(struct zd_chip *chip);
enum led_status {
LED_OFF = 0,
LED_ON = 1,
LED_FLIP = 2,
LED_STATUS = 3,
};
int zd_chip_led_status(struct zd_chip *chip, int led, enum led_status status);
int zd_chip_led_flip(struct zd_chip *chip, int led,
const unsigned int *phases_msecs, unsigned int count);
int zd_set_beacon_interval(struct zd_chip *chip, u32 interval);
static inline int zd_get_beacon_interval(struct zd_chip *chip, u32 *interval)
{
return zd_ioread32(chip, CR_BCN_INTERVAL, interval);
}
struct rx_status;
u8 zd_rx_qual_percent(const void *rx_frame, unsigned int size,
const struct rx_status *status);
u8 zd_rx_strength_percent(u8 rssi);
u16 zd_rx_rate(const void *rx_frame, const struct rx_status *status);
#endif /* _ZD_CHIP_H */

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drivers/net/wireless/zd1211rw/zd_def.h Normal file
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/* zd_def.h
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#ifndef _ZD_DEF_H
#define _ZD_DEF_H
#include <linux/kernel.h>
#include <linux/stringify.h>
#include <linux/device.h>
#include <linux/kernel.h>
#define dev_printk_f(level, dev, fmt, args...) \
dev_printk(level, dev, "%s() " fmt, __func__, ##args)
#ifdef DEBUG
# define dev_dbg_f(dev, fmt, args...) \
dev_printk_f(KERN_DEBUG, dev, fmt, ## args)
#else
# define dev_dbg_f(dev, fmt, args...) do { (void)(dev); } while (0)
#endif /* DEBUG */
#ifdef DEBUG
# define ZD_ASSERT(x) \
do { \
if (!(x)) { \
pr_debug("%s:%d ASSERT %s VIOLATED!\n", \
__FILE__, __LINE__, __stringify(x)); \
} \
} while (0)
#else
# define ZD_ASSERT(x) do { } while (0)
#endif
#endif /* _ZD_DEF_H */

191
drivers/net/wireless/zd1211rw/zd_ieee80211.c Normal file
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/* zd_ieee80211.c
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
/*
* A lot of this code is generic and should be moved into the upper layers
* at some point.
*/
#include <linux/errno.h>
#include <linux/wireless.h>
#include <linux/kernel.h>
#include <net/ieee80211.h>
#include "zd_def.h"
#include "zd_ieee80211.h"
#include "zd_mac.h"
static const struct channel_range channel_ranges[] = {
[0] = { 0, 0},
[ZD_REGDOMAIN_FCC] = { 1, 12},
[ZD_REGDOMAIN_IC] = { 1, 12},
[ZD_REGDOMAIN_ETSI] = { 1, 14},
[ZD_REGDOMAIN_JAPAN] = { 1, 14},
[ZD_REGDOMAIN_SPAIN] = { 1, 14},
[ZD_REGDOMAIN_FRANCE] = { 1, 14},
[ZD_REGDOMAIN_JAPAN_ADD] = {14, 15},
};
const struct channel_range *zd_channel_range(u8 regdomain)
{
if (regdomain >= ARRAY_SIZE(channel_ranges))
regdomain = 0;
return &channel_ranges[regdomain];
}
int zd_regdomain_supports_channel(u8 regdomain, u8 channel)
{
const struct channel_range *range = zd_channel_range(regdomain);
return range->start <= channel && channel < range->end;
}
int zd_regdomain_supported(u8 regdomain)
{
const struct channel_range *range = zd_channel_range(regdomain);
return range->start != 0;
}
/* Stores channel frequencies in MHz. */
static const u16 channel_frequencies[] = {
2412, 2417, 2422, 2427, 2432, 2437, 2442, 2447,
2452, 2457, 2462, 2467, 2472, 2484,
};
#define NUM_CHANNELS ARRAY_SIZE(channel_frequencies)
static int compute_freq(struct iw_freq *freq, u32 mhz, u32 hz)
{
u32 factor;
freq->e = 0;
if (mhz >= 1000000000U) {
pr_debug("zd1211 mhz %u to large\n", mhz);
freq->m = 0;
return -EINVAL;
}
factor = 1000;
while (mhz >= factor) {
freq->e += 1;
factor *= 10;
}
factor /= 1000U;
freq->m = mhz * (1000000U/factor) + hz/factor;
return 0;
}
int zd_channel_to_freq(struct iw_freq *freq, u8 channel)
{
if (channel > NUM_CHANNELS) {
freq->m = 0;
freq->e = 0;
return -EINVAL;
}
if (!channel) {
freq->m = 0;
freq->e = 0;
return -EINVAL;
}
return compute_freq(freq, channel_frequencies[channel-1], 0);
}
static int freq_to_mhz(const struct iw_freq *freq)
{
u32 factor;
int e;
/* Such high frequencies are not supported. */
if (freq->e > 6)
return -EINVAL;
factor = 1;
for (e = freq->e; e > 0; --e) {
factor *= 10;
}
factor = 1000000U / factor;
if (freq->m % factor) {
return -EINVAL;
}
return freq->m / factor;
}
int zd_find_channel(u8 *channel, const struct iw_freq *freq)
{
int i, r;
u32 mhz;
if (!(freq->flags & IW_FREQ_FIXED))
return 0;
if (freq->m < 1000) {
if (freq->m > NUM_CHANNELS || freq->m == 0)
return -EINVAL;
*channel = freq->m;
return 1;
}
r = freq_to_mhz(freq);
if (r < 0)
return r;
mhz = r;
for (i = 0; i < NUM_CHANNELS; i++) {
if (mhz == channel_frequencies[i]) {
*channel = i+1;
return 1;
}
}
return -EINVAL;
}
int zd_geo_init(struct ieee80211_device *ieee, u8 regdomain)
{
struct ieee80211_geo geo;
const struct channel_range *range;
int i;
u8 channel;
dev_dbg(zd_mac_dev(zd_netdev_mac(ieee->dev)),
"regdomain %#04x\n", regdomain);
range = zd_channel_range(regdomain);
if (range->start == 0) {
dev_err(zd_mac_dev(zd_netdev_mac(ieee->dev)),
"zd1211 regdomain %#04x not supported\n",
regdomain);
return -EINVAL;
}
memset(&geo, 0, sizeof(geo));
for (i = 0, channel = range->start; channel < range->end; channel++) {
struct ieee80211_channel *chan = &geo.bg[i++];
chan->freq = channel_frequencies[channel - 1];
chan->channel = channel;
}
geo.bg_channels = i;
memcpy(geo.name, "XX ", 4);
ieee80211_set_geo(ieee, &geo);
return 0;
}

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#ifndef _ZD_IEEE80211_H
#define _ZD_IEEE80211_H
#include <net/ieee80211.h>
#include "zd_types.h"
/* Additional definitions from the standards.
*/
#define ZD_REGDOMAIN_FCC 0x10
#define ZD_REGDOMAIN_IC 0x20
#define ZD_REGDOMAIN_ETSI 0x30
#define ZD_REGDOMAIN_SPAIN 0x31
#define ZD_REGDOMAIN_FRANCE 0x32
#define ZD_REGDOMAIN_JAPAN_ADD 0x40
#define ZD_REGDOMAIN_JAPAN 0x41
enum {
MIN_CHANNEL24 = 1,
MAX_CHANNEL24 = 14,
};
struct channel_range {
u8 start;
u8 end; /* exclusive (channel must be less than end) */
};
struct iw_freq;
int zd_geo_init(struct ieee80211_device *ieee, u8 regdomain);
const struct channel_range *zd_channel_range(u8 regdomain);
int zd_regdomain_supports_channel(u8 regdomain, u8 channel);
int zd_regdomain_supported(u8 regdomain);
/* for 2.4 GHz band */
int zd_channel_to_freq(struct iw_freq *freq, u8 channel);
int zd_find_channel(u8 *channel, const struct iw_freq *freq);
#define ZD_PLCP_SERVICE_LENGTH_EXTENSION 0x80
struct ofdm_plcp_header {
u8 prefix[3];
__le16 service;
} __attribute__((packed));
static inline u8 zd_ofdm_plcp_header_rate(
const struct ofdm_plcp_header *header)
{
return header->prefix[0] & 0xf;
}
#define ZD_OFDM_RATE_6M 0xb
#define ZD_OFDM_RATE_9M 0xf
#define ZD_OFDM_RATE_12M 0xa
#define ZD_OFDM_RATE_18M 0xe
#define ZD_OFDM_RATE_24M 0x9
#define ZD_OFDM_RATE_36M 0xd
#define ZD_OFDM_RATE_48M 0x8
#define ZD_OFDM_RATE_54M 0xc
struct cck_plcp_header {
u8 signal;
u8 service;
__le16 length;
__le16 crc16;
} __attribute__((packed));
static inline u8 zd_cck_plcp_header_rate(const struct cck_plcp_header *header)
{
return header->signal;
}
#define ZD_CCK_SIGNAL_1M 0x0a
#define ZD_CCK_SIGNAL_2M 0x14
#define ZD_CCK_SIGNAL_5M5 0x37
#define ZD_CCK_SIGNAL_11M 0x6e
enum ieee80211_std {
IEEE80211B = 0x01,
IEEE80211A = 0x02,
IEEE80211G = 0x04,
};
#endif /* _ZD_IEEE80211_H */

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/* zd_mac.c
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#ifndef _ZD_MAC_H
#define _ZD_MAC_H
#include <linux/wireless.h>
#include <linux/kernel.h>
#include <net/ieee80211.h>
#include <net/ieee80211softmac.h>
#include "zd_chip.h"
#include "zd_netdev.h"
struct zd_ctrlset {
u8 modulation;
__le16 tx_length;
u8 control;
/* stores only the difference to tx_length on ZD1211B */
__le16 packet_length;
__le16 current_length;
u8 service;
__le16 next_frame_length;
} __attribute__((packed));
#define ZD_CS_RESERVED_SIZE 25
/* zd_crtlset field modulation */
#define ZD_CS_RATE_MASK 0x0f
#define ZD_CS_TYPE_MASK 0x10
#define ZD_CS_RATE(modulation) ((modulation) & ZD_CS_RATE_MASK)
#define ZD_CS_TYPE(modulation) ((modulation) & ZD_CS_TYPE_MASK)
#define ZD_CS_CCK 0x00
#define ZD_CS_OFDM 0x10
#define ZD_CS_CCK_RATE_1M 0x00
#define ZD_CS_CCK_RATE_2M 0x01
#define ZD_CS_CCK_RATE_5_5M 0x02
#define ZD_CS_CCK_RATE_11M 0x03
/* The rates for OFDM are encoded as in the PLCP header. Use ZD_OFDM_RATE_*.
*/
/* bit 5 is preamble (when in CCK mode), or a/g selection (when in OFDM mode) */
#define ZD_CS_CCK_PREA_LONG 0x00
#define ZD_CS_CCK_PREA_SHORT 0x20
#define ZD_CS_OFDM_MODE_11G 0x00
#define ZD_CS_OFDM_MODE_11A 0x20
/* zd_ctrlset control field */
#define ZD_CS_NEED_RANDOM_BACKOFF 0x01
#define ZD_CS_MULTICAST 0x02
#define ZD_CS_FRAME_TYPE_MASK 0x0c
#define ZD_CS_DATA_FRAME 0x00
#define ZD_CS_PS_POLL_FRAME 0x04
#define ZD_CS_MANAGEMENT_FRAME 0x08
#define ZD_CS_NO_SEQUENCE_CTL_FRAME 0x0c
#define ZD_CS_WAKE_DESTINATION 0x10
#define ZD_CS_RTS 0x20
#define ZD_CS_ENCRYPT 0x40
#define ZD_CS_SELF_CTS 0x80
/* Incoming frames are prepended by a PLCP header */
#define ZD_PLCP_HEADER_SIZE 5
struct rx_length_info {
__le16 length[3];
__le16 tag;
} __attribute__((packed));
#define RX_LENGTH_INFO_TAG 0x697e
struct rx_status {
/* rssi */
u8 signal_strength;
u8 signal_quality_cck;
u8 signal_quality_ofdm;
u8 decryption_type;
u8 frame_status;
} __attribute__((packed));
/* rx_status field decryption_type */
#define ZD_RX_NO_WEP 0
#define ZD_RX_WEP64 1
#define ZD_RX_TKIP 2
#define ZD_RX_AES 4
#define ZD_RX_WEP128 5
#define ZD_RX_WEP256 6
/* rx_status field frame_status */
#define ZD_RX_FRAME_MODULATION_MASK 0x01
#define ZD_RX_CCK 0x00
#define ZD_RX_OFDM 0x01
#define ZD_RX_TIMEOUT_ERROR 0x02
#define ZD_RX_FIFO_OVERRUN_ERROR 0x04
#define ZD_RX_DECRYPTION_ERROR 0x08
#define ZD_RX_CRC32_ERROR 0x10
#define ZD_RX_NO_ADDR1_MATCH_ERROR 0x20
#define ZD_RX_CRC16_ERROR 0x40
#define ZD_RX_ERROR 0x80
enum mac_flags {
MAC_FIXED_CHANNEL = 0x01,
};
struct zd_mac {
struct net_device *netdev;
struct zd_chip chip;
spinlock_t lock;
/* Unlocked reading possible */
struct iw_statistics iw_stats;
u8 qual_average;
u8 rssi_average;
u8 regdomain;
u8 default_regdomain;
u8 requested_channel;
};
static inline struct ieee80211_device *zd_mac_to_ieee80211(struct zd_mac *mac)
{
return zd_netdev_ieee80211(mac->netdev);
}
static inline struct zd_mac *zd_netdev_mac(struct net_device *netdev)
{
return ieee80211softmac_priv(netdev);
}
static inline struct zd_mac *zd_chip_to_mac(struct zd_chip *chip)
{
return container_of(chip, struct zd_mac, chip);
}
static inline struct zd_mac *zd_usb_to_mac(struct zd_usb *usb)
{
return zd_chip_to_mac(zd_usb_to_chip(usb));
}
#define zd_mac_dev(mac) (zd_chip_dev(&(mac)->chip))
int zd_mac_init(struct zd_mac *mac,
struct net_device *netdev,
struct usb_interface *intf);
void zd_mac_clear(struct zd_mac *mac);
int zd_mac_init_hw(struct zd_mac *mac, u8 device_type);
int zd_mac_open(struct net_device *netdev);
int zd_mac_stop(struct net_device *netdev);
int zd_mac_set_mac_address(struct net_device *dev, void *p);
int zd_mac_rx(struct zd_mac *mac, const u8 *buffer, unsigned int length);
int zd_mac_set_regdomain(struct zd_mac *zd_mac, u8 regdomain);
u8 zd_mac_get_regdomain(struct zd_mac *zd_mac);
int zd_mac_request_channel(struct zd_mac *mac, u8 channel);
int zd_mac_get_channel(struct zd_mac *mac, u8 *channel, u8 *flags);
int zd_mac_set_mode(struct zd_mac *mac, u32 mode);
int zd_mac_get_mode(struct zd_mac *mac, u32 *mode);
int zd_mac_get_range(struct zd_mac *mac, struct iw_range *range);
struct iw_statistics *zd_mac_get_wireless_stats(struct net_device *ndev);
#ifdef DEBUG
void zd_dump_rx_status(const struct rx_status *status);
#else
#define zd_dump_rx_status(status)
#endif /* DEBUG */
#endif /* _ZD_MAC_H */

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/* zd_netdev.c
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#include <linux/netdevice.h>
#include <linux/etherdevice.h>
#include <linux/skbuff.h>
#include <net/ieee80211.h>
#include <net/ieee80211softmac.h>
#include <net/ieee80211softmac_wx.h>
#include <net/iw_handler.h>
#include "zd_def.h"
#include "zd_netdev.h"
#include "zd_mac.h"
#include "zd_ieee80211.h"
/* Region 0 means reset regdomain to default. */
static int zd_set_regdomain(struct net_device *netdev,
struct iw_request_info *info,
union iwreq_data *req, char *extra)
{
const u8 *regdomain = (u8 *)req;
return zd_mac_set_regdomain(zd_netdev_mac(netdev), *regdomain);
}
static int zd_get_regdomain(struct net_device *netdev,
struct iw_request_info *info,
union iwreq_data *req, char *extra)
{
u8 *regdomain = (u8 *)req;
if (!regdomain)
return -EINVAL;
*regdomain = zd_mac_get_regdomain(zd_netdev_mac(netdev));
return 0;
}
static const struct iw_priv_args zd_priv_args[] = {
{
.cmd = ZD_PRIV_SET_REGDOMAIN,
.set_args = IW_PRIV_TYPE_BYTE | IW_PRIV_SIZE_FIXED | 1,
.name = "set_regdomain",
},
{
.cmd = ZD_PRIV_GET_REGDOMAIN,
.get_args = IW_PRIV_TYPE_BYTE | IW_PRIV_SIZE_FIXED | 1,
.name = "get_regdomain",
},
};
#define PRIV_OFFSET(x) [(x)-SIOCIWFIRSTPRIV]
static const iw_handler zd_priv_handler[] = {
PRIV_OFFSET(ZD_PRIV_SET_REGDOMAIN) = zd_set_regdomain,
PRIV_OFFSET(ZD_PRIV_GET_REGDOMAIN) = zd_get_regdomain,
};
static int iw_get_name(struct net_device *netdev,
struct iw_request_info *info,
union iwreq_data *req, char *extra)
{
/* FIXME: check whether 802.11a will also supported, add also
* zd1211B, if we support it.
*/
strlcpy(req->name, "802.11g zd1211", IFNAMSIZ);
return 0;
}
static int iw_set_freq(struct net_device *netdev,
struct iw_request_info *info,
union iwreq_data *req, char *extra)
{
int r;
struct zd_mac *mac = zd_netdev_mac(netdev);
struct iw_freq *freq = &req->freq;
u8 channel;
r = zd_find_channel(&channel, freq);
if (r < 0)
return r;
r = zd_mac_request_channel(mac, channel);
return r;
}
static int iw_get_freq(struct net_device *netdev,
struct iw_request_info *info,
union iwreq_data *req, char *extra)
{
int r;
struct zd_mac *mac = zd_netdev_mac(netdev);
struct iw_freq *freq = &req->freq;
u8 channel;
u8 flags;
r = zd_mac_get_channel(mac, &channel, &flags);
if (r)
return r;
freq->flags = (flags & MAC_FIXED_CHANNEL) ?
IW_FREQ_FIXED : IW_FREQ_AUTO;
dev_dbg_f(zd_mac_dev(mac), "channel %s\n",
(flags & MAC_FIXED_CHANNEL) ? "fixed" : "auto");
return zd_channel_to_freq(freq, channel);
}
static int iw_set_mode(struct net_device *netdev,
struct iw_request_info *info,
union iwreq_data *req, char *extra)
{
return zd_mac_set_mode(zd_netdev_mac(netdev), req->mode);
}
static int iw_get_mode(struct net_device *netdev,
struct iw_request_info *info,
union iwreq_data *req, char *extra)
{
return zd_mac_get_mode(zd_netdev_mac(netdev), &req->mode);
}
static int iw_get_range(struct net_device *netdev,
struct iw_request_info *info,
union iwreq_data *req, char *extra)
{
struct iw_range *range = (struct iw_range *)extra;
dev_dbg_f(zd_mac_dev(zd_netdev_mac(netdev)), "\n");
req->data.length = sizeof(*range);
return zd_mac_get_range(zd_netdev_mac(netdev), range);
}
static int iw_set_encode(struct net_device *netdev,
struct iw_request_info *info,
union iwreq_data *data,
char *extra)
{
return ieee80211_wx_set_encode(zd_netdev_ieee80211(netdev), info,
data, extra);
}
static int iw_get_encode(struct net_device *netdev,
struct iw_request_info *info,
union iwreq_data *data,
char *extra)
{
return ieee80211_wx_get_encode(zd_netdev_ieee80211(netdev), info,
data, extra);
}
static int iw_set_encodeext(struct net_device *netdev,
struct iw_request_info *info,
union iwreq_data *data,
char *extra)
{
return ieee80211_wx_set_encodeext(zd_netdev_ieee80211(netdev), info,
data, extra);
}
static int iw_get_encodeext(struct net_device *netdev,
struct iw_request_info *info,
union iwreq_data *data,
char *extra)
{
return ieee80211_wx_get_encodeext(zd_netdev_ieee80211(netdev), info,
data, extra);
}
#define WX(x) [(x)-SIOCIWFIRST]
static const iw_handler zd_standard_iw_handlers[] = {
WX(SIOCGIWNAME) = iw_get_name,
WX(SIOCSIWFREQ) = iw_set_freq,
WX(SIOCGIWFREQ) = iw_get_freq,
WX(SIOCSIWMODE) = iw_set_mode,
WX(SIOCGIWMODE) = iw_get_mode,
WX(SIOCGIWRANGE) = iw_get_range,
WX(SIOCSIWENCODE) = iw_set_encode,
WX(SIOCGIWENCODE) = iw_get_encode,
WX(SIOCSIWENCODEEXT) = iw_set_encodeext,
WX(SIOCGIWENCODEEXT) = iw_get_encodeext,
WX(SIOCSIWAUTH) = ieee80211_wx_set_auth,
WX(SIOCGIWAUTH) = ieee80211_wx_get_auth,
WX(SIOCSIWSCAN) = ieee80211softmac_wx_trigger_scan,
WX(SIOCGIWSCAN) = ieee80211softmac_wx_get_scan_results,
WX(SIOCSIWESSID) = ieee80211softmac_wx_set_essid,
WX(SIOCGIWESSID) = ieee80211softmac_wx_get_essid,
WX(SIOCSIWAP) = ieee80211softmac_wx_set_wap,
WX(SIOCGIWAP) = ieee80211softmac_wx_get_wap,
WX(SIOCSIWRATE) = ieee80211softmac_wx_set_rate,
WX(SIOCGIWRATE) = ieee80211softmac_wx_get_rate,
WX(SIOCSIWGENIE) = ieee80211softmac_wx_set_genie,
WX(SIOCGIWGENIE) = ieee80211softmac_wx_get_genie,
WX(SIOCSIWMLME) = ieee80211softmac_wx_set_mlme,
};
static const struct iw_handler_def iw_handler_def = {
.standard = zd_standard_iw_handlers,
.num_standard = ARRAY_SIZE(zd_standard_iw_handlers),
.private = zd_priv_handler,
.num_private = ARRAY_SIZE(zd_priv_handler),
.private_args = zd_priv_args,
.num_private_args = ARRAY_SIZE(zd_priv_args),
.get_wireless_stats = zd_mac_get_wireless_stats,
};
struct net_device *zd_netdev_alloc(struct usb_interface *intf)
{
int r;
struct net_device *netdev;
struct zd_mac *mac;
netdev = alloc_ieee80211softmac(sizeof(struct zd_mac));
if (!netdev) {
dev_dbg_f(&intf->dev, "out of memory\n");
return NULL;
}
mac = zd_netdev_mac(netdev);
r = zd_mac_init(mac, netdev, intf);
if (r) {
usb_set_intfdata(intf, NULL);
free_ieee80211(netdev);
return NULL;
}
SET_MODULE_OWNER(netdev);
SET_NETDEV_DEV(netdev, &intf->dev);
dev_dbg_f(&intf->dev, "netdev->flags %#06hx\n", netdev->flags);
dev_dbg_f(&intf->dev, "netdev->features %#010lx\n", netdev->features);
netdev->open = zd_mac_open;
netdev->stop = zd_mac_stop;
/* netdev->get_stats = */
/* netdev->set_multicast_list = */
netdev->set_mac_address = zd_mac_set_mac_address;
netdev->wireless_handlers = &iw_handler_def;
/* netdev->ethtool_ops = */
return netdev;
}
void zd_netdev_free(struct net_device *netdev)
{
if (!netdev)
return;
zd_mac_clear(zd_netdev_mac(netdev));
free_ieee80211(netdev);
}
void zd_netdev_disconnect(struct net_device *netdev)
{
unregister_netdev(netdev);
}

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/* zd_netdev.h: Header for net device related functions.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#ifndef _ZD_NETDEV_H
#define _ZD_NETDEV_H
#include <linux/usb.h>
#include <linux/netdevice.h>
#include <net/ieee80211.h>
#define ZD_PRIV_SET_REGDOMAIN (SIOCIWFIRSTPRIV)
#define ZD_PRIV_GET_REGDOMAIN (SIOCIWFIRSTPRIV+1)
static inline struct ieee80211_device *zd_netdev_ieee80211(
struct net_device *ndev)
{
return netdev_priv(ndev);
}
static inline struct net_device *zd_ieee80211_to_netdev(
struct ieee80211_device *ieee)
{
return ieee->dev;
}
struct net_device *zd_netdev_alloc(struct usb_interface *intf);
void zd_netdev_free(struct net_device *netdev);
void zd_netdev_disconnect(struct net_device *netdev);
#endif /* _ZD_NETDEV_H */

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/* zd_rf.c
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#include <linux/errno.h>
#include <linux/string.h>
#include "zd_def.h"
#include "zd_rf.h"
#include "zd_ieee80211.h"
#include "zd_chip.h"
static const char *rfs[] = {
[0] = "unknown RF0",
[1] = "unknown RF1",
[UW2451_RF] = "UW2451_RF",
[UCHIP_RF] = "UCHIP_RF",
[AL2230_RF] = "AL2230_RF",
[AL7230B_RF] = "AL7230B_RF",
[THETA_RF] = "THETA_RF",
[AL2210_RF] = "AL2210_RF",
[MAXIM_NEW_RF] = "MAXIM_NEW_RF",
[UW2453_RF] = "UW2453_RF",
[AL2230S_RF] = "AL2230S_RF",
[RALINK_RF] = "RALINK_RF",
[INTERSIL_RF] = "INTERSIL_RF",
[RF2959_RF] = "RF2959_RF",
[MAXIM_NEW2_RF] = "MAXIM_NEW2_RF",
[PHILIPS_RF] = "PHILIPS_RF",
};
const char *zd_rf_name(u8 type)
{
if (type & 0xf0)
type = 0;
return rfs[type];
}
void zd_rf_init(struct zd_rf *rf)
{
memset(rf, 0, sizeof(*rf));
}
void zd_rf_clear(struct zd_rf *rf)
{
memset(rf, 0, sizeof(*rf));
}
int zd_rf_init_hw(struct zd_rf *rf, u8 type)
{
int r, t;
struct zd_chip *chip = zd_rf_to_chip(rf);
ZD_ASSERT(mutex_is_locked(&chip->mutex));
switch (type) {
case RF2959_RF:
r = zd_rf_init_rf2959(rf);
if (r)
return r;
break;
case AL2230_RF:
r = zd_rf_init_al2230(rf);
if (r)
return r;
break;
default:
dev_err(zd_chip_dev(chip),
"RF %s %#x is not supported\n", zd_rf_name(type), type);
rf->type = 0;
return -ENODEV;
}
rf->type = type;
r = zd_chip_lock_phy_regs(chip);
if (r)
return r;
t = rf->init_hw(rf);
r = zd_chip_unlock_phy_regs(chip);
if (t)
r = t;
return r;
}
int zd_rf_scnprint_id(struct zd_rf *rf, char *buffer, size_t size)
{
return scnprintf(buffer, size, "%s", zd_rf_name(rf->type));
}
int zd_rf_set_channel(struct zd_rf *rf, u8 channel)
{
int r;
ZD_ASSERT(mutex_is_locked(&zd_rf_to_chip(rf)->mutex));
if (channel < MIN_CHANNEL24)
return -EINVAL;
if (channel > MAX_CHANNEL24)
return -EINVAL;
dev_dbg_f(zd_chip_dev(zd_rf_to_chip(rf)), "channel: %d\n", channel);
r = rf->set_channel(rf, channel);
if (r >= 0)
rf->channel = channel;
return r;
}
int zd_switch_radio_on(struct zd_rf *rf)
{
int r, t;
struct zd_chip *chip = zd_rf_to_chip(rf);
ZD_ASSERT(mutex_is_locked(&chip->mutex));
r = zd_chip_lock_phy_regs(chip);
if (r)
return r;
t = rf->switch_radio_on(rf);
r = zd_chip_unlock_phy_regs(chip);
if (t)
r = t;
return r;
}
int zd_switch_radio_off(struct zd_rf *rf)
{
int r, t;
struct zd_chip *chip = zd_rf_to_chip(rf);
/* TODO: move phy regs handling to zd_chip */
ZD_ASSERT(mutex_is_locked(&chip->mutex));
r = zd_chip_lock_phy_regs(chip);
if (r)
return r;
t = rf->switch_radio_off(rf);
r = zd_chip_unlock_phy_regs(chip);
if (t)
r = t;
return r;
}

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/* zd_rf.h
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#ifndef _ZD_RF_H
#define _ZD_RF_H
#include "zd_types.h"
#define UW2451_RF 0x2
#define UCHIP_RF 0x3
#define AL2230_RF 0x4
#define AL7230B_RF 0x5 /* a,b,g */
#define THETA_RF 0x6
#define AL2210_RF 0x7
#define MAXIM_NEW_RF 0x8
#define UW2453_RF 0x9
#define AL2230S_RF 0xa
#define RALINK_RF 0xb
#define INTERSIL_RF 0xc
#define RF2959_RF 0xd
#define MAXIM_NEW2_RF 0xe
#define PHILIPS_RF 0xf
#define RF_CHANNEL(ch) [(ch)-1]
/* Provides functions of the RF transceiver. */
enum {
RF_REG_BITS = 6,
RF_VALUE_BITS = 18,
RF_RV_BITS = RF_REG_BITS + RF_VALUE_BITS,
};
struct zd_rf {
u8 type;
u8 channel;
/*
* Whether this RF should patch the 6M band edge
* (assuming E2P_POD agrees)
*/
u8 patch_6m_band_edge:1;
/* RF-specific functions */
int (*init_hw)(struct zd_rf *rf);
int (*set_channel)(struct zd_rf *rf, u8 channel);
int (*switch_radio_on)(struct zd_rf *rf);
int (*switch_radio_off)(struct zd_rf *rf);
};
const char *zd_rf_name(u8 type);
void zd_rf_init(struct zd_rf *rf);
void zd_rf_clear(struct zd_rf *rf);
int zd_rf_init_hw(struct zd_rf *rf, u8 type);
int zd_rf_scnprint_id(struct zd_rf *rf, char *buffer, size_t size);
int zd_rf_set_channel(struct zd_rf *rf, u8 channel);
int zd_switch_radio_on(struct zd_rf *rf);
int zd_switch_radio_off(struct zd_rf *rf);
/* Functions for individual RF chips */
int zd_rf_init_rf2959(struct zd_rf *rf);
int zd_rf_init_al2230(struct zd_rf *rf);
#endif /* _ZD_RF_H */

308
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/* zd_rf_al2230.c: Functions for the AL2230 RF controller
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#include <linux/kernel.h>
#include "zd_rf.h"
#include "zd_usb.h"
#include "zd_chip.h"
static const u32 al2230_table[][3] = {
RF_CHANNEL( 1) = { 0x03f790, 0x033331, 0x00000d, },
RF_CHANNEL( 2) = { 0x03f790, 0x0b3331, 0x00000d, },
RF_CHANNEL( 3) = { 0x03e790, 0x033331, 0x00000d, },
RF_CHANNEL( 4) = { 0x03e790, 0x0b3331, 0x00000d, },
RF_CHANNEL( 5) = { 0x03f7a0, 0x033331, 0x00000d, },
RF_CHANNEL( 6) = { 0x03f7a0, 0x0b3331, 0x00000d, },
RF_CHANNEL( 7) = { 0x03e7a0, 0x033331, 0x00000d, },
RF_CHANNEL( 8) = { 0x03e7a0, 0x0b3331, 0x00000d, },
RF_CHANNEL( 9) = { 0x03f7b0, 0x033331, 0x00000d, },
RF_CHANNEL(10) = { 0x03f7b0, 0x0b3331, 0x00000d, },
RF_CHANNEL(11) = { 0x03e7b0, 0x033331, 0x00000d, },
RF_CHANNEL(12) = { 0x03e7b0, 0x0b3331, 0x00000d, },
RF_CHANNEL(13) = { 0x03f7c0, 0x033331, 0x00000d, },
RF_CHANNEL(14) = { 0x03e7c0, 0x066661, 0x00000d, },
};
static int zd1211_al2230_init_hw(struct zd_rf *rf)
{
int r;
struct zd_chip *chip = zd_rf_to_chip(rf);
static const struct zd_ioreq16 ioreqs[] = {
{ CR15, 0x20 }, { CR23, 0x40 }, { CR24, 0x20 },
{ CR26, 0x11 }, { CR28, 0x3e }, { CR29, 0x00 },
{ CR44, 0x33 }, { CR106, 0x2a }, { CR107, 0x1a },
{ CR109, 0x09 }, { CR110, 0x27 }, { CR111, 0x2b },
{ CR112, 0x2b }, { CR119, 0x0a }, { CR10, 0x89 },
/* for newest (3rd cut) AL2300 */
{ CR17, 0x28 },
{ CR26, 0x93 }, { CR34, 0x30 },
/* for newest (3rd cut) AL2300 */
{ CR35, 0x3e },
{ CR41, 0x24 }, { CR44, 0x32 },
/* for newest (3rd cut) AL2300 */
{ CR46, 0x96 },
{ CR47, 0x1e }, { CR79, 0x58 }, { CR80, 0x30 },
{ CR81, 0x30 }, { CR87, 0x0a }, { CR89, 0x04 },
{ CR92, 0x0a }, { CR99, 0x28 }, { CR100, 0x00 },
{ CR101, 0x13 }, { CR102, 0x27 }, { CR106, 0x24 },
{ CR107, 0x2a }, { CR109, 0x09 }, { CR110, 0x13 },
{ CR111, 0x1f }, { CR112, 0x1f }, { CR113, 0x27 },
{ CR114, 0x27 },
/* for newest (3rd cut) AL2300 */
{ CR115, 0x24 },
{ CR116, 0x24 }, { CR117, 0xf4 }, { CR118, 0xfc },
{ CR119, 0x10 }, { CR120, 0x4f }, { CR121, 0x77 },
{ CR122, 0xe0 }, { CR137, 0x88 }, { CR252, 0xff },
{ CR253, 0xff },
/* These following happen separately in the vendor driver */
{ },
/* shdnb(PLL_ON)=0 */
{ CR251, 0x2f },
/* shdnb(PLL_ON)=1 */
{ CR251, 0x3f },
{ CR138, 0x28 }, { CR203, 0x06 },
};
static const u32 rv[] = {
/* Channel 1 */
0x03f790,
0x033331,
0x00000d,
0x0b3331,
0x03b812,
0x00fff3,
0x000da4,
0x0f4dc5, /* fix freq shift, 0x04edc5 */
0x0805b6,
0x011687,
0x000688,
0x0403b9, /* external control TX power (CR31) */
0x00dbba,
0x00099b,
0x0bdffc,
0x00000d,
0x00500f,
/* These writes happen separately in the vendor driver */
0x00d00f,
0x004c0f,
0x00540f,
0x00700f,
0x00500f,
};
r = zd_iowrite16a_locked(chip, ioreqs, ARRAY_SIZE(ioreqs));
if (r)
return r;
r = zd_rfwritev_locked(chip, rv, ARRAY_SIZE(rv), RF_RV_BITS);
if (r)
return r;
return 0;
}
static int zd1211b_al2230_init_hw(struct zd_rf *rf)
{
int r;
struct zd_chip *chip = zd_rf_to_chip(rf);
static const struct zd_ioreq16 ioreqs1[] = {
{ CR10, 0x89 }, { CR15, 0x20 },
{ CR17, 0x2B }, /* for newest(3rd cut) AL2230 */
{ CR23, 0x40 }, { CR24, 0x20 }, { CR26, 0x93 },
{ CR28, 0x3e }, { CR29, 0x00 },
{ CR33, 0x28 }, /* 5621 */
{ CR34, 0x30 },
{ CR35, 0x3e }, /* for newest(3rd cut) AL2230 */
{ CR41, 0x24 }, { CR44, 0x32 },
{ CR46, 0x99 }, /* for newest(3rd cut) AL2230 */
{ CR47, 0x1e },
/* ZD1211B 05.06.10 */
{ CR48, 0x00 }, { CR49, 0x00 }, { CR51, 0x01 },
{ CR52, 0x80 }, { CR53, 0x7e }, { CR65, 0x00 },
{ CR66, 0x00 }, { CR67, 0x00 }, { CR68, 0x00 },
{ CR69, 0x28 },
{ CR79, 0x58 }, { CR80, 0x30 }, { CR81, 0x30 },
{ CR87, 0x0a }, { CR89, 0x04 },
{ CR91, 0x00 }, /* 5621 */
{ CR92, 0x0a },
{ CR98, 0x8d }, /* 4804, for 1212 new algorithm */
{ CR99, 0x00 }, /* 5621 */
{ CR101, 0x13 }, { CR102, 0x27 },
{ CR106, 0x24 }, /* for newest(3rd cut) AL2230 */
{ CR107, 0x2a },
{ CR109, 0x13 }, /* 4804, for 1212 new algorithm */
{ CR110, 0x1f }, /* 4804, for 1212 new algorithm */
{ CR111, 0x1f }, { CR112, 0x1f }, { CR113, 0x27 },
{ CR114, 0x27 },
{ CR115, 0x26 }, /* 24->26 at 4902 for newest(3rd cut) AL2230 */
{ CR116, 0x24 },
{ CR117, 0xfa }, /* for 1211b */
{ CR118, 0xfa }, /* for 1211b */
{ CR119, 0x10 },
{ CR120, 0x4f },
{ CR121, 0x6c }, /* for 1211b */
{ CR122, 0xfc }, /* E0->FC at 4902 */
{ CR123, 0x57 }, /* 5623 */
{ CR125, 0xad }, /* 4804, for 1212 new algorithm */
{ CR126, 0x6c }, /* 5614 */
{ CR127, 0x03 }, /* 4804, for 1212 new algorithm */
{ CR137, 0x50 }, /* 5614 */
{ CR138, 0xa8 },
{ CR144, 0xac }, /* 5621 */
{ CR150, 0x0d }, { CR252, 0x00 }, { CR253, 0x00 },
};
static const u32 rv1[] = {
/* channel 1 */
0x03f790,
0x033331,
0x00000d,
0x0b3331,
0x03b812,
0x00fff3,
0x0005a4,
0x0f4dc5, /* fix freq shift 0x044dc5 */
0x0805b6,
0x0146c7,
0x000688,
0x0403b9, /* External control TX power (CR31) */
0x00dbba,
0x00099b,
0x0bdffc,
0x00000d,
0x00580f,
};
static const struct zd_ioreq16 ioreqs2[] = {
{ CR47, 0x1e }, { CR_RFCFG, 0x03 },
};
static const u32 rv2[] = {
0x00880f,
0x00080f,
};
static const struct zd_ioreq16 ioreqs3[] = {
{ CR_RFCFG, 0x00 }, { CR47, 0x1e }, { CR251, 0x7f },
};
static const u32 rv3[] = {
0x00d80f,
0x00780f,
0x00580f,
};
static const struct zd_ioreq16 ioreqs4[] = {
{ CR138, 0x28 }, { CR203, 0x06 },
};
r = zd_iowrite16a_locked(chip, ioreqs1, ARRAY_SIZE(ioreqs1));
if (r)
return r;
r = zd_rfwritev_locked(chip, rv1, ARRAY_SIZE(rv1), RF_RV_BITS);
if (r)
return r;
r = zd_iowrite16a_locked(chip, ioreqs2, ARRAY_SIZE(ioreqs2));
if (r)
return r;
r = zd_rfwritev_locked(chip, rv2, ARRAY_SIZE(rv2), RF_RV_BITS);
if (r)
return r;
r = zd_iowrite16a_locked(chip, ioreqs3, ARRAY_SIZE(ioreqs3));
if (r)
return r;
r = zd_rfwritev_locked(chip, rv3, ARRAY_SIZE(rv3), RF_RV_BITS);
if (r)
return r;
return zd_iowrite16a_locked(chip, ioreqs4, ARRAY_SIZE(ioreqs4));
}
static int al2230_set_channel(struct zd_rf *rf, u8 channel)
{
int r;
const u32 *rv = al2230_table[channel-1];
struct zd_chip *chip = zd_rf_to_chip(rf);
static const struct zd_ioreq16 ioreqs[] = {
{ CR138, 0x28 },
{ CR203, 0x06 },
};
r = zd_rfwritev_locked(chip, rv, 3, RF_RV_BITS);
if (r)
return r;
return zd_iowrite16a_locked(chip, ioreqs, ARRAY_SIZE(ioreqs));
}
static int zd1211_al2230_switch_radio_on(struct zd_rf *rf)
{
struct zd_chip *chip = zd_rf_to_chip(rf);
static const struct zd_ioreq16 ioreqs[] = {
{ CR11, 0x00 },
{ CR251, 0x3f },
};
return zd_iowrite16a_locked(chip, ioreqs, ARRAY_SIZE(ioreqs));
}
static int zd1211b_al2230_switch_radio_on(struct zd_rf *rf)
{
struct zd_chip *chip = zd_rf_to_chip(rf);
static const struct zd_ioreq16 ioreqs[] = {
{ CR11, 0x00 },
{ CR251, 0x7f },
};
return zd_iowrite16a_locked(chip, ioreqs, ARRAY_SIZE(ioreqs));
}
static int al2230_switch_radio_off(struct zd_rf *rf)
{
struct zd_chip *chip = zd_rf_to_chip(rf);
static const struct zd_ioreq16 ioreqs[] = {
{ CR11, 0x04 },
{ CR251, 0x2f },
};
return zd_iowrite16a_locked(chip, ioreqs, ARRAY_SIZE(ioreqs));
}
int zd_rf_init_al2230(struct zd_rf *rf)
{
struct zd_chip *chip = zd_rf_to_chip(rf);
rf->set_channel = al2230_set_channel;
rf->switch_radio_off = al2230_switch_radio_off;
if (chip->is_zd1211b) {
rf->init_hw = zd1211b_al2230_init_hw;
rf->switch_radio_on = zd1211b_al2230_switch_radio_on;
} else {
rf->init_hw = zd1211_al2230_init_hw;
rf->switch_radio_on = zd1211_al2230_switch_radio_on;
}
rf->patch_6m_band_edge = 1;
return 0;
}

279
drivers/net/wireless/zd1211rw/zd_rf_rf2959.c Normal file
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/* zd_rf_rfmd.c: Functions for the RFMD RF controller
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#include <linux/kernel.h>
#include "zd_rf.h"
#include "zd_usb.h"
#include "zd_chip.h"
static u32 rf2959_table[][2] = {
RF_CHANNEL( 1) = { 0x181979, 0x1e6666 },
RF_CHANNEL( 2) = { 0x181989, 0x1e6666 },
RF_CHANNEL( 3) = { 0x181999, 0x1e6666 },
RF_CHANNEL( 4) = { 0x1819a9, 0x1e6666 },
RF_CHANNEL( 5) = { 0x1819b9, 0x1e6666 },
RF_CHANNEL( 6) = { 0x1819c9, 0x1e6666 },
RF_CHANNEL( 7) = { 0x1819d9, 0x1e6666 },
RF_CHANNEL( 8) = { 0x1819e9, 0x1e6666 },
RF_CHANNEL( 9) = { 0x1819f9, 0x1e6666 },
RF_CHANNEL(10) = { 0x181a09, 0x1e6666 },
RF_CHANNEL(11) = { 0x181a19, 0x1e6666 },
RF_CHANNEL(12) = { 0x181a29, 0x1e6666 },
RF_CHANNEL(13) = { 0x181a39, 0x1e6666 },
RF_CHANNEL(14) = { 0x181a60, 0x1c0000 },
};
#if 0
static int bits(u32 rw, int from, int to)
{
rw &= ~(0xffffffffU << (to+1));
rw >>= from;
return rw;
}
static int bit(u32 rw, int bit)
{
return bits(rw, bit, bit);
}
static void dump_regwrite(u32 rw)
{
int reg = bits(rw, 18, 22);
int rw_flag = bits(rw, 23, 23);
PDEBUG("rf2959 %#010x reg %d rw %d", rw, reg, rw_flag);
switch (reg) {
case 0:
PDEBUG("reg0 CFG1 ref_sel %d hybernate %d rf_vco_reg_en %d"
" if_vco_reg_en %d if_vga_en %d",
bits(rw, 14, 15), bit(rw, 3), bit(rw, 2), bit(rw, 1),
bit(rw, 0));
break;
case 1:
PDEBUG("reg1 IFPLL1 pll_en1 %d kv_en1 %d vtc_en1 %d lpf1 %d"
" cpl1 %d pdp1 %d autocal_en1 %d ld_en1 %d ifloopr %d"
" ifloopc %d dac1 %d",
bit(rw, 17), bit(rw, 16), bit(rw, 15), bit(rw, 14),
bit(rw, 13), bit(rw, 12), bit(rw, 11), bit(rw, 10),
bits(rw, 7, 9), bits(rw, 4, 6), bits(rw, 0, 3));
break;
case 2:
PDEBUG("reg2 IFPLL2 n1 %d num1 %d",
bits(rw, 6, 17), bits(rw, 0, 5));
break;
case 3:
PDEBUG("reg3 IFPLL3 num %d", bits(rw, 0, 17));
break;
case 4:
PDEBUG("reg4 IFPLL4 dn1 %#04x ct_def1 %d kv_def1 %d",
bits(rw, 8, 16), bits(rw, 4, 7), bits(rw, 0, 3));
break;
case 5:
PDEBUG("reg5 RFPLL1 pll_en %d kv_en %d vtc_en %d lpf %d cpl %d"
" pdp %d autocal_en %d ld_en %d rfloopr %d rfloopc %d"
" dac %d",
bit(rw, 17), bit(rw, 16), bit(rw, 15), bit(rw, 14),
bit(rw, 13), bit(rw, 12), bit(rw, 11), bit(rw, 10),
bits(rw, 7, 9), bits(rw, 4, 6), bits(rw, 0,3));
break;
case 6:
PDEBUG("reg6 RFPLL2 n %d num %d",
bits(rw, 6, 17), bits(rw, 0, 5));
break;
case 7:
PDEBUG("reg7 RFPLL3 num2 %d", bits(rw, 0, 17));
break;
case 8:
PDEBUG("reg8 RFPLL4 dn %#06x ct_def %d kv_def %d",
bits(rw, 8, 16), bits(rw, 4, 7), bits(rw, 0, 3));
break;
case 9:
PDEBUG("reg9 CAL1 tvco %d tlock %d m_ct_value %d ld_window %d",
bits(rw, 13, 17), bits(rw, 8, 12), bits(rw, 3, 7),
bits(rw, 0, 2));
break;
case 10:
PDEBUG("reg10 TXRX1 rxdcfbbyps %d pcontrol %d txvgc %d"
" rxlpfbw %d txlpfbw %d txdiffmode %d txenmode %d"
" intbiasen %d tybypass %d",
bit(rw, 17), bits(rw, 15, 16), bits(rw, 10, 14),
bits(rw, 7, 9), bits(rw, 4, 6), bit(rw, 3), bit(rw, 2),
bit(rw, 1), bit(rw, 0));
break;
case 11:
PDEBUG("reg11 PCNT1 mid_bias %d p_desired %d pc_offset %d"
" tx_delay %d",
bits(rw, 15, 17), bits(rw, 9, 14), bits(rw, 3, 8),
bits(rw, 0, 2));
break;
case 12:
PDEBUG("reg12 PCNT2 max_power %d mid_power %d min_power %d",
bits(rw, 12, 17), bits(rw, 6, 11), bits(rw, 0, 5));
break;
case 13:
PDEBUG("reg13 VCOT1 rfpll vco comp %d ifpll vco comp %d"
" lobias %d if_biasbuf %d if_biasvco %d rf_biasbuf %d"
" rf_biasvco %d",
bit(rw, 17), bit(rw, 16), bit(rw, 15),
bits(rw, 8, 9), bits(rw, 5, 7), bits(rw, 3, 4),
bits(rw, 0, 2));
break;
case 14:
PDEBUG("reg14 IQCAL rx_acal %d rx_pcal %d"
" tx_acal %d tx_pcal %d",
bits(rw, 13, 17), bits(rw, 9, 12), bits(rw, 4, 8),
bits(rw, 0, 3));
break;
}
}
#endif /* 0 */
static int rf2959_init_hw(struct zd_rf *rf)
{
int r;
struct zd_chip *chip = zd_rf_to_chip(rf);
static const struct zd_ioreq16 ioreqs[] = {
{ CR2, 0x1E }, { CR9, 0x20 }, { CR10, 0x89 },
{ CR11, 0x00 }, { CR15, 0xD0 }, { CR17, 0x68 },
{ CR19, 0x4a }, { CR20, 0x0c }, { CR21, 0x0E },
{ CR23, 0x48 },
/* normal size for cca threshold */
{ CR24, 0x14 },
/* { CR24, 0x20 }, */
{ CR26, 0x90 }, { CR27, 0x30 }, { CR29, 0x20 },
{ CR31, 0xb2 }, { CR32, 0x43 }, { CR33, 0x28 },
{ CR38, 0x30 }, { CR34, 0x0f }, { CR35, 0xF0 },
{ CR41, 0x2a }, { CR46, 0x7F }, { CR47, 0x1E },
{ CR51, 0xc5 }, { CR52, 0xc5 }, { CR53, 0xc5 },
{ CR79, 0x58 }, { CR80, 0x30 }, { CR81, 0x30 },
{ CR82, 0x00 }, { CR83, 0x24 }, { CR84, 0x04 },
{ CR85, 0x00 }, { CR86, 0x10 }, { CR87, 0x2A },
{ CR88, 0x10 }, { CR89, 0x24 }, { CR90, 0x18 },
/* { CR91, 0x18 }, */
/* should solve continous CTS frame problems */
{ CR91, 0x00 },
{ CR92, 0x0a }, { CR93, 0x00 }, { CR94, 0x01 },
{ CR95, 0x00 }, { CR96, 0x40 }, { CR97, 0x37 },
{ CR98, 0x05 }, { CR99, 0x28 }, { CR100, 0x00 },
{ CR101, 0x13 }, { CR102, 0x27 }, { CR103, 0x27 },
{ CR104, 0x18 }, { CR105, 0x12 },
/* normal size */
{ CR106, 0x1a },
/* { CR106, 0x22 }, */
{ CR107, 0x24 }, { CR108, 0x0a }, { CR109, 0x13 },
{ CR110, 0x2F }, { CR111, 0x27 }, { CR112, 0x27 },
{ CR113, 0x27 }, { CR114, 0x27 }, { CR115, 0x40 },
{ CR116, 0x40 }, { CR117, 0xF0 }, { CR118, 0xF0 },
{ CR119, 0x16 },
/* no TX continuation */
{ CR122, 0x00 },
/* { CR122, 0xff }, */
{ CR127, 0x03 }, { CR131, 0x08 }, { CR138, 0x28 },
{ CR148, 0x44 }, { CR150, 0x10 }, { CR169, 0xBB },
{ CR170, 0xBB },
};
static const u32 rv[] = {
0x000007, /* REG0(CFG1) */
0x07dd43, /* REG1(IFPLL1) */
0x080959, /* REG2(IFPLL2) */
0x0e6666,
0x116a57, /* REG4 */
0x17dd43, /* REG5 */
0x1819f9, /* REG6 */
0x1e6666,
0x214554,
0x25e7fa,
0x27fffa,
/* The Zydas driver somehow forgets to set this value. It's
* only set for Japan. We are using internal power control
* for now.
*/
0x294128, /* internal power */
/* 0x28252c, */ /* External control TX power */
/* CR31_CCK, CR51_6-36M, CR52_48M, CR53_54M */
0x2c0000,
0x300000,
0x340000, /* REG13(0xD) */
0x381e0f, /* REG14(0xE) */
/* Bogus, RF2959's data sheet doesn't know register 27, which is
* actually referenced here. The commented 0x11 is 17.
*/
0x6c180f, /* REG27(0x11) */
};
r = zd_iowrite16a_locked(chip, ioreqs, ARRAY_SIZE(ioreqs));
if (r)
return r;
return zd_rfwritev_locked(chip, rv, ARRAY_SIZE(rv), RF_RV_BITS);
}
static int rf2959_set_channel(struct zd_rf *rf, u8 channel)
{
int i, r;
u32 *rv = rf2959_table[channel-1];
struct zd_chip *chip = zd_rf_to_chip(rf);
for (i = 0; i < 2; i++) {
r = zd_rfwrite_locked(chip, rv[i], RF_RV_BITS);
if (r)
return r;
}
return 0;
}
static int rf2959_switch_radio_on(struct zd_rf *rf)
{
static const struct zd_ioreq16 ioreqs[] = {
{ CR10, 0x89 },
{ CR11, 0x00 },
};
struct zd_chip *chip = zd_rf_to_chip(rf);
return zd_iowrite16a_locked(chip, ioreqs, ARRAY_SIZE(ioreqs));
}
static int rf2959_switch_radio_off(struct zd_rf *rf)
{
static const struct zd_ioreq16 ioreqs[] = {
{ CR10, 0x15 },
{ CR11, 0x81 },
};
struct zd_chip *chip = zd_rf_to_chip(rf);
return zd_iowrite16a_locked(chip, ioreqs, ARRAY_SIZE(ioreqs));
}
int zd_rf_init_rf2959(struct zd_rf *rf)
{
struct zd_chip *chip = zd_rf_to_chip(rf);
if (chip->is_zd1211b) {
dev_err(zd_chip_dev(chip),
"RF2959 is currently not supported for ZD1211B"
" devices\n");
return -ENODEV;
}
rf->init_hw = rf2959_init_hw;
rf->set_channel = rf2959_set_channel;
rf->switch_radio_on = rf2959_switch_radio_on;
rf->switch_radio_off = rf2959_switch_radio_off;
return 0;
}

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/* zd_types.h
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#ifndef _ZD_TYPES_H
#define _ZD_TYPES_H
#include <linux/types.h>
/* We have three register spaces mapped into the overall USB address space of
* 64K words (16-bit values). There is the control register space of
* double-word registers, the eeprom register space and the firmware register
* space. The control register space is byte mapped, the others are word
* mapped.
*
* For that reason, we are using byte offsets for control registers and word
* offsets for everything else.
*/
typedef u32 __nocast zd_addr_t;
enum {
ADDR_BASE_MASK = 0xff000000,
ADDR_OFFSET_MASK = 0x0000ffff,
ADDR_ZERO_MASK = 0x00ff0000,
NULL_BASE = 0x00000000,
USB_BASE = 0x01000000,
CR_BASE = 0x02000000,
CR_MAX_OFFSET = 0x0b30,
E2P_BASE = 0x03000000,
E2P_MAX_OFFSET = 0x007e,
FW_BASE = 0x04000000,
FW_MAX_OFFSET = 0x0005,
};
#define ZD_ADDR_BASE(addr) ((u32)(addr) & ADDR_BASE_MASK)
#define ZD_OFFSET(addr) ((u32)(addr) & ADDR_OFFSET_MASK)
#define ZD_ADDR(base, offset) \
((zd_addr_t)(((base) & ADDR_BASE_MASK) | ((offset) & ADDR_OFFSET_MASK)))
#define ZD_NULL_ADDR ((zd_addr_t)0)
#define USB_REG(offset) ZD_ADDR(USB_BASE, offset) /* word addressing */
#define CTL_REG(offset) ZD_ADDR(CR_BASE, offset) /* byte addressing */
#define E2P_REG(offset) ZD_ADDR(E2P_BASE, offset) /* word addressing */
#define FW_REG(offset) ZD_ADDR(FW_BASE, offset) /* word addressing */
static inline zd_addr_t zd_inc_word(zd_addr_t addr)
{
u32 base = ZD_ADDR_BASE(addr);
u32 offset = ZD_OFFSET(addr);
offset += base == CR_BASE ? 2 : 1;
return base | offset;
}
#endif /* _ZD_TYPES_H */

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/* zd_usb.h: Header for USB interface implemented by ZD1211 chip
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#ifndef _ZD_USB_H
#define _ZD_USB_H
#include <linux/completion.h>
#include <linux/netdevice.h>
#include <linux/spinlock.h>
#include <linux/skbuff.h>
#include <linux/usb.h>
#include "zd_def.h"
#include "zd_types.h"
enum devicetype {
DEVICE_ZD1211 = 0,
DEVICE_ZD1211B = 1,
};
enum endpoints {
EP_CTRL = 0,
EP_DATA_OUT = 1,
EP_DATA_IN = 2,
EP_INT_IN = 3,
EP_REGS_OUT = 4,
};
enum {
USB_MAX_TRANSFER_SIZE = 4096, /* bytes */
/* FIXME: The original driver uses this value. We have to check,
* whether the MAX_TRANSFER_SIZE is sufficient and this needs only be
* used if one combined frame is split over two USB transactions.
*/
USB_MAX_RX_SIZE = 4800, /* bytes */
USB_MAX_IOWRITE16_COUNT = 15,
USB_MAX_IOWRITE32_COUNT = USB_MAX_IOWRITE16_COUNT/2,
USB_MAX_IOREAD16_COUNT = 15,
USB_MAX_IOREAD32_COUNT = USB_MAX_IOREAD16_COUNT/2,
USB_MIN_RFWRITE_BIT_COUNT = 16,
USB_MAX_RFWRITE_BIT_COUNT = 28,
USB_MAX_EP_INT_BUFFER = 64,
USB_ZD1211B_BCD_DEVICE = 0x4810,
};
enum control_requests {
USB_REQ_WRITE_REGS = 0x21,
USB_REQ_READ_REGS = 0x22,
USB_REQ_WRITE_RF = 0x23,
USB_REQ_PROG_FLASH = 0x24,
USB_REQ_EEPROM_START = 0x0128, /* ? request is a byte */
USB_REQ_EEPROM_MID = 0x28,
USB_REQ_EEPROM_END = 0x0228, /* ? request is a byte */
USB_REQ_FIRMWARE_DOWNLOAD = 0x30,
USB_REQ_FIRMWARE_CONFIRM = 0x31,
USB_REQ_FIRMWARE_READ_DATA = 0x32,
};
struct usb_req_read_regs {
__le16 id;
__le16 addr[0];
} __attribute__((packed));
struct reg_data {
__le16 addr;
__le16 value;
} __attribute__((packed));
struct usb_req_write_regs {
__le16 id;
struct reg_data reg_writes[0];
} __attribute__((packed));
enum {
RF_IF_LE = 0x02,
RF_CLK = 0x04,
RF_DATA = 0x08,
};
struct usb_req_rfwrite {
__le16 id;
__le16 value;
/* 1: 3683a */
/* 2: other (default) */
__le16 bits;
/* RF2595: 24 */
__le16 bit_values[0];
/* (CR203 & ~(RF_IF_LE | RF_CLK | RF_DATA)) | (bit ? RF_DATA : 0) */
} __attribute__((packed));
/* USB interrupt */
enum usb_int_id {
USB_INT_TYPE = 0x01,
USB_INT_ID_REGS = 0x90,
USB_INT_ID_RETRY_FAILED = 0xa0,
};
enum usb_int_flags {
USB_INT_READ_REGS_EN = 0x01,
};
struct usb_int_header {
u8 type; /* must always be 1 */
u8 id;
} __attribute__((packed));
struct usb_int_regs {
struct usb_int_header hdr;
struct reg_data regs[0];
} __attribute__((packed));
struct usb_int_retry_fail {
struct usb_int_header hdr;
u8 new_rate;
u8 _dummy;
u8 addr[ETH_ALEN];
u8 ibss_wakeup_dest;
} __attribute__((packed));
struct read_regs_int {
struct completion completion;
/* Stores the USB int structure and contains the USB address of the
* first requested register before request.
*/
u8 buffer[USB_MAX_EP_INT_BUFFER];
int length;
__le16 cr_int_addr;
};
struct zd_ioreq16 {
zd_addr_t addr;
u16 value;
};
struct zd_ioreq32 {
zd_addr_t addr;
u32 value;
};
struct zd_usb_interrupt {
struct read_regs_int read_regs;
spinlock_t lock;
struct urb *urb;
int interval;
u8 read_regs_enabled:1;
};
static inline struct usb_int_regs *get_read_regs(struct zd_usb_interrupt *intr)
{
return (struct usb_int_regs *)intr->read_regs.buffer;
}
#define URBS_COUNT 5
struct zd_usb_rx {
spinlock_t lock;
u8 fragment[2*USB_MAX_RX_SIZE];
unsigned int fragment_length;
unsigned int usb_packet_size;
struct urb **urbs;
int urbs_count;
};
struct zd_usb_tx {
spinlock_t lock;
};
/* Contains the usb parts. The structure doesn't require a lock, because intf
* and fw_base_offset, will not be changed after initialization.
*/
struct zd_usb {
struct zd_usb_interrupt intr;
struct zd_usb_rx rx;
struct zd_usb_tx tx;
struct usb_interface *intf;
u16 fw_base_offset;
};
#define zd_usb_dev(usb) (&usb->intf->dev)
static inline struct usb_device *zd_usb_to_usbdev(struct zd_usb *usb)
{
return interface_to_usbdev(usb->intf);
}
static inline struct net_device *zd_intf_to_netdev(struct usb_interface *intf)
{
return usb_get_intfdata(intf);
}
static inline struct net_device *zd_usb_to_netdev(struct zd_usb *usb)
{
return zd_intf_to_netdev(usb->intf);
}
void zd_usb_init(struct zd_usb *usb, struct net_device *netdev,
struct usb_interface *intf);
int zd_usb_init_hw(struct zd_usb *usb);
void zd_usb_clear(struct zd_usb *usb);
int zd_usb_scnprint_id(struct zd_usb *usb, char *buffer, size_t size);
int zd_usb_enable_int(struct zd_usb *usb);
void zd_usb_disable_int(struct zd_usb *usb);
int zd_usb_enable_rx(struct zd_usb *usb);
void zd_usb_disable_rx(struct zd_usb *usb);
int zd_usb_tx(struct zd_usb *usb, const u8 *frame, unsigned int length);
int zd_usb_ioread16v(struct zd_usb *usb, u16 *values,
const zd_addr_t *addresses, unsigned int count);
static inline int zd_usb_ioread16(struct zd_usb *usb, u16 *value,
const zd_addr_t addr)
{
return zd_usb_ioread16v(usb, value, (const zd_addr_t *)&addr, 1);
}
int zd_usb_iowrite16v(struct zd_usb *usb, const struct zd_ioreq16 *ioreqs,
unsigned int count);
int zd_usb_rfwrite(struct zd_usb *usb, u32 value, u8 bits);
#endif /* _ZD_USB_H */

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/* zd_util.c
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*
* Utility program
*/
#include "zd_def.h"
#include "zd_util.h"
#ifdef DEBUG
static char hex(u8 v)
{
v &= 0xf;
return (v < 10 ? '0' : 'a' - 10) + v;
}
static char hex_print(u8 c)
{
return (0x20 <= c && c < 0x7f) ? c : '.';
}
static void dump_line(const u8 *bytes, size_t size)
{
char c;
size_t i;
size = size <= 8 ? size : 8;
printk(KERN_DEBUG "zd1211 %p ", bytes);
for (i = 0; i < 8; i++) {
switch (i) {
case 1:
case 5:
c = '.';
break;
case 3:
c = ':';
break;
default:
c = ' ';
}
if (i < size) {
printk("%c%c%c", hex(bytes[i] >> 4), hex(bytes[i]), c);
} else {
printk(" %c", c);
}
}
for (i = 0; i < size; i++)
printk("%c", hex_print(bytes[i]));
printk("\n");
}
void zd_hexdump(const void *bytes, size_t size)
{
size_t i = 0;
do {
dump_line((u8 *)bytes + i, size-i);
i += 8;
} while (i < size);
}
#endif /* DEBUG */
void *zd_tail(const void *buffer, size_t buffer_size, size_t tail_size)
{
if (buffer_size < tail_size)
return NULL;
return (u8 *)buffer + (buffer_size - tail_size);
}

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/* zd_util.h
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#ifndef _ZD_UTIL_H
#define _ZD_UTIL_H
void *zd_tail(const void *buffer, size_t buffer_size, size_t tail_size);
#ifdef DEBUG
void zd_hexdump(const void *bytes, size_t size);
#else
#define zd_hexdump(bytes, size)
#endif /* DEBUG */
#endif /* _ZD_UTIL_H */