net: bcmgenet: Move wake-up event out of side band ISR
The side band interrupt service routine is not available on chips like 7211, or rather, it does not permit the signaling of wake-up events due to the complex interrupt hierarchy. Move the wake-up event accounting into a .resume_noirq function, account for possible wake-up events and clear the MPD/HFB interrupts from there, while leaving the hardware untouched until the resume function proceeds with doing its usual business. Because bcmgenet_wol_power_down_cfg() now enables the MPD and HFB interrupts, it is invoked by a .suspend_noirq function to prevent the servicing of interrupts after the clocks have been disabled. Signed-off-by: Doug Berger <opendmb@gmail.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -3270,10 +3270,7 @@ static irqreturn_t bcmgenet_isr0(int irq, void *dev_id)
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static irqreturn_t bcmgenet_wol_isr(int irq, void *dev_id)
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{
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struct bcmgenet_priv *priv = dev_id;
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pm_wakeup_event(&priv->pdev->dev, 0);
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/* Acknowledge the interrupt */
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return IRQ_HANDLED;
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}
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@ -4174,6 +4171,38 @@ static void bcmgenet_shutdown(struct platform_device *pdev)
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}
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#ifdef CONFIG_PM_SLEEP
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static int bcmgenet_resume_noirq(struct device *d)
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{
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struct net_device *dev = dev_get_drvdata(d);
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struct bcmgenet_priv *priv = netdev_priv(dev);
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int ret;
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u32 reg;
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if (!netif_running(dev))
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return 0;
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/* Turn on the clock */
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ret = clk_prepare_enable(priv->clk);
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if (ret)
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return ret;
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if (device_may_wakeup(d) && priv->wolopts) {
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/* Account for Wake-on-LAN events and clear those events
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* (Some devices need more time between enabling the clocks
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* and the interrupt register reflecting the wake event so
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* read the register twice)
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*/
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reg = bcmgenet_intrl2_0_readl(priv, INTRL2_CPU_STAT);
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reg = bcmgenet_intrl2_0_readl(priv, INTRL2_CPU_STAT);
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if (reg & UMAC_IRQ_WAKE_EVENT)
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pm_wakeup_event(&priv->pdev->dev, 0);
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}
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bcmgenet_intrl2_0_writel(priv, UMAC_IRQ_WAKE_EVENT, INTRL2_CPU_CLEAR);
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return 0;
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}
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static int bcmgenet_resume(struct device *d)
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{
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struct net_device *dev = dev_get_drvdata(d);
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@ -4185,11 +4214,6 @@ static int bcmgenet_resume(struct device *d)
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if (!netif_running(dev))
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return 0;
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/* Turn on the clock */
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ret = clk_prepare_enable(priv->clk);
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if (ret)
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return ret;
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/* From WOL-enabled suspend, switch to regular clock */
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if (device_may_wakeup(d) && priv->wolopts)
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bcmgenet_power_up(priv, GENET_POWER_WOL_MAGIC);
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@ -4262,7 +4286,6 @@ static int bcmgenet_suspend(struct device *d)
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{
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struct net_device *dev = dev_get_drvdata(d);
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struct bcmgenet_priv *priv = netdev_priv(dev);
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int ret = 0;
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u32 offset;
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if (!netif_running(dev))
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@ -4282,23 +4305,46 @@ static int bcmgenet_suspend(struct device *d)
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priv->hfb_en[2] = bcmgenet_hfb_reg_readl(priv, offset + sizeof(u32));
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bcmgenet_hfb_reg_writel(priv, 0, HFB_CTRL);
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return 0;
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}
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static int bcmgenet_suspend_noirq(struct device *d)
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{
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struct net_device *dev = dev_get_drvdata(d);
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struct bcmgenet_priv *priv = netdev_priv(dev);
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int ret = 0;
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if (!netif_running(dev))
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return 0;
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/* Prepare the device for Wake-on-LAN and switch to the slow clock */
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if (device_may_wakeup(d) && priv->wolopts)
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ret = bcmgenet_power_down(priv, GENET_POWER_WOL_MAGIC);
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else if (priv->internal_phy)
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ret = bcmgenet_power_down(priv, GENET_POWER_PASSIVE);
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/* Let the framework handle resumption and leave the clocks on */
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if (ret)
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return ret;
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/* Turn off the clocks */
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clk_disable_unprepare(priv->clk);
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if (ret)
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bcmgenet_resume(d);
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return ret;
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return 0;
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}
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#else
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#define bcmgenet_suspend NULL
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#define bcmgenet_suspend_noirq NULL
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#define bcmgenet_resume NULL
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#define bcmgenet_resume_noirq NULL
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#endif /* CONFIG_PM_SLEEP */
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static SIMPLE_DEV_PM_OPS(bcmgenet_pm_ops, bcmgenet_suspend, bcmgenet_resume);
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static const struct dev_pm_ops bcmgenet_pm_ops = {
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.suspend = bcmgenet_suspend,
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.suspend_noirq = bcmgenet_suspend_noirq,
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.resume = bcmgenet_resume,
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.resume_noirq = bcmgenet_resume_noirq,
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};
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static const struct acpi_device_id genet_acpi_match[] = {
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{ "BCM6E4E", (kernel_ulong_t)&bcm2711_plat_data },
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@ -312,6 +312,8 @@ struct bcmgenet_mib_counters {
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#define UMAC_IRQ_HFB_SM (1 << 10)
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#define UMAC_IRQ_HFB_MM (1 << 11)
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#define UMAC_IRQ_MPD_R (1 << 12)
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#define UMAC_IRQ_WAKE_EVENT (UMAC_IRQ_HFB_SM | UMAC_IRQ_HFB_MM | \
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UMAC_IRQ_MPD_R)
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#define UMAC_IRQ_RXDMA_MBDONE (1 << 13)
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#define UMAC_IRQ_RXDMA_PDONE (1 << 14)
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#define UMAC_IRQ_RXDMA_BDONE (1 << 15)
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@ -193,6 +193,12 @@ int bcmgenet_wol_power_down_cfg(struct bcmgenet_priv *priv,
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bcmgenet_ext_writel(priv, reg, EXT_EXT_PWR_MGMT);
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}
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reg = UMAC_IRQ_MPD_R;
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if (hfb_enable)
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reg |= UMAC_IRQ_HFB_SM | UMAC_IRQ_HFB_MM;
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bcmgenet_intrl2_0_writel(priv, reg, INTRL2_CPU_MASK_CLEAR);
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return 0;
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}
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