sh: intc - add support for SH7706, SH7707, SH7708, SH7709
This patch unifies the cpu specific interrupt setup code for sh7706, sh7707, sh7708 and sh7709 and moves the code into a new file called setup-sh770x.c. It makes sense to share the setup code between these processors because most hardware blocks are identical from a software point of view. With this patch the sh770x processors now have a complete set of vectors that match with the information provided by the data sheets. This is a big improvement for sh7708. Vectors for IRQ4 and IRQ5 are enabled by default. Use plat_irq_setup_pins() if pins IRQ0-3 should be used in IRQ mode. This patch also unifies the platform device setup code which means that the rtc driver now has platform data for all sh770x processors. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This commit is contained in:
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@ -6,10 +6,10 @@ obj-y := ex.o probe.o entry.o
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# CPU subtype setup
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obj-$(CONFIG_CPU_SUBTYPE_SH7705) += setup-sh7705.o
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obj-$(CONFIG_CPU_SUBTYPE_SH7706) += setup-sh7709.o
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obj-$(CONFIG_CPU_SUBTYPE_SH7707) += setup-sh7709.o
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obj-$(CONFIG_CPU_SUBTYPE_SH7708) += setup-sh7708.o
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obj-$(CONFIG_CPU_SUBTYPE_SH7709) += setup-sh7709.o
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obj-$(CONFIG_CPU_SUBTYPE_SH7706) += setup-sh770x.o
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obj-$(CONFIG_CPU_SUBTYPE_SH7707) += setup-sh770x.o
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obj-$(CONFIG_CPU_SUBTYPE_SH7708) += setup-sh770x.o
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obj-$(CONFIG_CPU_SUBTYPE_SH7709) += setup-sh770x.o
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obj-$(CONFIG_CPU_SUBTYPE_SH7710) += setup-sh7710.o
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obj-$(CONFIG_CPU_SUBTYPE_SH7712) += setup-sh7710.o
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@ -1,43 +0,0 @@
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/*
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* SH7708 Setup
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*
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* Copyright (C) 2006 Paul Mundt
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*/
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#include <linux/platform_device.h>
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#include <linux/init.h>
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#include <linux/serial.h>
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#include <asm/sci.h>
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static struct plat_sci_port sci_platform_data[] = {
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{
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.mapbase = 0xfffffe80,
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.flags = UPF_BOOT_AUTOCONF,
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.type = PORT_SCI,
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.irqs = { 23, 24, 25, 0 },
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}, {
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.flags = 0,
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}
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};
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static struct platform_device sci_device = {
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.name = "sh-sci",
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.id = -1,
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.dev = {
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.platform_data = sci_platform_data,
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},
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};
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static struct platform_device *sh7708_devices[] __initdata = {
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&sci_device,
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};
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static int __init sh7708_devices_setup(void)
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{
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return platform_add_devices(sh7708_devices,
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ARRAY_SIZE(sh7708_devices));
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}
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__initcall(sh7708_devices_setup);
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@ -1,145 +0,0 @@
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/*
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* SH7707/SH7709 Setup
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*
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* Copyright (C) 2006 Paul Mundt
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*/
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#include <linux/platform_device.h>
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#include <linux/init.h>
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#include <linux/serial.h>
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#include <asm/sci.h>
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static struct resource rtc_resources[] = {
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[0] = {
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.start = 0xfffffec0,
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.end = 0xfffffec0 + 0x1e,
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.flags = IORESOURCE_IO,
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},
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[1] = {
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.start = 20,
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.flags = IORESOURCE_IRQ,
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},
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[2] = {
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.start = 21,
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.flags = IORESOURCE_IRQ,
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},
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[3] = {
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.start = 22,
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct plat_sci_port sci_platform_data[] = {
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{
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.mapbase = 0xfffffe80,
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.flags = UPF_BOOT_AUTOCONF,
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.type = PORT_SCI,
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.irqs = { 23, 24, 25, 0 },
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}, {
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.mapbase = 0xa4000150,
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.flags = UPF_BOOT_AUTOCONF,
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.type = PORT_SCIF,
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.irqs = { 56, 57, 59, 58 },
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}, {
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.mapbase = 0xa4000140,
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.flags = UPF_BOOT_AUTOCONF,
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.type = PORT_IRDA,
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.irqs = { 52, 53, 55, 54 },
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}, {
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.flags = 0,
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}
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};
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static struct platform_device sci_device = {
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.name = "sh-sci",
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.id = -1,
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.dev = {
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.platform_data = sci_platform_data,
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},
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};
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static struct platform_device rtc_device = {
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.name = "sh-rtc",
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.id = -1,
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.num_resources = ARRAY_SIZE(rtc_resources),
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.resource = rtc_resources,
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};
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static struct platform_device *sh7709_devices[] __initdata = {
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&sci_device,
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&rtc_device,
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};
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static int __init sh7709_devices_setup(void)
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{
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return platform_add_devices(sh7709_devices,
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ARRAY_SIZE(sh7709_devices));
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}
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__initcall(sh7709_devices_setup);
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static struct ipr_data ipr_irq_table[] = {
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{ 16, 0, 12, 2 }, /* TMU TUNI0 */
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{ 17, 0, 8, 4 }, /* TMU TUNI1 */
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{ 18, 0, 4, 1 }, /* TMU TUNI1 */
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{ 19, 0, 4, 1 }, /* TMU TUNI1 */
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{ 20, 0, 0, 2 }, /* RTC CUI */
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{ 21, 0, 0, 2 }, /* RTC CUI */
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{ 22, 0, 0, 2 }, /* RTC CUI */
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{ 23, 1, 4, 3 }, /* SCI */
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{ 24, 1, 4, 3 }, /* SCI */
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{ 25, 1, 4, 3 }, /* SCI */
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{ 26, 1, 4, 3 }, /* SCI */
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{ 27, 1, 12, 3 }, /* WDT ITI */
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{ 32, 2, 0, 1 }, /* IRQ 0 */
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{ 33, 2, 4, 1 }, /* IRQ 1 */
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{ 34, 2, 8, 1 }, /* IRQ 2 APM */
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{ 35, 2, 12, 1 }, /* IRQ 3 TOUCHSCREEN */
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{ 36, 3, 0, 1 }, /* IRQ 4 */
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{ 37, 3, 4, 1 }, /* IRQ 5 */
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{ 48, 4, 12, 7 }, /* DMA */
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{ 49, 4, 12, 7 }, /* DMA */
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{ 50, 4, 12, 7 }, /* DMA */
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{ 51, 4, 12, 7 }, /* DMA */
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{ 52, 4, 8, 3 }, /* IRDA */
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{ 53, 4, 8, 3 }, /* IRDA */
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{ 54, 4, 8, 3 }, /* IRDA */
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{ 55, 4, 8, 3 }, /* IRDA */
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{ 56, 4, 4, 3 }, /* SCIF */
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{ 57, 4, 4, 3 }, /* SCIF */
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{ 58, 4, 4, 3 }, /* SCIF */
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{ 59, 4, 4, 3 }, /* SCIF */
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};
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static unsigned long ipr_offsets[] = {
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0xfffffee2, /* 0: IPRA */
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0xfffffee4, /* 1: IPRB */
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0xa4000016, /* 2: IPRC */
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0xa4000018, /* 3: IPRD */
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0xa400001a, /* 4: IPRE */
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};
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static struct ipr_desc ipr_irq_desc = {
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.ipr_offsets = ipr_offsets,
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.nr_offsets = ARRAY_SIZE(ipr_offsets),
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.ipr_data = ipr_irq_table,
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.nr_irqs = ARRAY_SIZE(ipr_irq_table),
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.chip = {
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.name = "IPR-sh7709",
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},
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};
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void __init plat_irq_setup(void)
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{
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register_ipr_controller(&ipr_irq_desc);
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}
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212
arch/sh/kernel/cpu/sh3/setup-sh770x.c
Normal file
212
arch/sh/kernel/cpu/sh3/setup-sh770x.c
Normal file
@ -0,0 +1,212 @@
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/*
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* SH3 Setup code for SH7706, SH7707, SH7708, SH7709
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*
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* Copyright (C) 2007 Magnus Damm
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*
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* Based on setup-sh7709.c
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*
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* Copyright (C) 2006 Paul Mundt
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*/
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#include <linux/init.h>
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#include <linux/io.h>
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#include <linux/irq.h>
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#include <linux/platform_device.h>
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#include <linux/serial.h>
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#include <asm/sci.h>
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enum {
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UNUSED = 0,
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/* interrupt sources */
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IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5,
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PINT07, PINT815,
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DMAC_DEI0, DMAC_DEI1, DMAC_DEI2, DMAC_DEI3,
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SCIF0_ERI, SCIF0_RXI, SCIF0_BRI, SCIF0_TXI,
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SCIF2_ERI, SCIF2_RXI, SCIF2_BRI, SCIF2_TXI,
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SCI_ERI, SCI_RXI, SCI_TXI, SCI_TEI,
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ADC_ADI,
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TMU0, TMU1, TMU2_TUNI, TMU2_TICPI,
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RTC_ATI, RTC_PRI, RTC_CUI,
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WDT,
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REF_RCMI, REF_ROVI,
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/* interrupt groups */
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RTC, REF, TMU2, DMAC, SCI, SCIF2, SCIF0,
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};
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static struct intc_vect vectors[] = {
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INTC_VECT(TMU0, 0x400), INTC_VECT(TMU1, 0x420),
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INTC_VECT(TMU2_TUNI, 0x440), INTC_VECT(TMU2_TICPI, 0x460),
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INTC_VECT(RTC_ATI, 0x480), INTC_VECT(RTC_PRI, 0x4a0),
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INTC_VECT(RTC_CUI, 0x4c0),
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INTC_VECT(SCI_ERI, 0x4e0), INTC_VECT(SCI_RXI, 0x500),
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INTC_VECT(SCI_TXI, 0x520), INTC_VECT(SCI_TEI, 0x540),
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INTC_VECT(WDT, 0x560),
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INTC_VECT(REF_RCMI, 0x580),
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INTC_VECT(REF_ROVI, 0x5a0),
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#if defined(CONFIG_CPU_SUBTYPE_SH7706) || \
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defined(CONFIG_CPU_SUBTYPE_SH7707) || \
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defined(CONFIG_CPU_SUBTYPE_SH7709)
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INTC_VECT(IRQ4, 0x680), INTC_VECT(IRQ5, 0x6a0),
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INTC_VECT(DMAC_DEI0, 0x800), INTC_VECT(DMAC_DEI1, 0x820),
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INTC_VECT(DMAC_DEI2, 0x840), INTC_VECT(DMAC_DEI3, 0x860),
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INTC_VECT(ADC_ADI, 0x980),
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INTC_VECT(SCIF2_ERI, 0x900), INTC_VECT(SCIF2_RXI, 0x920),
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INTC_VECT(SCIF2_BRI, 0x940), INTC_VECT(SCIF2_TXI, 0x960),
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#endif
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#if defined(CONFIG_CPU_SUBTYPE_SH7707) || \
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defined(CONFIG_CPU_SUBTYPE_SH7709)
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INTC_VECT(PINT07, 0x700), INTC_VECT(PINT815, 0x720),
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INTC_VECT(SCIF0_ERI, 0x880), INTC_VECT(SCIF0_RXI, 0x8a0),
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INTC_VECT(SCIF0_BRI, 0x8c0), INTC_VECT(SCIF0_TXI, 0x8e0),
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#endif
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};
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static struct intc_group groups[] = {
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INTC_GROUP(RTC, RTC_ATI, RTC_PRI, RTC_CUI),
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INTC_GROUP(TMU2, TMU2_TUNI, TMU2_TICPI),
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INTC_GROUP(REF, REF_RCMI, REF_ROVI),
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INTC_GROUP(DMAC, DMAC_DEI0, DMAC_DEI1, DMAC_DEI2, DMAC_DEI3),
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INTC_GROUP(SCI, SCI_ERI, SCI_RXI, SCI_TXI, SCI_TEI),
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INTC_GROUP(SCIF0, SCIF0_ERI, SCIF0_RXI, SCIF0_BRI, SCIF0_TXI),
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INTC_GROUP(SCIF2, SCIF2_ERI, SCIF2_RXI, SCIF2_BRI, SCIF2_TXI),
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};
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static struct intc_prio priorities[] = {
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INTC_PRIO(DMAC, 7),
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INTC_PRIO(SCI, 3),
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INTC_PRIO(SCIF2, 3),
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INTC_PRIO(SCIF0, 3),
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};
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static struct intc_prio_reg prio_registers[] = {
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{ 0xfffffee2, 16, 4, /* IPRA */ { TMU0, TMU1, TMU2, RTC } },
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{ 0xfffffee4, 16, 4, /* IPRB */ { WDT, REF, SCI, 0 } },
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#if defined(CONFIG_CPU_SUBTYPE_SH7706) || \
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defined(CONFIG_CPU_SUBTYPE_SH7707) || \
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defined(CONFIG_CPU_SUBTYPE_SH7709)
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{ 0xa4000016, 16, 4, /* IPRC */ { IRQ3, IRQ2, IRQ1, IRQ0 } },
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{ 0xa4000018, 16, 4, /* IPRD */ { 0, 0, IRQ4, IRQ5 } },
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{ 0xa400001a, 16, 4, /* IPRE */ { DMAC, 0, SCIF2, ADC_ADI } },
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#endif
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#if defined(CONFIG_CPU_SUBTYPE_SH7707) || \
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defined(CONFIG_CPU_SUBTYPE_SH7709)
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{ 0xa4000018, 16, 4, /* IPRD */ { PINT07, PINT815, } },
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{ 0xa400001a, 16, 4, /* IPRE */ { 0, SCIF0 } },
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#endif
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};
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static DECLARE_INTC_DESC(intc_desc, "sh770x", vectors, groups,
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priorities, NULL, prio_registers, NULL);
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#if defined(CONFIG_CPU_SUBTYPE_SH7706) || \
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defined(CONFIG_CPU_SUBTYPE_SH7707) || \
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defined(CONFIG_CPU_SUBTYPE_SH7709)
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static struct intc_vect vectors_irq[] = {
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INTC_VECT(IRQ0, 0x600), INTC_VECT(IRQ1, 0x620),
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INTC_VECT(IRQ2, 0x640), INTC_VECT(IRQ3, 0x660),
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};
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static DECLARE_INTC_DESC(intc_desc_irq, "sh770x-irq", vectors_irq, NULL,
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priorities, NULL, prio_registers, NULL);
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#endif
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static struct resource rtc_resources[] = {
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[0] = {
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.start = 0xfffffec0,
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.end = 0xfffffec0 + 0x1e,
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.flags = IORESOURCE_IO,
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},
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[1] = {
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.start = 20,
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.flags = IORESOURCE_IRQ,
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},
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[2] = {
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.start = 21,
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.flags = IORESOURCE_IRQ,
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},
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[3] = {
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.start = 22,
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct platform_device rtc_device = {
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.name = "sh-rtc",
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.id = -1,
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.num_resources = ARRAY_SIZE(rtc_resources),
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.resource = rtc_resources,
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};
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static struct plat_sci_port sci_platform_data[] = {
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{
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.mapbase = 0xfffffe80,
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.flags = UPF_BOOT_AUTOCONF,
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.type = PORT_SCI,
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.irqs = { 23, 24, 25, 0 },
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},
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#if defined(CONFIG_CPU_SUBTYPE_SH7706) || \
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defined(CONFIG_CPU_SUBTYPE_SH7707) || \
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defined(CONFIG_CPU_SUBTYPE_SH7709)
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{
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.mapbase = 0xa4000150,
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.flags = UPF_BOOT_AUTOCONF,
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.type = PORT_SCIF,
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.irqs = { 56, 57, 59, 58 },
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},
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#endif
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#if defined(CONFIG_CPU_SUBTYPE_SH7707) || \
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defined(CONFIG_CPU_SUBTYPE_SH7709)
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{
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.mapbase = 0xa4000140,
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.flags = UPF_BOOT_AUTOCONF,
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.type = PORT_IRDA,
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.irqs = { 52, 53, 55, 54 },
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},
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#endif
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{
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.flags = 0,
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}
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};
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static struct platform_device sci_device = {
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.name = "sh-sci",
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.id = -1,
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.dev = {
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.platform_data = sci_platform_data,
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},
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};
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static struct platform_device *sh770x_devices[] __initdata = {
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&sci_device,
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&rtc_device,
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};
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static int __init sh770x_devices_setup(void)
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{
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return platform_add_devices(sh770x_devices,
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ARRAY_SIZE(sh770x_devices));
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}
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__initcall(sh770x_devices_setup);
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void __init plat_irq_setup_pins(int mode)
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{
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if (mode == IRQ_MODE_IRQ) {
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#if defined(CONFIG_CPU_SUBTYPE_SH7706) || \
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defined(CONFIG_CPU_SUBTYPE_SH7707) || \
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defined(CONFIG_CPU_SUBTYPE_SH7709)
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register_intc_controller(&intc_desc_irq);
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return;
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#endif
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}
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BUG();
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}
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void __init plat_irq_setup(void)
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{
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register_intc_controller(&intc_desc);
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}
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@ -71,19 +71,21 @@ config CPU_SUBTYPE_SH7705
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config CPU_SUBTYPE_SH7706
|
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bool "Support SH7706 processor"
|
||||
select CPU_SH3
|
||||
select CPU_HAS_IPR_IRQ
|
||||
select CPU_HAS_INTC_IRQ
|
||||
help
|
||||
Select SH7706 if you have a 133 Mhz SH-3 HD6417706 CPU.
|
||||
|
||||
config CPU_SUBTYPE_SH7707
|
||||
bool "Support SH7707 processor"
|
||||
select CPU_SH3
|
||||
select CPU_HAS_INTC_IRQ
|
||||
help
|
||||
Select SH7707 if you have a 60 Mhz SH-3 HD6417707 CPU.
|
||||
|
||||
config CPU_SUBTYPE_SH7708
|
||||
bool "Support SH7708 processor"
|
||||
select CPU_SH3
|
||||
select CPU_HAS_INTC_IRQ
|
||||
help
|
||||
Select SH7708 if you have a 60 Mhz SH-3 HD6417708S or
|
||||
if you have a 100 Mhz SH-3 HD6417708R CPU.
|
||||
@ -91,7 +93,7 @@ config CPU_SUBTYPE_SH7708
|
||||
config CPU_SUBTYPE_SH7709
|
||||
bool "Support SH7709 processor"
|
||||
select CPU_SH3
|
||||
select CPU_HAS_IPR_IRQ
|
||||
select CPU_HAS_INTC_IRQ
|
||||
help
|
||||
Select SH7709 if you have a 80 Mhz SH-3 HD6417709 CPU.
|
||||
|
||||
|
Loading…
Reference in New Issue
Block a user