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MIPS: SB1480: Convert IRQ controller lock to raw spinlock.

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Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
Ralf Baechle 2010-02-27 12:53:32 +01:00
parent 5772f6deb6
commit ed14bbb24e
1 changed files with 7 additions and 7 deletions
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14
arch/mips/sibyte/bcm1480/irq.c
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@ -73,14 +73,14 @@ static struct irq_chip bcm1480_irq_type = {
/* Store the CPU id (not the logical number) */ /* Store the CPU id (not the logical number) */
int bcm1480_irq_owner[BCM1480_NR_IRQS]; int bcm1480_irq_owner[BCM1480_NR_IRQS];
static DEFINE_SPINLOCK(bcm1480_imr_lock); static DEFINE_RAW_SPINLOCK(bcm1480_imr_lock);
void bcm1480_mask_irq(int cpu, int irq) void bcm1480_mask_irq(int cpu, int irq)
{ {
unsigned long flags, hl_spacing; unsigned long flags, hl_spacing;
u64 cur_ints; u64 cur_ints;
spin_lock_irqsave(&bcm1480_imr_lock, flags); raw_spin_lock_irqsave(&bcm1480_imr_lock, flags);
hl_spacing = 0; hl_spacing = 0;
if ((irq >= BCM1480_NR_IRQS_HALF) && (irq <= BCM1480_NR_IRQS)) { if ((irq >= BCM1480_NR_IRQS_HALF) && (irq <= BCM1480_NR_IRQS)) {
hl_spacing = BCM1480_IMR_HL_SPACING; hl_spacing = BCM1480_IMR_HL_SPACING;
@ -89,7 +89,7 @@ void bcm1480_mask_irq(int cpu, int irq)
cur_ints = ____raw_readq(IOADDR(A_BCM1480_IMR_MAPPER(cpu) + R_BCM1480_IMR_INTERRUPT_MASK_H + hl_spacing)); cur_ints = ____raw_readq(IOADDR(A_BCM1480_IMR_MAPPER(cpu) + R_BCM1480_IMR_INTERRUPT_MASK_H + hl_spacing));
cur_ints |= (((u64) 1) << irq); cur_ints |= (((u64) 1) << irq);
____raw_writeq(cur_ints, IOADDR(A_BCM1480_IMR_MAPPER(cpu) + R_BCM1480_IMR_INTERRUPT_MASK_H + hl_spacing)); ____raw_writeq(cur_ints, IOADDR(A_BCM1480_IMR_MAPPER(cpu) + R_BCM1480_IMR_INTERRUPT_MASK_H + hl_spacing));
spin_unlock_irqrestore(&bcm1480_imr_lock, flags); raw_spin_unlock_irqrestore(&bcm1480_imr_lock, flags);
} }
void bcm1480_unmask_irq(int cpu, int irq) void bcm1480_unmask_irq(int cpu, int irq)
@ -97,7 +97,7 @@ void bcm1480_unmask_irq(int cpu, int irq)
unsigned long flags, hl_spacing; unsigned long flags, hl_spacing;
u64 cur_ints; u64 cur_ints;
spin_lock_irqsave(&bcm1480_imr_lock, flags); raw_spin_lock_irqsave(&bcm1480_imr_lock, flags);
hl_spacing = 0; hl_spacing = 0;
if ((irq >= BCM1480_NR_IRQS_HALF) && (irq <= BCM1480_NR_IRQS)) { if ((irq >= BCM1480_NR_IRQS_HALF) && (irq <= BCM1480_NR_IRQS)) {
hl_spacing = BCM1480_IMR_HL_SPACING; hl_spacing = BCM1480_IMR_HL_SPACING;
@ -106,7 +106,7 @@ void bcm1480_unmask_irq(int cpu, int irq)
cur_ints = ____raw_readq(IOADDR(A_BCM1480_IMR_MAPPER(cpu) + R_BCM1480_IMR_INTERRUPT_MASK_H + hl_spacing)); cur_ints = ____raw_readq(IOADDR(A_BCM1480_IMR_MAPPER(cpu) + R_BCM1480_IMR_INTERRUPT_MASK_H + hl_spacing));
cur_ints &= ~(((u64) 1) << irq); cur_ints &= ~(((u64) 1) << irq);
____raw_writeq(cur_ints, IOADDR(A_BCM1480_IMR_MAPPER(cpu) + R_BCM1480_IMR_INTERRUPT_MASK_H + hl_spacing)); ____raw_writeq(cur_ints, IOADDR(A_BCM1480_IMR_MAPPER(cpu) + R_BCM1480_IMR_INTERRUPT_MASK_H + hl_spacing));
spin_unlock_irqrestore(&bcm1480_imr_lock, flags); raw_spin_unlock_irqrestore(&bcm1480_imr_lock, flags);
} }
#ifdef CONFIG_SMP #ifdef CONFIG_SMP
@ -123,7 +123,7 @@ static int bcm1480_set_affinity(unsigned int irq, const struct cpumask *mask)
cpu = cpu_logical_map(i); cpu = cpu_logical_map(i);
/* Protect against other affinity changers and IMR manipulation */ /* Protect against other affinity changers and IMR manipulation */
spin_lock_irqsave(&bcm1480_imr_lock, flags); raw_spin_lock_irqsave(&bcm1480_imr_lock, flags);
/* Swizzle each CPU's IMR (but leave the IP selection alone) */ /* Swizzle each CPU's IMR (but leave the IP selection alone) */
old_cpu = bcm1480_irq_owner[irq]; old_cpu = bcm1480_irq_owner[irq];
@ -148,7 +148,7 @@ static int bcm1480_set_affinity(unsigned int irq, const struct cpumask *mask)
____raw_writeq(cur_ints, IOADDR(A_BCM1480_IMR_MAPPER(cpu) + R_BCM1480_IMR_INTERRUPT_MASK_H + (k*BCM1480_IMR_HL_SPACING))); ____raw_writeq(cur_ints, IOADDR(A_BCM1480_IMR_MAPPER(cpu) + R_BCM1480_IMR_INTERRUPT_MASK_H + (k*BCM1480_IMR_HL_SPACING)));
} }
} }
spin_unlock_irqrestore(&bcm1480_imr_lock, flags); raw_spin_unlock_irqrestore(&bcm1480_imr_lock, flags);
return 0; return 0;
} }