sh: Fix up legacy PTEA space attribute mapping.
When p3_ioremap() was converted to ioremap_prot() there was some breakage introduced where the 29-bit segmentation logic would trap the area range and return an identity mapping without having allowed the area specification to force mapping through page tables. This wires up a PCC mask for pgprot verification to work out whether to short-circuit the identity mapping on legacy parts, restoring the previous behaviour. Reported-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Cc: stable@kernel.org Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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@ -290,7 +290,15 @@ __ioremap_29bit(phys_addr_t offset, unsigned long size, pgprot_t prot)
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* mapping must be done by the PMB or by using page tables.
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*/
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if (likely(PXSEG(offset) < P3SEG && PXSEG(last_addr) < P3SEG)) {
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if (unlikely(pgprot_val(prot) & _PAGE_CACHABLE))
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u64 flags = pgprot_val(prot);
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/*
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* Anything using the legacy PTEA space attributes needs
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* to be kicked down to page table mappings.
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*/
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if (unlikely(flags & _PAGE_PCC_MASK))
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return NULL;
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if (unlikely(flags & _PAGE_CACHABLE))
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return (void __iomem *)P1SEGADDR(offset);
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return (void __iomem *)P2SEGADDR(offset);
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@ -76,6 +76,10 @@
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/* Wrapper for extended mode pgprot twiddling */
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#define _PAGE_EXT(x) ((unsigned long long)(x) << 32)
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#ifdef CONFIG_X2TLB
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#define _PAGE_PCC_MASK 0x00000000 /* No legacy PTEA support */
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#else
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/* software: moves to PTEA.TC (Timing Control) */
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#define _PAGE_PCC_AREA5 0x00000000 /* use BSC registers for area5 */
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#define _PAGE_PCC_AREA6 0x80000000 /* use BSC registers for area6 */
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@ -89,7 +93,8 @@
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#define _PAGE_PCC_ATR8 0x60000000 /* Attribute Memory space, 8 bit bus */
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#define _PAGE_PCC_ATR16 0x60000001 /* Attribute Memory space, 6 bit bus */
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#ifndef CONFIG_X2TLB
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#define _PAGE_PCC_MASK 0xe0000001
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/* copy the ptea attributes */
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static inline unsigned long copy_ptea_attributes(unsigned long x)
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{
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