x86, UV: Clean up uv_tlb.c
SGI UV's uv_tlb.c driver has become rather hard to read, with overly large
functions, non-standard coding style and (way) too long variable, constant
and function names and non-obvious code flow sequences.
This patch improves the readability and maintainability of the driver
significantly, by doing the following strict code cleanups with no side
effects:
- Split long functions into shorter logical functions.
- Shortened some variable and structure member names.
- Added special functions for reads and writes of MMR regs with
very long names.
- Added the 'tunables' table to shortened tunables_write().
- Added the 'stat_description' table to shorten uv_ptc_proc_write().
- Pass fewer 'stat' arguments where it can be derived from the 'bcp'
argument.
- Function definitions consistent on one line, and inline in few (short) cases.
- Moved some small structures and an atomic inline function to the header file.
- Moved some local variables to the blocks where they are used.
- Updated the copyright date.
- Shortened uv_write_global_mmr64() etc. using some aliasing; no
line breaks. Renamed many uv_.. functions that are not exported.
- Aligned structure fields.
[ note that not all structures are aligned the same way though; I'd like
to keep the extensive commenting in some of them. ]
- Shortened some long structure names.
- Standard pass/fail exit from init_per_cpu()
- Vertical alignment for mass initializations.
- More separation between blocks of code.
Tested on a 16-processor Altix UV.
Signed-off-by: Cliff Wickman <cpw@sgi.com>
Cc: penberg@kernel.org
Link: http://lkml.kernel.org/r/E1QOw12-0004MN-Lp@eag09.americas.sgi.com
Signed-off-by: Ingo Molnar <mingo@elte.hu>
This commit is contained in:
Cliff Wickman
Ingo Molnar
parent
2a919596c1
commit
f073cc8f39
@ -5,7 +5,7 @@
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*
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* SGI UV Broadcast Assist Unit definitions
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*
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* Copyright (C) 2008 Silicon Graphics, Inc. All rights reserved.
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* Copyright (C) 2008-2011 Silicon Graphics, Inc. All rights reserved.
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*/
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#ifndef _ASM_X86_UV_UV_BAU_H
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@ -35,9 +35,9 @@
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#define MAX_CPUS_PER_UVHUB 64
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#define MAX_CPUS_PER_SOCKET 32
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#define UV_ADP_SIZE 64 /* hardware-provided max. */
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#define UV_CPUS_PER_ACT_STATUS 32 /* hardware-provided max. */
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#define UV_ITEMS_PER_DESCRIPTOR 8
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#define ADP_SZ 64 /* hardware-provided max. */
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#define UV_CPUS_PER_AS 32 /* hardware-provided max. */
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#define ITEMS_PER_DESC 8
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/* the 'throttle' to prevent the hardware stay-busy bug */
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#define MAX_BAU_CONCURRENT 3
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#define UV_ACT_STATUS_MASK 0x3
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@ -48,7 +48,7 @@
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#define UV2_NET_ENDPOINT_INTD 0x28
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#define UV_NET_ENDPOINT_INTD (is_uv1_hub() ? \
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UV1_NET_ENDPOINT_INTD : UV2_NET_ENDPOINT_INTD)
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#define UV_DESC_BASE_PNODE_SHIFT 49
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#define UV_DESC_PSHIFT 49
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#define UV_PAYLOADQ_PNODE_SHIFT 49
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#define UV_PTC_BASENAME "sgi_uv/ptc_statistics"
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#define UV_BAU_BASENAME "sgi_uv/bau_tunables"
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@ -56,7 +56,8 @@
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#define UV_BAU_TUNABLES_FILE "bau_tunables"
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#define WHITESPACE " \t\n"
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#define uv_physnodeaddr(x) ((__pa((unsigned long)(x)) & uv_mmask))
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#define cpubit_isset(cpu, bau_local_cpumask) \
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test_bit((cpu), (bau_local_cpumask).bits)
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/* [19:16] SOFT_ACK timeout period 19: 1 is urgency 7 17:16 1 is multiplier */
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/*
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@ -84,13 +85,25 @@
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#define BAU_TRANS_SHIFT 40
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#define BAU_TRANS_MASK 0x3f
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/*
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* shorten some awkward names
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*/
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#define AS_PUSH_SHIFT UVH_LB_BAU_SB_ACTIVATION_CONTROL_PUSH_SHFT
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#define SOFTACK_MSHIFT UVH_LB_BAU_MISC_CONTROL_ENABLE_INTD_SOFT_ACK_MODE_SHFT
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#define SOFTACK_PSHIFT UVH_LB_BAU_MISC_CONTROL_INTD_SOFT_ACK_TIMEOUT_PERIOD_SHFT
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#define SOFTACK_TIMEOUT_PERIOD UV_INTD_SOFT_ACK_TIMEOUT_PERIOD
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#define write_gmmr uv_write_global_mmr64
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#define write_lmmr uv_write_local_mmr
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#define read_lmmr uv_read_local_mmr
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#define read_gmmr uv_read_global_mmr64
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/*
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* bits in UVH_LB_BAU_SB_ACTIVATION_STATUS_0/1
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*/
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#define DESC_STATUS_IDLE 0
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#define DESC_STATUS_ACTIVE 1
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#define DESC_STATUS_DESTINATION_TIMEOUT 2
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#define DESC_STATUS_SOURCE_TIMEOUT 3
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#define DS_IDLE 0
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#define DS_ACTIVE 1
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#define DS_DESTINATION_TIMEOUT 2
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#define DS_SOURCE_TIMEOUT 3
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/*
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* bits put together from HRP_LB_BAU_SB_ACTIVATION_STATUS_0/1/2
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* values 1 and 5 will not occur
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@ -149,9 +162,16 @@
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/*
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* tuning the action when the numalink network is extremely delayed
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*/
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#define CONGESTED_RESPONSE_US 1000 /* 'long' response time, in microseconds */
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#define CONGESTED_REPS 10 /* long delays averaged over this many broadcasts */
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#define CONGESTED_PERIOD 30 /* time for the bau to be disabled, in seconds */
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#define CONGESTED_RESPONSE_US 1000 /* 'long' response time, in
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microseconds */
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#define CONGESTED_REPS 10 /* long delays averaged over
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this many broadcasts */
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#define CONGESTED_PERIOD 30 /* time for the bau to be
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disabled, in seconds */
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/* see msg_type: */
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#define MSG_NOOP 0
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#define MSG_REGULAR 1
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#define MSG_RETRY 2
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/*
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* Distribution: 32 bytes (256 bits) (bytes 0-0x1f of descriptor)
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@ -163,7 +183,7 @@
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* 'base_dest_nasid' field of the header corresponds to the
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* destination nodeID associated with that specified bit.
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*/
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struct bau_target_uvhubmask {
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struct bau_targ_hubmask {
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unsigned long bits[BITS_TO_LONGS(UV_DISTRIBUTION_SIZE)];
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};
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@ -194,8 +214,8 @@ struct bau_local_cpumask {
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* The payload is software-defined for INTD transactions
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*/
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struct bau_msg_payload {
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unsigned long address; /* signifies a page or all TLB's
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of the cpu */
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unsigned long address; /* signifies a page or all
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TLB's of the cpu */
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/* 64 bits */
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unsigned short sending_cpu; /* filled in by sender */
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/* 16 bits */
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@ -212,8 +232,8 @@ struct bau_msg_payload {
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struct bau_msg_header {
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unsigned int dest_subnodeid:6; /* must be 0x10, for the LB */
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/* bits 5:0 */
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unsigned int base_dest_nasid:15; /* nasid of the */
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/* bits 20:6 */ /* first bit in uvhub map */
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unsigned int base_dest_nasid:15; /* nasid of the first bit */
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/* bits 20:6 */ /* in uvhub map */
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unsigned int command:8; /* message type */
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/* bits 28:21 */
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/* 0x38: SN3net EndPoint Message */
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@ -225,20 +245,24 @@ struct bau_msg_header {
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/* Suppl_A is 56-41 */
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unsigned int sequence:16; /* message sequence number */
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/* bits 56:41 */ /* becomes bytes 16-17 of msg */
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/* Address field (96:57) is never used as an
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address (these are address bits 42:3) */
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/* Address field (96:57) is
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never used as an address
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(these are address bits
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42:3) */
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unsigned int rsvd_3:1; /* must be zero */
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/* bit 57 */
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/* address bits 27:4 are payload */
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/* these next 24 (58-81) bits become bytes 12-14 of msg */
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/* bits 65:58 land in byte 12 */
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unsigned int replied_to:1;/* sent as 0 by the source to byte 12 */
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unsigned int replied_to:1; /* sent as 0 by the source to
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byte 12 */
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/* bit 58 */
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unsigned int msg_type:3; /* software type of the message*/
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unsigned int msg_type:3; /* software type of the
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message */
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/* bits 61:59 */
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unsigned int canceled:1; /* message canceled, resource to be freed*/
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unsigned int canceled:1; /* message canceled, resource
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is to be freed*/
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/* bit 62 */
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unsigned int payload_1a:1; /* not currently used */
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/* bit 63 */
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@ -259,39 +283,38 @@ struct bau_msg_header {
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unsigned int rsvd_4:7; /* must be zero */
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/* bits 88:82 */
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unsigned int sw_ack_flag:1;/* software acknowledge flag */
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unsigned int swack_flag:1; /* software acknowledge flag */
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/* bit 89 */
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/* INTD trasactions at destination are to
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wait for software acknowledge */
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/* INTD trasactions at
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destination are to wait for
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software acknowledge */
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unsigned int rsvd_5:6; /* must be zero */
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/* bits 95:90 */
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unsigned int rsvd_6:5; /* must be zero */
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/* bits 100:96 */
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unsigned int int_both:1;/* if 1, interrupt both sockets on the uvhub */
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unsigned int int_both:1; /* if 1, interrupt both sockets
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on the uvhub */
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/* bit 101*/
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unsigned int fairness:3; /* usually zero */
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/* bits 104:102 */
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unsigned int multilevel:1; /* multi-level multicast format */
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unsigned int multilevel:1; /* multi-level multicast
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format */
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/* bit 105 */
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/* 0 for TLB: endpoint multi-unicast messages */
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unsigned int chaining:1;/* next descriptor is part of this activation*/
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unsigned int chaining:1; /* next descriptor is part of
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this activation*/
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/* bit 106 */
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unsigned int rsvd_7:21; /* must be zero */
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/* bits 127:107 */
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};
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/* see msg_type: */
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#define MSG_NOOP 0
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#define MSG_REGULAR 1
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#define MSG_RETRY 2
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/*
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* The activation descriptor:
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* The format of the message to send, plus all accompanying control
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* Should be 64 bytes
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*/
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struct bau_desc {
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struct bau_target_uvhubmask distribution;
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struct bau_targ_hubmask distribution;
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/*
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* message template, consisting of header and payload:
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*/
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@ -315,55 +338,47 @@ struct bau_desc {
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* are 32 bytes (2 micropackets) (256 bits) in length, but contain only 17
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* bytes of usable data, including the sw ack vector in byte 15 (bits 127:120)
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* (12 bytes come from bau_msg_payload, 3 from payload_1, 2 from
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* sw_ack_vector and payload_2)
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* swack_vec and payload_2)
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* "Enabling Software Acknowledgment mode (see Section 4.3.3 Software
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* Acknowledge Processing) also selects 32 byte (17 bytes usable) payload
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* operation."
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*/
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struct bau_payload_queue_entry {
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struct bau_pq_entry {
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unsigned long address; /* signifies a page or all TLB's
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of the cpu */
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/* 64 bits, bytes 0-7 */
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unsigned short sending_cpu; /* cpu that sent the message */
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/* 16 bits, bytes 8-9 */
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unsigned short acknowledge_count; /* filled in by destination */
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/* 16 bits, bytes 10-11 */
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/* these next 3 bytes come from bits 58-81 of the message header */
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unsigned short replied_to:1; /* sent as 0 by the source */
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unsigned short msg_type:3; /* software message type */
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unsigned short canceled:1; /* sent as 0 by the source */
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unsigned short unused1:3; /* not currently using */
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/* byte 12 */
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unsigned char unused2a; /* not currently using */
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/* byte 13 */
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unsigned char unused2; /* not currently using */
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/* byte 14 */
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unsigned char sw_ack_vector; /* filled in by the hardware */
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unsigned char swack_vec; /* filled in by the hardware */
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/* byte 15 (bits 127:120) */
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unsigned short sequence; /* message sequence number */
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/* bytes 16-17 */
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unsigned char unused4[2]; /* not currently using bytes 18-19 */
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/* bytes 18-19 */
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int number_of_cpus; /* filled in at destination */
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/* 32 bits, bytes 20-23 (aligned) */
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unsigned char unused5[8]; /* not using */
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/* bytes 24-31 */
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};
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struct msg_desc {
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struct bau_payload_queue_entry *msg;
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struct bau_pq_entry *msg;
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int msg_slot;
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int sw_ack_slot;
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struct bau_payload_queue_entry *va_queue_first;
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struct bau_payload_queue_entry *va_queue_last;
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int swack_slot;
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struct bau_pq_entry *queue_first;
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struct bau_pq_entry *queue_last;
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};
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struct reset_args {
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@ -375,57 +390,101 @@ struct reset_args {
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*/
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struct ptc_stats {
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/* sender statistics */
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unsigned long s_giveup; /* number of fall backs to IPI-style flushes */
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unsigned long s_requestor; /* number of shootdown requests */
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unsigned long s_giveup; /* number of fall backs to
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IPI-style flushes */
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unsigned long s_requestor; /* number of shootdown
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requests */
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unsigned long s_stimeout; /* source side timeouts */
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unsigned long s_dtimeout; /* destination side timeouts */
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unsigned long s_time; /* time spent in sending side */
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unsigned long s_retriesok; /* successful retries */
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unsigned long s_ntargcpu; /* total number of cpu's targeted */
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unsigned long s_ntargself; /* times the sending cpu was targeted */
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unsigned long s_ntarglocals; /* targets of cpus on the local blade */
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unsigned long s_ntargremotes; /* targets of cpus on remote blades */
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unsigned long s_ntargcpu; /* total number of cpu's
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targeted */
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unsigned long s_ntargself; /* times the sending cpu was
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targeted */
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unsigned long s_ntarglocals; /* targets of cpus on the local
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blade */
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unsigned long s_ntargremotes; /* targets of cpus on remote
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blades */
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unsigned long s_ntarglocaluvhub; /* targets of the local hub */
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unsigned long s_ntargremoteuvhub; /* remotes hubs targeted */
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unsigned long s_ntarguvhub; /* total number of uvhubs targeted */
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unsigned long s_ntarguvhub16; /* number of times target hubs >= 16*/
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unsigned long s_ntarguvhub8; /* number of times target hubs >= 8 */
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unsigned long s_ntarguvhub4; /* number of times target hubs >= 4 */
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unsigned long s_ntarguvhub2; /* number of times target hubs >= 2 */
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unsigned long s_ntarguvhub1; /* number of times target hubs == 1 */
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unsigned long s_resets_plug; /* ipi-style resets from plug state */
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unsigned long s_resets_timeout; /* ipi-style resets from timeouts */
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unsigned long s_busy; /* status stayed busy past s/w timer */
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unsigned long s_ntarguvhub; /* total number of uvhubs
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targeted */
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unsigned long s_ntarguvhub16; /* number of times target
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hubs >= 16*/
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unsigned long s_ntarguvhub8; /* number of times target
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hubs >= 8 */
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unsigned long s_ntarguvhub4; /* number of times target
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hubs >= 4 */
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unsigned long s_ntarguvhub2; /* number of times target
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hubs >= 2 */
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unsigned long s_ntarguvhub1; /* number of times target
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hubs == 1 */
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unsigned long s_resets_plug; /* ipi-style resets from plug
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state */
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unsigned long s_resets_timeout; /* ipi-style resets from
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timeouts */
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unsigned long s_busy; /* status stayed busy past
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s/w timer */
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unsigned long s_throttles; /* waits in throttle */
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unsigned long s_retry_messages; /* retry broadcasts */
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unsigned long s_bau_reenabled; /* for bau enable/disable */
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unsigned long s_bau_disabled; /* for bau enable/disable */
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/* destination statistics */
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unsigned long d_alltlb; /* times all tlb's on this cpu were flushed */
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unsigned long d_onetlb; /* times just one tlb on this cpu was flushed */
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unsigned long d_multmsg; /* interrupts with multiple messages */
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unsigned long d_alltlb; /* times all tlb's on this
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cpu were flushed */
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unsigned long d_onetlb; /* times just one tlb on this
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cpu was flushed */
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unsigned long d_multmsg; /* interrupts with multiple
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messages */
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unsigned long d_nomsg; /* interrupts with no message */
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unsigned long d_time; /* time spent on destination side */
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unsigned long d_requestee; /* number of messages processed */
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unsigned long d_retries; /* number of retry messages processed */
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unsigned long d_canceled; /* number of messages canceled by retries */
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unsigned long d_nocanceled; /* retries that found nothing to cancel */
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unsigned long d_resets; /* number of ipi-style requests processed */
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unsigned long d_rcanceled; /* number of messages canceled by resets */
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unsigned long d_time; /* time spent on destination
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side */
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unsigned long d_requestee; /* number of messages
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processed */
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unsigned long d_retries; /* number of retry messages
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processed */
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unsigned long d_canceled; /* number of messages canceled
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by retries */
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unsigned long d_nocanceled; /* retries that found nothing
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to cancel */
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unsigned long d_resets; /* number of ipi-style requests
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processed */
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unsigned long d_rcanceled; /* number of messages canceled
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by resets */
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};
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struct tunables {
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int *tunp;
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int deflt;
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};
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struct hub_and_pnode {
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short uvhub;
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short pnode;
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};
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struct socket_desc {
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short num_cpus;
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short cpu_number[MAX_CPUS_PER_SOCKET];
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};
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struct uvhub_desc {
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unsigned short socket_mask;
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short num_cpus;
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short uvhub;
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short pnode;
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struct socket_desc socket[2];
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};
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/*
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* one per-cpu; to locate the software tables
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*/
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struct bau_control {
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struct bau_desc *descriptor_base;
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struct bau_payload_queue_entry *va_queue_first;
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struct bau_payload_queue_entry *va_queue_last;
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struct bau_payload_queue_entry *bau_msg_head;
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struct bau_pq_entry *queue_first;
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struct bau_pq_entry *queue_last;
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struct bau_pq_entry *bau_msg_head;
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struct bau_control *uvhub_master;
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struct bau_control *socket_master;
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struct ptc_stats *statp;
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@ -452,35 +511,105 @@ struct bau_control {
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spinlock_t uvhub_lock;
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spinlock_t queue_lock;
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/* tunables */
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int max_bau_concurrent;
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int max_bau_concurrent_constant;
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int max_concurr;
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int max_concurr_const;
|
||||
int plugged_delay;
|
||||
int plugsb4reset;
|
||||
int timeoutsb4reset;
|
||||
int ipi_reset_limit;
|
||||
int complete_threshold;
|
||||
int congested_response_us;
|
||||
int congested_reps;
|
||||
int congested_period;
|
||||
int cong_response_us;
|
||||
int cong_reps;
|
||||
int cong_period;
|
||||
cycles_t period_time;
|
||||
long period_requests;
|
||||
struct hub_and_pnode *target_hub_and_pnode;
|
||||
struct hub_and_pnode *thp;
|
||||
};
|
||||
|
||||
static inline int bau_uvhub_isset(int uvhub, struct bau_target_uvhubmask *dstp)
|
||||
static unsigned long read_mmr_uv2_status(void)
|
||||
{
|
||||
return read_lmmr(UV2H_LB_BAU_SB_ACTIVATION_STATUS_2);
|
||||
}
|
||||
|
||||
static void write_mmr_data_broadcast(int pnode, unsigned long mmr_image)
|
||||
{
|
||||
write_gmmr(pnode, UVH_BAU_DATA_BROADCAST, mmr_image);
|
||||
}
|
||||
|
||||
static void write_mmr_descriptor_base(int pnode, unsigned long mmr_image)
|
||||
{
|
||||
write_gmmr(pnode, UVH_LB_BAU_SB_DESCRIPTOR_BASE, mmr_image);
|
||||
}
|
||||
|
||||
static void write_mmr_activation(unsigned long index)
|
||||
{
|
||||
write_lmmr(UVH_LB_BAU_SB_ACTIVATION_CONTROL, index);
|
||||
}
|
||||
|
||||
static void write_gmmr_activation(int pnode, unsigned long mmr_image)
|
||||
{
|
||||
write_gmmr(pnode, UVH_LB_BAU_SB_ACTIVATION_CONTROL, mmr_image);
|
||||
}
|
||||
|
||||
static void write_mmr_payload_first(int pnode, unsigned long mmr_image)
|
||||
{
|
||||
write_gmmr(pnode, UVH_LB_BAU_INTD_PAYLOAD_QUEUE_FIRST, mmr_image);
|
||||
}
|
||||
|
||||
static void write_mmr_payload_tail(int pnode, unsigned long mmr_image)
|
||||
{
|
||||
write_gmmr(pnode, UVH_LB_BAU_INTD_PAYLOAD_QUEUE_TAIL, mmr_image);
|
||||
}
|
||||
|
||||
static void write_mmr_payload_last(int pnode, unsigned long mmr_image)
|
||||
{
|
||||
write_gmmr(pnode, UVH_LB_BAU_INTD_PAYLOAD_QUEUE_LAST, mmr_image);
|
||||
}
|
||||
|
||||
static void write_mmr_misc_control(int pnode, unsigned long mmr_image)
|
||||
{
|
||||
write_gmmr(pnode, UVH_LB_BAU_MISC_CONTROL, mmr_image);
|
||||
}
|
||||
|
||||
static unsigned long read_mmr_misc_control(int pnode)
|
||||
{
|
||||
return read_gmmr(pnode, UVH_LB_BAU_MISC_CONTROL);
|
||||
}
|
||||
|
||||
static void write_mmr_sw_ack(unsigned long mr)
|
||||
{
|
||||
uv_write_local_mmr(UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE_ALIAS, mr);
|
||||
}
|
||||
|
||||
static unsigned long read_mmr_sw_ack(void)
|
||||
{
|
||||
return read_lmmr(UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE);
|
||||
}
|
||||
|
||||
static unsigned long read_gmmr_sw_ack(int pnode)
|
||||
{
|
||||
return read_gmmr(pnode, UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE);
|
||||
}
|
||||
|
||||
static void write_mmr_data_config(int pnode, unsigned long mr)
|
||||
{
|
||||
uv_write_global_mmr64(pnode, UVH_BAU_DATA_CONFIG, mr);
|
||||
}
|
||||
|
||||
static inline int bau_uvhub_isset(int uvhub, struct bau_targ_hubmask *dstp)
|
||||
{
|
||||
return constant_test_bit(uvhub, &dstp->bits[0]);
|
||||
}
|
||||
static inline void bau_uvhub_set(int pnode, struct bau_target_uvhubmask *dstp)
|
||||
static inline void bau_uvhub_set(int pnode, struct bau_targ_hubmask *dstp)
|
||||
{
|
||||
__set_bit(pnode, &dstp->bits[0]);
|
||||
}
|
||||
static inline void bau_uvhubs_clear(struct bau_target_uvhubmask *dstp,
|
||||
static inline void bau_uvhubs_clear(struct bau_targ_hubmask *dstp,
|
||||
int nbits)
|
||||
{
|
||||
bitmap_zero(&dstp->bits[0], nbits);
|
||||
}
|
||||
static inline int bau_uvhub_weight(struct bau_target_uvhubmask *dstp)
|
||||
static inline int bau_uvhub_weight(struct bau_targ_hubmask *dstp)
|
||||
{
|
||||
return bitmap_weight((unsigned long *)&dstp->bits[0],
|
||||
UV_DISTRIBUTION_SIZE);
|
||||
@ -491,9 +620,6 @@ static inline void bau_cpubits_clear(struct bau_local_cpumask *dstp, int nbits)
|
||||
bitmap_zero(&dstp->bits, nbits);
|
||||
}
|
||||
|
||||
#define cpubit_isset(cpu, bau_local_cpumask) \
|
||||
test_bit((cpu), (bau_local_cpumask).bits)
|
||||
|
||||
extern void uv_bau_message_intr1(void);
|
||||
extern void uv_bau_timeout_intr1(void);
|
||||
|
||||
@ -501,7 +627,7 @@ struct atomic_short {
|
||||
short counter;
|
||||
};
|
||||
|
||||
/**
|
||||
/*
|
||||
* atomic_read_short - read a short atomic variable
|
||||
* @v: pointer of type atomic_short
|
||||
*
|
||||
@ -512,14 +638,14 @@ static inline int atomic_read_short(const struct atomic_short *v)
|
||||
return v->counter;
|
||||
}
|
||||
|
||||
/**
|
||||
* atomic_add_short_return - add and return a short int
|
||||
/*
|
||||
* atom_asr - add and return a short int
|
||||
* @i: short value to add
|
||||
* @v: pointer of type atomic_short
|
||||
*
|
||||
* Atomically adds @i to @v and returns @i + @v
|
||||
*/
|
||||
static inline int atomic_add_short_return(short i, struct atomic_short *v)
|
||||
static inline int atom_asr(short i, struct atomic_short *v)
|
||||
{
|
||||
short __i = i;
|
||||
asm volatile(LOCK_PREFIX "xaddw %0, %1"
|
||||
@ -528,4 +654,26 @@ static inline int atomic_add_short_return(short i, struct atomic_short *v)
|
||||
return i + __i;
|
||||
}
|
||||
|
||||
/*
|
||||
* conditionally add 1 to *v, unless *v is >= u
|
||||
* return 0 if we cannot add 1 to *v because it is >= u
|
||||
* return 1 if we can add 1 to *v because it is < u
|
||||
* the add is atomic
|
||||
*
|
||||
* This is close to atomic_add_unless(), but this allows the 'u' value
|
||||
* to be lowered below the current 'v'. atomic_add_unless can only stop
|
||||
* on equal.
|
||||
*/
|
||||
static inline int atomic_inc_unless_ge(spinlock_t *lock, atomic_t *v, int u)
|
||||
{
|
||||
spin_lock(lock);
|
||||
if (atomic_read(v) >= u) {
|
||||
spin_unlock(lock);
|
||||
return 0;
|
||||
}
|
||||
atomic_inc(v);
|
||||
spin_unlock(lock);
|
||||
return 1;
|
||||
}
|
||||
|
||||
#endif /* _ASM_X86_UV_UV_BAU_H */
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
Loading…
Reference in New Issue
Block a user