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[ARM] 3867/1: AT91 GPIO update

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This patch makes the AT91 gpio.c support processor-generic (AT91RM9200
and AT91SAM9xxx).  The GPIO controllers supported by a particular AT91
processor are defined in the processor-specific file and are registered
with gpio.c at startup.

Signed-off-by: Andrew Victor <andrew@sanpeople.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This commit is contained in:
Andrew Victor 2006-09-27 13:23:00 +01:00 committed by Russell King
parent 2eeaaa21de
commit f21738341c
14 changed files with 165 additions and 135 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

39
arch/arm/mach-at91rm9200/at91rm9200.c
View File

@ -243,11 +243,34 @@ static void __init at91rm9200_register_clocks(void)
clk_register(&pck3);
}
/* --------------------------------------------------------------------
* GPIO
* -------------------------------------------------------------------- */
static struct at91_gpio_bank at91rm9200_gpio[] = {
{
.id = AT91RM9200_ID_PIOA,
.offset = AT91_PIOA,
.clock = &pioA_clk,
}, {
.id = AT91RM9200_ID_PIOB,
.offset = AT91_PIOB,
.clock = &pioB_clk,
}, {
.id = AT91RM9200_ID_PIOC,
.offset = AT91_PIOC,
.clock = &pioC_clk,
}, {
.id = AT91RM9200_ID_PIOD,
.offset = AT91_PIOD,
.clock = &pioD_clk,
}
};
/* --------------------------------------------------------------------
* AT91RM9200 processor initialization
* -------------------------------------------------------------------- */
void __init at91rm9200_initialize(unsigned long main_clock)
void __init at91rm9200_initialize(unsigned long main_clock, unsigned short banks)
{
/* Map peripherals */
iotable_init(at91rm9200_io_desc, ARRAY_SIZE(at91rm9200_io_desc));
@ -257,8 +280,16 @@ void __init at91rm9200_initialize(unsigned long main_clock)
/* Register the processor-specific clocks */
at91rm9200_register_clocks();
/* Initialize GPIO subsystem */
at91_gpio_init(at91rm9200_gpio, banks);
}
/* --------------------------------------------------------------------
* Interrupt initialization
* -------------------------------------------------------------------- */
/*
* The default interrupt priority levels (0 = lowest, 7 = highest).
*/
@ -297,10 +328,14 @@ static unsigned int at91rm9200_default_irq_priority[NR_AIC_IRQS] __initdata = {
0 /* Advanced Interrupt Controller (IRQ6) */
};
void __init at91rm9200_init_irq(unsigned int priority[NR_AIC_IRQS])
void __init at91rm9200_init_interrupts(unsigned int priority[NR_AIC_IRQS])
{
if (!priority)
priority = at91rm9200_default_irq_priority;
/* Initialize the AIC interrupt controller */
at91_aic_init(priority);
/* Enable GPIO interrupts */
at91_gpio_irq_setup();
}

15
arch/arm/mach-at91rm9200/board-1arm.c
View File

@ -39,14 +39,6 @@
#include "generic.h"
static void __init onearm_init_irq(void)
{
/* Initialize AIC controller */
at91rm9200_init_irq(NULL);
/* Set up the GPIO interrupts */
at91_gpio_irq_setup(PQFP_GPIO_BANKS);
}
/*
* Serial port configuration.
@ -62,12 +54,17 @@ static struct at91_uart_config __initdata onearm_uart_config = {
static void __init onearm_map_io(void)
{
/* Initialize processor: 18.432 MHz crystal */
at91rm9200_initialize(18432000);
at91rm9200_initialize(18432000, AT91RM9200_PQFP);
/* Setup the serial ports and console */
at91_init_serial(&onearm_uart_config);
}
static void __init onearm_init_irq(void)
{
at91rm9200_init_interrupts(NULL);
}
static struct at91_eth_data __initdata onearm_eth_data = {
.phy_irq_pin = AT91_PIN_PC4,
.is_rmii = 1,

16
arch/arm/mach-at91rm9200/board-carmeva.c
View File

@ -40,14 +40,6 @@
#include "generic.h"
static void __init carmeva_init_irq(void)
{
/* Initialize AIC controller */
at91rm9200_init_irq(NULL);
/* Set up the GPIO interrupts */
at91_gpio_irq_setup(BGA_GPIO_BANKS);
}
/*
* Serial port configuration.
@ -63,12 +55,18 @@ static struct at91_uart_config __initdata carmeva_uart_config = {
static void __init carmeva_map_io(void)
{
/* Initialize processor: 20.000 MHz crystal */
at91rm9200_initialize(20000000);
at91rm9200_initialize(20000000, AT91RM9200_BGA);
/* Setup the serial ports and console */
at91_init_serial(&carmeva_uart_config);
}
static void __init carmeva_init_irq(void)
{
at91rm9200_init_interrupts(NULL);
}
static struct at91_eth_data __initdata carmeva_eth_data = {
.phy_irq_pin = AT91_PIN_PC4,
.is_rmii = 1,

15
arch/arm/mach-at91rm9200/board-csb337.c
View File

@ -39,14 +39,6 @@
#include "generic.h"
static void __init csb337_init_irq(void)
{
/* Initialize AIC controller */
at91rm9200_init_irq(NULL);
/* Set up the GPIO interrupts */
at91_gpio_irq_setup(BGA_GPIO_BANKS);
}
/*
* Serial port configuration.
@ -62,7 +54,7 @@ static struct at91_uart_config __initdata csb337_uart_config = {
static void __init csb337_map_io(void)
{
/* Initialize processor: 3.6864 MHz crystal */
at91rm9200_initialize(3686400);
at91rm9200_initialize(3686400, AT91RM9200_BGA);
/* Setup the LEDs */
at91_init_leds(AT91_PIN_PB0, AT91_PIN_PB1);
@ -71,6 +63,11 @@ static void __init csb337_map_io(void)
at91_init_serial(&csb337_uart_config);
}
static void __init csb337_init_irq(void)
{
at91rm9200_init_interrupts(NULL);
}
static struct at91_eth_data __initdata csb337_eth_data = {
.phy_irq_pin = AT91_PIN_PC2,
.is_rmii = 0,

15
arch/arm/mach-at91rm9200/board-csb637.c
View File

@ -38,14 +38,6 @@
#include "generic.h"
static void __init csb637_init_irq(void)
{
/* Initialize AIC controller */
at91rm9200_init_irq(NULL);
/* Set up the GPIO interrupts */
at91_gpio_irq_setup(BGA_GPIO_BANKS);
}
/*
* Serial port configuration.
@ -61,7 +53,7 @@ static struct at91_uart_config __initdata csb637_uart_config = {
static void __init csb637_map_io(void)
{
/* Initialize processor: 3.6864 MHz crystal */
at91rm9200_initialize(3686400);
at91rm9200_initialize(3686400, AT91RM9200_BGA);
/* Setup the LEDs */
at91_init_leds(AT91_PIN_PB2, AT91_PIN_PB2);
@ -70,6 +62,11 @@ static void __init csb637_map_io(void)
at91_init_serial(&csb637_uart_config);
}
static void __init csb637_init_irq(void)
{
at91rm9200_init_interrupts(NULL);
}
static struct at91_eth_data __initdata csb637_eth_data = {
.phy_irq_pin = AT91_PIN_PC0,
.is_rmii = 0,

15
arch/arm/mach-at91rm9200/board-dk.c
View File

@ -42,14 +42,6 @@
#include "generic.h"
static void __init dk_init_irq(void)
{
/* Initialize AIC controller */
at91rm9200_init_irq(NULL);
/* Set up the GPIO interrupts */
at91_gpio_irq_setup(BGA_GPIO_BANKS);
}
/*
* Serial port configuration.
@ -65,7 +57,7 @@ static struct at91_uart_config __initdata dk_uart_config = {
static void __init dk_map_io(void)
{
/* Initialize processor: 18.432 MHz crystal */
at91rm9200_initialize(18432000);
at91rm9200_initialize(18432000, AT91RM9200_BGA);
/* Setup the LEDs */
at91_init_leds(AT91_PIN_PB2, AT91_PIN_PB2);
@ -74,6 +66,11 @@ static void __init dk_map_io(void)
at91_init_serial(&dk_uart_config);
}
static void __init dk_init_irq(void)
{
at91rm9200_init_interrupts(NULL);
}
static struct at91_eth_data __initdata dk_eth_data = {
.phy_irq_pin = AT91_PIN_PC4,
.is_rmii = 1,

15
arch/arm/mach-at91rm9200/board-eb9200.c
View File

@ -40,14 +40,6 @@
#include "generic.h"
static void __init eb9200_init_irq(void)
{
/* Initialize AIC controller */
at91rm9200_init_irq(NULL);
/* Set up the GPIO interrupts */
at91_gpio_irq_setup(BGA_GPIO_BANKS);
}
/*
* Serial port configuration.
@ -63,12 +55,17 @@ static struct at91_uart_config __initdata eb9200_uart_config = {
static void __init eb9200_map_io(void)
{
/* Initialize processor: 18.432 MHz crystal */
at91rm9200_initialize(18432000);
at91rm9200_initialize(18432000, AT91RM9200_BGA);
/* Setup the serial ports and console */
at91_init_serial(&eb9200_uart_config);
}
static void __init eb9200_init_irq(void)
{
at91rm9200_init_interrupts(NULL);
}
static struct at91_eth_data __initdata eb9200_eth_data = {
.phy_irq_pin = AT91_PIN_PC4,
.is_rmii = 1,

15
arch/arm/mach-at91rm9200/board-ek.c
View File

@ -42,14 +42,6 @@
#include "generic.h"
static void __init ek_init_irq(void)
{
/* Initialize AIC controller */
at91rm9200_init_irq(NULL);
/* Set up the GPIO interrupts */
at91_gpio_irq_setup(BGA_GPIO_BANKS);
}
/*
* Serial port configuration.
@ -65,7 +57,7 @@ static struct at91_uart_config __initdata ek_uart_config = {
static void __init ek_map_io(void)
{
/* Initialize processor: 18.432 MHz crystal */
at91rm9200_initialize(18432000);
at91rm9200_initialize(18432000, AT91RM9200_BGA);
/* Setup the LEDs */
at91_init_leds(AT91_PIN_PB1, AT91_PIN_PB2);
@ -74,6 +66,11 @@ static void __init ek_map_io(void)
at91_init_serial(&ek_uart_config);
}
static void __init ek_init_irq(void)
{
at91rm9200_init_interrupts(NULL);
}
static struct at91_eth_data __initdata ek_eth_data = {
.phy_irq_pin = AT91_PIN_PC4,
.is_rmii = 1,

15
arch/arm/mach-at91rm9200/board-kafa.c
View File

@ -39,14 +39,6 @@
#include "generic.h"
static void __init kafa_init_irq(void)
{
/* Initialize AIC controller */
at91rm9200_init_irq(NULL);
/* Set up the GPIO interrupts */
at91_gpio_irq_setup(PQFP_GPIO_BANKS);
}
/*
* Serial port configuration.
@ -62,7 +54,7 @@ static struct at91_uart_config __initdata kafa_uart_config = {
static void __init kafa_map_io(void)
{
/* Initialize processor: 18.432 MHz crystal */
at91rm9200_initialize(18432000);
at91rm9200_initialize(18432000, AT91RM9200_PQFP);
/* Set up the LEDs */
at91_init_leds(AT91_PIN_PB4, AT91_PIN_PB4);
@ -71,6 +63,11 @@ static void __init kafa_map_io(void)
at91_init_serial(&kafa_uart_config);
}
static void __init kafa_init_irq(void)
{
at91rm9200_init_interrupts(NULL);
}
static struct at91_eth_data __initdata kafa_eth_data = {
.phy_irq_pin = AT91_PIN_PC4,
.is_rmii = 0,

15
arch/arm/mach-at91rm9200/board-kb9202.c
View File

@ -40,14 +40,6 @@
#include "generic.h"
static void __init kb9202_init_irq(void)
{
/* Initialize AIC controller */
at91rm9200_init_irq(NULL);
/* Set up the GPIO interrupts */
at91_gpio_irq_setup(PQFP_GPIO_BANKS);
}
/*
* Serial port configuration.
@ -63,7 +55,7 @@ static struct at91_uart_config __initdata kb9202_uart_config = {
static void __init kb9202_map_io(void)
{
/* Initialize processor: 10 MHz crystal */
at91rm9200_initialize(10000000);
at91rm9200_initialize(10000000, AT91RM9200_PQFP);
/* Set up the LEDs */
at91_init_leds(AT91_PIN_PC19, AT91_PIN_PC18);
@ -72,6 +64,11 @@ static void __init kb9202_map_io(void)
at91_init_serial(&kb9202_uart_config);
}
static void __init kb9202_init_irq(void)
{
at91rm9200_init_interrupts(NULL);
}
static struct at91_eth_data __initdata kb9202_eth_data = {
.phy_irq_pin = AT91_PIN_PB29,
.is_rmii = 0,

16
arch/arm/mach-at91rm9200/generic.h
View File

@ -9,12 +9,11 @@
*/
/* Processors */
extern void __init at91rm9200_initialize(unsigned long main_clock);
extern void __init at91rm9200_initialize(unsigned long main_clock, unsigned short banks);
/* Interrupts */
extern void __init at91rm9200_init_irq(unsigned int priority[]);
extern void __init at91rm9200_init_interrupts(unsigned int priority[]);
extern void __init at91_aic_init(unsigned int priority[]);
extern void __init at91_gpio_irq_setup(unsigned banks);
/* Timer */
struct sys_timer;
@ -29,3 +28,14 @@ extern void __init at91_clock_associate(const char *id, struct device *dev, cons
extern void at91_irq_suspend(void);
extern void at91_irq_resume(void);
/* GPIO */
#define AT91RM9200_PQFP 3 /* AT91RM9200 PQFP package has 3 banks */
#define AT91RM9200_BGA 4 /* AT91RM9200 BGA package has 4 banks */
struct at91_gpio_bank {
unsigned short id; /* peripheral ID */
unsigned long offset; /* offset from system peripheral base */
struct clk *clock; /* associated clock */
};
extern void __init at91_gpio_init(struct at91_gpio_bank *, int nr_banks);
extern void __init at91_gpio_irq_setup(void);

91
arch/arm/mach-at91rm9200/gpio.c
View File

@ -9,6 +9,7 @@
* (at your option) any later version.
*/
#include <linux/clk.h>
#include <linux/errno.h>
#include <linux/interrupt.h>
#include <linux/irq.h>
@ -20,12 +21,12 @@
#include <asm/hardware.h>
#include <asm/arch/gpio.h>
static const u32 pio_controller_offset[4] = {
AT91_PIOA,
AT91_PIOB,
AT91_PIOC,
AT91_PIOD,
};
#include "generic.h"
static struct at91_gpio_bank *gpio;
static int gpio_banks;
static inline void __iomem *pin_to_controller(unsigned pin)
{
@ -33,8 +34,8 @@ static inline void __iomem *pin_to_controller(unsigned pin)
pin -= PIN_BASE;
pin /= 32;
if (likely(pin < BGA_GPIO_BANKS))
return sys_base + pio_controller_offset[pin];
if (likely(pin < gpio_banks))
return sys_base + gpio[pin].offset;
return NULL;
}
@ -179,7 +180,6 @@ EXPORT_SYMBOL(at91_set_multi_drive);
/*--------------------------------------------------------------------------*/
/*
* assuming the pin is muxed as a gpio output, set its value.
*/
@ -216,8 +216,8 @@ EXPORT_SYMBOL(at91_get_gpio_value);
#ifdef CONFIG_PM
static u32 wakeups[BGA_GPIO_BANKS];
static u32 backups[BGA_GPIO_BANKS];
static u32 wakeups[MAX_GPIO_BANKS];
static u32 backups[MAX_GPIO_BANKS];
static int gpio_irq_set_wake(unsigned pin, unsigned state)
{
@ -226,7 +226,7 @@ static int gpio_irq_set_wake(unsigned pin, unsigned state)
pin -= PIN_BASE;
pin /= 32;
if (unlikely(pin >= BGA_GPIO_BANKS))
if (unlikely(pin >= MAX_GPIO_BANKS))
return -EINVAL;
if (state)
@ -241,8 +241,8 @@ void at91_gpio_suspend(void)
{
int i;
for (i = 0; i < BGA_GPIO_BANKS; i++) {
u32 pio = pio_controller_offset[i];
for (i = 0; i < gpio_banks; i++) {
u32 pio = gpio[i].offset;
/*
* Note: drivers should have disabled GPIO interrupts that
@ -257,14 +257,14 @@ void at91_gpio_suspend(void)
* first place!
*/
backups[i] = at91_sys_read(pio + PIO_IMR);
at91_sys_write(pio_controller_offset[i] + PIO_IDR, backups[i]);
at91_sys_write(pio_controller_offset[i] + PIO_IER, wakeups[i]);
at91_sys_write(pio + PIO_IDR, backups[i]);
at91_sys_write(pio + PIO_IER, wakeups[i]);
if (!wakeups[i]) {
disable_irq_wake(AT91RM9200_ID_PIOA + i);
at91_sys_write(AT91_PMC_PCDR, 1 << (AT91RM9200_ID_PIOA + i));
disable_irq_wake(gpio[i].id);
at91_sys_write(AT91_PMC_PCDR, 1 << gpio[i].id);
} else {
enable_irq_wake(AT91RM9200_ID_PIOA + i);
enable_irq_wake(gpio[i].id);
#ifdef CONFIG_PM_DEBUG
printk(KERN_DEBUG "GPIO-%c may wake for %08x\n", "ABCD"[i], wakeups[i]);
#endif
@ -276,16 +276,13 @@ void at91_gpio_resume(void)
{
int i;
for (i = 0; i < BGA_GPIO_BANKS; i++) {
at91_sys_write(pio_controller_offset[i] + PIO_IDR, wakeups[i]);
at91_sys_write(pio_controller_offset[i] + PIO_IER, backups[i]);
}
for (i = 0; i < gpio_banks; i++) {
u32 pio = gpio[i].offset;
at91_sys_write(AT91_PMC_PCER,
(1 << AT91RM9200_ID_PIOA)
| (1 << AT91RM9200_ID_PIOB)
| (1 << AT91RM9200_ID_PIOC)
| (1 << AT91RM9200_ID_PIOD));
at91_sys_write(pio + PIO_IDR, wakeups[i]);
at91_sys_write(pio + PIO_IER, backups[i]);
at91_sys_write(AT91_PMC_PCER, 1 << gpio[i].id);
}
}
#else
@ -377,20 +374,25 @@ static void gpio_irq_handler(unsigned irq, struct irqdesc *desc, struct pt_regs
/* now it may re-trigger */
}
/* call this from board-specific init_irq */
void __init at91_gpio_irq_setup(unsigned banks)
{
unsigned pioc, pin, id;
/*--------------------------------------------------------------------------*/
if (banks > 4)
banks = 4;
for (pioc = 0, pin = PIN_BASE, id = AT91RM9200_ID_PIOA;
pioc < banks;
pioc++, id++) {
/*
* Called from the processor-specific init to enable GPIO interrupt support.
*/
void __init at91_gpio_irq_setup(void)
{
unsigned pioc, pin;
for (pioc = 0, pin = PIN_BASE;
pioc < gpio_banks;
pioc++) {
void __iomem *controller;
unsigned id = gpio[pioc].id;
unsigned i;
controller = (void __iomem *) AT91_VA_BASE_SYS + pio_controller_offset[pioc];
clk_enable(gpio[pioc].clock); /* enable PIO controller's clock */
controller = (void __iomem *) AT91_VA_BASE_SYS + gpio[pioc].offset;
__raw_writel(~0, controller + PIO_IDR);
set_irq_data(id, (void *) pin);
@ -408,5 +410,16 @@ void __init at91_gpio_irq_setup(unsigned banks)
set_irq_chained_handler(id, gpio_irq_handler);
}
pr_info("AT91: %d gpio irqs in %d banks\n", pin - PIN_BASE, banks);
pr_info("AT91: %d gpio irqs in %d banks\n", pin - PIN_BASE, gpio_banks);
}
/*
* Called from the processor-specific init to enable GPIO pin support.
*/
void __init at91_gpio_init(struct at91_gpio_bank *data, int nr_banks)
{
BUG_ON(nr_banks > MAX_GPIO_BANKS);
gpio = data;
gpio_banks = nr_banks;
}

2
arch/arm/mach-at91rm9200/irq.c
View File

@ -34,8 +34,6 @@
#include <asm/mach/irq.h>
#include <asm/mach/map.h>
#include "generic.h"
static void at91_aic_mask_irq(unsigned int irq)
{

16
include/asm-arm/arch-at91rm9200/gpio.h
View File

@ -17,8 +17,7 @@
#define PIN_BASE NR_AIC_IRQS
#define PQFP_GPIO_BANKS 3 /* PQFP package has 3 banks */
#define BGA_GPIO_BANKS 4 /* BGA package has 4 banks */
#define MAX_GPIO_BANKS 4
/* these pin numbers double as IRQ numbers, like AT91xxx_ID_* values */
@ -180,17 +179,18 @@
#ifndef __ASSEMBLY__
/* setup setup routines, called from board init or driver probe() */
extern int at91_set_A_periph(unsigned pin, int use_pullup);
extern int at91_set_B_periph(unsigned pin, int use_pullup);
extern int at91_set_gpio_input(unsigned pin, int use_pullup);
extern int at91_set_gpio_output(unsigned pin, int value);
extern int at91_set_deglitch(unsigned pin, int is_on);
extern int at91_set_multi_drive(unsigned pin, int is_on);
extern int __init_or_module at91_set_A_periph(unsigned pin, int use_pullup);
extern int __init_or_module at91_set_B_periph(unsigned pin, int use_pullup);
extern int __init_or_module at91_set_gpio_input(unsigned pin, int use_pullup);
extern int __init_or_module at91_set_gpio_output(unsigned pin, int value);
extern int __init_or_module at91_set_deglitch(unsigned pin, int is_on);
extern int __init_or_module at91_set_multi_drive(unsigned pin, int is_on);
/* callable at any time */
extern int at91_set_gpio_value(unsigned pin, int value);
extern int at91_get_gpio_value(unsigned pin);
/* callable only from core power-management code */
extern void at91_gpio_suspend(void);
extern void at91_gpio_resume(void);
#endif