[MIPS] vr41xx: Update e55 setup function
Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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@ -1,7 +1,7 @@
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/*
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* setup.c, Setup for the CASIO CASSIOPEIA E-11/15/55/65.
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*
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* Copyright (C) 2002-2005 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
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* Copyright (C) 2002-2006 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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@ -21,13 +21,18 @@
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#include <linux/ioport.h>
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#include <asm/io.h>
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#include <asm/vr41xx/e55.h>
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#define E55_ISA_IO_BASE 0x1400c000
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#define E55_ISA_IO_SIZE 0x03ff4000
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#define E55_ISA_IO_START 0
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#define E55_ISA_IO_END (E55_ISA_IO_SIZE - 1)
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#define E55_IO_PORT_BASE KSEG1ADDR(E55_ISA_IO_BASE)
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static int __init casio_e55_setup(void)
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{
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set_io_port_base(IO_PORT_BASE);
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ioport_resource.start = IO_PORT_RESOURCE_START;
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ioport_resource.end = IO_PORT_RESOURCE_END;
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set_io_port_base(E55_IO_PORT_BASE);
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ioport_resource.start = E55_ISA_IO_START;
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ioport_resource.end = E55_ISA_IO_END;
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return 0;
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}
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@ -1,43 +0,0 @@
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/*
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* e55.h, Include file for CASIO CASSIOPEIA E-10/15/55/65.
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*
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* Copyright (C) 2002-2004 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#ifndef __CASIO_E55_H
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#define __CASIO_E55_H
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#include <asm/addrspace.h>
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#include <asm/vr41xx/vr41xx.h>
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/*
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* Board specific address mapping
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*/
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#define VR41XX_ISA_MEM_BASE 0x10000000
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#define VR41XX_ISA_MEM_SIZE 0x04000000
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/* VR41XX_ISA_IO_BASE includes offset from real base. */
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#define VR41XX_ISA_IO_BASE 0x1400c000
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#define VR41XX_ISA_IO_SIZE 0x03ff4000
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#define ISA_BUS_IO_BASE 0
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#define ISA_BUS_IO_SIZE VR41XX_ISA_IO_SIZE
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#define IO_PORT_BASE KSEG1ADDR(VR41XX_ISA_IO_BASE)
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#define IO_PORT_RESOURCE_START ISA_BUS_IO_BASE
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#define IO_PORT_RESOURCE_END (ISA_BUS_IO_BASE + ISA_BUS_IO_SIZE - 1)
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#endif /* __CASIO_E55_H */
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