ARCv2: fpu: preserve userspace fpu state
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
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Vineet Gupta
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f05523aa7a
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f45ba2bd6d
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@ -351,9 +351,8 @@ config NODES_SHIFT
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Accessing memory beyond 1GB (with or w/o PAE) requires 2 memory
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zones.
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if ISA_ARCOMPACT
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config ARC_COMPACT_IRQ_LEVELS
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depends on ISA_ARCOMPACT
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bool "Setup Timer IRQ as high Priority"
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# if SMP, LV2 enabled ONLY if ARC implementation has LV2 re-entrancy
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depends on !SMP
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@ -361,14 +360,10 @@ config ARC_COMPACT_IRQ_LEVELS
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config ARC_FPU_SAVE_RESTORE
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bool "Enable FPU state persistence across context switch"
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help
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Double Precision Floating Point unit had dedicated regs which
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need to be saved/restored across context-switch.
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Note that ARC FPU is overly simplistic, unlike say x86, which has
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hardware pieces to allow software to conditionally save/restore,
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based on actual usage of FPU by a task. Thus our implemn does
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this for all tasks in system.
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endif #ISA_ARCOMPACT
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ARCompact FPU has internal registers to assist with Double precision
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Floating Point operations. There are control and stauts registers
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for floating point exceptions and rounding modes. These are
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preserved across task context switch when enabled.
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config ARC_CANT_LLSC
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def_bool n
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@ -39,6 +39,8 @@
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#define ARC_REG_CLUSTER_BCR 0xcf
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#define ARC_REG_AUX_ICCM 0x208 /* ICCM Base Addr (ARCv2) */
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#define ARC_REG_LPB_CTRL 0x488 /* ARCv2 Loop Buffer control */
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#define ARC_REG_FPU_CTRL 0x300
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#define ARC_REG_FPU_STATUS 0x301
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/* Common for ARCompact and ARCv2 status register */
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#define ARC_REG_STATUS32 0x0A
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@ -11,6 +11,8 @@
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#include <asm/ptrace.h>
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#ifdef CONFIG_ISA_ARCOMPACT
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/* These DPFP regs need to be saved/restored across ctx-sw */
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struct arc_fpu {
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struct {
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@ -18,11 +20,35 @@ struct arc_fpu {
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} aux_dpfp[2];
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};
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extern void fpu_save_restore(struct task_struct *p, struct task_struct *n);
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#define fpu_init_task(regs)
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#else
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/*
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* ARCv2 FPU Control aux register
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* - bits to enable Traps on Exceptions
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* - Rounding mode
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*
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* ARCv2 FPU Status aux register
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* - FPU exceptions flags (Inv, Div-by-Zero, overflow, underflow, inexact)
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* - Flag Write Enable to clear flags explicitly (vs. by fpu instructions
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* only
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*/
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struct arc_fpu {
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unsigned int ctrl, status;
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};
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extern void fpu_init_task(struct pt_regs *regs);
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#endif /* !CONFIG_ISA_ARCOMPACT */
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extern void fpu_save_restore(struct task_struct *p, struct task_struct *n);
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#else /* !CONFIG_ARC_FPU_SAVE_RESTORE */
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#define fpu_save_restore(p, n)
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#define fpu_init_task(regs)
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#endif /* CONFIG_ARC_FPU_SAVE_RESTORE */
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@ -23,7 +23,9 @@ obj-$(CONFIG_PERF_EVENTS) += perf_event.o
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obj-$(CONFIG_JUMP_LABEL) += jump_label.o
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obj-$(CONFIG_ARC_FPU_SAVE_RESTORE) += fpu.o
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ifdef CONFIG_ISA_ARCOMPACT
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CFLAGS_fpu.o += -mdpfp
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endif
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ifdef CONFIG_ARC_DW2_UNWIND
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CFLAGS_ctx_sw.o += -fno-omit-frame-pointer
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@ -8,6 +8,8 @@
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#include <linux/sched.h>
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#include <asm/fpu.h>
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#ifdef CONFIG_ISA_ARCOMPACT
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/*
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* To save/restore FPU regs, simplest scheme would use LR/SR insns.
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* However since SR serializes the pipeline, an alternate "hack" can be used
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@ -50,3 +52,28 @@ void fpu_save_restore(struct task_struct *prev, struct task_struct *next)
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: "r" (zero), "r" (*(readfrom + 3)), "r" (*(readfrom + 2))
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);
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}
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#else
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void fpu_init_task(struct pt_regs *regs)
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{
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/* default rounding mode */
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write_aux_reg(ARC_REG_FPU_CTRL, 0x100);
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/* set "Write enable" to allow explicit write to exception flags */
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write_aux_reg(ARC_REG_FPU_STATUS, 0x80000000);
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}
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void fpu_save_restore(struct task_struct *prev, struct task_struct *next)
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{
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struct arc_fpu *save = &prev->thread.fpu;
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struct arc_fpu *restore = &next->thread.fpu;
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save->ctrl = read_aux_reg(ARC_REG_FPU_CTRL);
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save->status = read_aux_reg(ARC_REG_FPU_STATUS);
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write_aux_reg(ARC_REG_FPU_CTRL, restore->ctrl);
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write_aux_reg(ARC_REG_FPU_STATUS, restore->status);
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}
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#endif
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@ -20,6 +20,8 @@
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#include <linux/elf.h>
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#include <linux/tick.h>
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#include <asm/fpu.h>
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SYSCALL_DEFINE1(arc_settls, void *, user_tls_data_ptr)
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{
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task_thread_info(current)->thr_ptr = (unsigned int)user_tls_data_ptr;
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@ -263,7 +265,7 @@ int copy_thread_tls(unsigned long clone_flags, unsigned long usp,
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/*
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* Do necessary setup to start up a new user task
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*/
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void start_thread(struct pt_regs * regs, unsigned long pc, unsigned long usp)
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void start_thread(struct pt_regs *regs, unsigned long pc, unsigned long usp)
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{
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regs->sp = usp;
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regs->ret = pc;
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@ -279,6 +281,8 @@ void start_thread(struct pt_regs * regs, unsigned long pc, unsigned long usp)
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regs->eflags = 0;
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#endif
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fpu_init_task(regs);
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/* bogus seed values for debugging */
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regs->lp_start = 0x10;
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regs->lp_end = 0x80;
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