ASoC: msm8916-wcd-analog: fix register Interrupt offset
For some reason interrupt set and clear register offsets are
not set correctly.
This patch corrects them!
Fixes: 585e881e5b
("ASoC: codecs: Add msm8916-wcd analog codec")
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Tested-by: Stephan Gerhold <stephan@gerhold.net>
Reviewed-by: Stephan Gerhold <stephan@gerhold.net>
Link: https://lore.kernel.org/r/20200811103452.20448-1-srinivas.kandagatla@linaro.org
Signed-off-by: Mark Brown <broonie@kernel.org>
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#define CDC_D_REVISION1 (0xf000)
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#define CDC_D_PERPH_SUBTYPE (0xf005)
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#define CDC_D_INT_EN_SET (0x015)
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#define CDC_D_INT_EN_CLR (0x016)
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#define CDC_D_INT_EN_SET (0xf015)
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#define CDC_D_INT_EN_CLR (0xf016)
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#define MBHC_SWITCH_INT BIT(7)
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#define MBHC_MIC_ELECTRICAL_INS_REM_DET BIT(6)
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#define MBHC_BUTTON_PRESS_DET BIT(5)
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