There are a few variants of the STACR register that affect more than
just the "AXON" version of EMAC. Replace the current test of various
chip models with tests for generic properties in the device-tree.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Acked-by: Stefan Roese <sr@denx.de>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
More than just "AXON" version of EMAC RGMII supports MDIO, so replace
the current test with a generic property in the device-tree that
indicates such support.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Acked-by: Stefan Roese <sr@denx.de>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
Now the rtc class ds1374 driver has been added, remove the old rtc
driver hookup code, add rtc node to device trees, and turn on the
new driver in the defconfigs.
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
The interrupt map for the PCI PHB that had the ULI1575 was not correct
on the boards that have it.
* 8544 DS:
- Fix interrupt mask
- Be explicit about use of INTA for on chip peripherals
* 8572 DS/8641 HPCN:
- Fix interrupt mask
- Expand interrupt map for PCI slots to cover all functions
- Be explicit about use of INTA for on chip peripherals
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
correct the reg property, remove duplicate io port entry, whitespace fixes.
Thanks to Peter Van Ackeren for pointing this out.
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
The ps3 target produces two images, and the binary one is not the
"primary" image that corresponds to the -o flag; thus, it no longer
uses the generic binary flag.
On platforms which do use the binary flag, it no longer produces a
.bin suffix, so that the output file matches what was passed to the -o flag.
This should fix the zImage ln problems for the ps3 target.
Signed-off-by: Scott Wood <scottwood@freescale.com>
Acked-by: Geert Uytterhoeven <Geert.Uytterhoeven@sonycom.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
Re-order the EMAC interrupts in the walnut.dts file so that they are mapped
correctly.
Signed-off-by: Steve Falco <sfalco at harris.com>
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
Add the 'set -e' command to the wrapper script so that if any command
fails then the script will automatically exit
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Acked-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
Allow wrapper script to print verbose progress when the V is set in the
environment.
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Acked-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
Add 'fsl,' prefix to 'compatible' property for gpt nodes.
Add 'fsl,' prefix to empty, GPT0 specific 'has-wdt' property.
The fsl, prefix is being added to better match the convention of prefixing
manufacturer specific properties and values with the vendors name.
Signed-off-by: Marian Balakowicz <m8@semihalf.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Fix some device tree omissions that prevented the new EMAC driver from
setting up ethernet on the Bamboo board correctly and update the Bamboo
defconfig.
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
This patch enables the ibm_newemac driver for the Walnut board. It fixes the
device tree for the walnut board to order the MAL interrupts correctly and
adds the local-mac-address property to the EMAC node. The bootwrapper is also
updated to extract the MAC address from the OpenBIOS offset where it is stored.
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
The current bootwrapper fails to set the timebase clock to the CPU clock
which causes the time to increment incorrectly. This fixes it by using the
correct #define for the CPC0_CR1 register.
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
This adds RGMII support to Sequoia DTS and sets correct phy-mode
for EMACs. According to Sequoia datasheet, both ethernet ports
are connected to RGMII interface, while ZMII is used only for MDIO.
Signed-off-by: Valentine Barshak <vbarshak@ru.mvista.com>
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
Add device tree entries for lite5200b's FEC's PHY.
Signed-off-by: Domen Puncer <domen.puncer@telargo.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
This adds a memchr() implementation to the bootwrapper, which will
be needed when libfdt is merged in.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Paul Mackerras <paulus@samba.org>
We don't use any CPM devices on these boards, but the muram node on these
chips is different from the 8560, so it's helpful to people working with
custom boards based on these chips.
Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Add '-g' to BOOTCFLAGS if CONFIG_DEBUG_INFO is set.
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Paul Mackerras <paulus@samba.org>
DTC now supports "foo","bar" format for lists of strings; use the new
format on the lite5200 device trees.
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
1. UCC1's RX_DV pin is 16, not 15;
2. UCC1's phy is at 0x7, not 0x1. Schematics says 0x7, and recent
u-boot also using 0x7.
3. Use gianfar's (eTSEC) mdio bus. This is hardware default setup.
4. tx-clock should be CLK16 (GE125, PB31);
5. phy-connection-type is RGMII-ID;
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
On the majority of 85xx & 86xx we have a register that's ability to
assert HRESET_REQ to reset the board. We refactored that code so it
can be shared between both platforms into fsl_soc.c and removed all
the duplication in each platform directory.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
According to booting-without-of.txt, compatible should be "fsl_spi" and
mode "cpu" or "qe" for the fsl SPI controllers.
Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
The PCI nodes on the MPC8568 dts didn't get moved up to be sibilings of the
SOC node when we did that clean up for some reason. Fix that up and some
minor whitespace and adjusting the size of the soc reg property.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
MPC8568E-MDS have DS1374 chip on the I2C bus, thus let's use it.
This patch also adds #address-cells and #size-cells to the I2C
controllers nodes.
p.s. DS1374 rtc class driver is in the -mm tree, its name is
rtc-rtc-class-driver-for-the-ds1374.patch.
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
The way the current CPM binding describes available multi-user (a.k.a.
dual-ported) RAM doesn't work well when there are multiple free regions,
and it doesn't work at all if the region doesn't begin at the start of
the muram area (as the hardware needs to be programmed with offsets into
this area). The latter situation can happen with SMC UARTs on CPM2, as its
parameter RAM is relocatable, u-boot puts it at zero, and the kernel doesn't
support moving it.
It is now described with a muram node, similar to QE. The current CPM
binding is sufficiently recent (i.e. never appeared in an official release)
that compatibility with existing device trees is not an issue.
The code supporting the new binding is shared between cpm1 and cpm2, rather
than remain separated. QE should be able to use this code as well, once
minor fixes are made to its device trees.
Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
This patch adds cuboot support for MPC7448HPC2 platform.
The cuImage can be used with legacy u-boot without FDT support.
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Acked-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
1. PCI and reset are factored out into pq2.c. I renamed them from m82xx
to pq2 because they won't work on the Integrated Host Processor line of
82xx chips (i.e. 8240, 8245, and such).
2. The PCI PIC, which is nominally board-specific, is used on multiple
boards, and thus is used into pq2ads-pci-pic.c.
3. The new CPM binding is used.
4. General cleanup.
Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
This board is also resold by Freescale under the names
"QUICCStart MPC885 Evaluation System" and "CWH-PPC-885XN-VE".
Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
It now uses the new CPM binding and the generic pin/clock functions, and
has assorted fixes and cleanup.
Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
The localbus node is used to describe devices that are connected via a chip
select or similar mechanism. The advantages over placing the devices under
the root node are that it can be probed without probing other random things
under the root, and that the description of which chip select a given device
uses can be used to set up mappings if the firmware failed to do so in a
useful manner.
cuboot-pq2 is updated to match the binding; previously, it called itself
chipselect rather than localbus, and used phandle linkage between the
actual bus node and the control node (the current agreement is to simply use
the fully-qualified address of the control registers, and ignore the overlap
with the IMMR node).
Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
fsl_get_immr() uses /soc/ranges to determine the immr.
mpc885_get_clock() transforms a crystal frequency into a system frequency
according to the PLL register settings.
pq2_get_clocks() does the same as the above for the PowerQUICC II,
except that it produces several different clocks.
The mpc8xx/pq2 set_clocks() functions modify common properties in
the device tree based on the given clock data.
The mpc885/pq2 fixup_clocks() functions call get_clocks(), and
pass the results to set_clocks().
Signed-off-by: Scott Wood <scottwood@freescale.com>
Acked-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Consensus was reached to put PCI nodes at the root of the tree (and not
under /soc), but the phandle to a control node was rejected in favor of
simply not worrying about /pci/reg overlapping /soc/ranges.
This updates cuboot-82xx to not look for the phandle.
Signed-off-by: Scott Wood <scottwood@freescale.com>
Acked-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
As suggested by David Gibson, now that we have a separate node
for the baud rate generators, it's better to use the standard
clock-frequency property than a cpm-node-level fsl,brg-frequency
property.
This patch updates existing places where fsl,brg-frequency is
used.
Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Allows the bootwrapper to use the uartlite device for console output.
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
Pass the appropriate -mcpu flag to the treeboot-walnut.o object to prevent
some toolchains from erroring out with unknown opcodes
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
