Commit Graph

661 Commits

Author SHA1 Message Date
Brian Niebuhr
cda987ebb8 spi: davinci: eliminate the single member structure davinci_spi_slave
The struct davinci_spi_slave has a single member. Eliminate it
and store the per-chipselect data in struct davinci_spi directly.

Signed-off-by: Brian Niebuhr <bniebuhr@efjohnson.com>
Tested-By: Michael Williamson <michael.williamson@criticallink.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2010-11-18 18:38:27 +05:30
Brian Niebuhr
b6c4eeac5b spi: davinci: remove unused members of davinci_spi_slave
Several members of struct davinci_spi_slave are unused in code.
Remove such members.

Signed-off-by: Brian Niebuhr <bniebuhr@efjohnson.com>
Tested-By: Michael Williamson <michael.williamson@criticallink.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2010-11-18 18:38:27 +05:30
Brian Niebuhr
7abbf23c59 spi: davinci: add support for wait enable timeouts
Just enabling WAITENA in SPIFMTn register waits for the
enable signal from the slave indefinitely. Allow support
for finite waiting by adding support for c2e delay
(maximum time for addressed slave to respond) and t2e
delay (maximum time for slave to respond after transmit
data finished).

While at it, modify the T2C and C2T defines by prepending
the register name as is the convention followed for other
register field elsewhere in the driver.

Signed-off-by: Brian Niebuhr <bniebuhr@efjohnson.com>
Tested-By: Michael Williamson <michael.williamson@criticallink.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2010-11-18 18:38:27 +05:30
Brian Niebuhr
fd764463fe spi: davinci: setup chip-select timers values only if timer enabled
Setup chip-select timers values only if timer is enabled
(timer_disbled in spi configuration is false).

As a nice side effect, this patch removes code duplicated in
davinci_spi_bufs_pio() and davinci_spi_bufs_dma().

Signed-off-by: Brian Niebuhr <bniebuhr@efjohnson.com>
Tested-By: Michael Williamson <michael.williamson@criticallink.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2010-11-18 18:38:26 +05:30
Brian Niebuhr
25f33512f6 spi: davinci: consolidate setup of SPIFMTn in one function
Consolidate the setup of SPIFMTn register under
davinci_spi_setup_transfer() simplifying the code
and avoiding unnecessary reads and writes to the
register.

The two inline functions {set|clear}_fmt_bits() can
be eliminated because of this.

Signed-off-by: Brian Niebuhr <bniebuhr@efjohnson.com>
Tested-By: Michael Williamson <michael.williamson@criticallink.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2010-11-18 18:38:26 +05:30
Brian Niebuhr
53a31b07c5 spi: davinci: make chip-slect specific parameters really chip-select specific
Some chip-select specific paramterers like wdelay, parity, usage of
chip-select timers (and the actual timer values) are included in
platform data forcing the same behaviour across all chip-selects.

Create a new davinci_spi_config data structure which can be passed
along using controller_data member of spi_device data structure
on a per-device basis.

Signed-off-by: Brian Niebuhr <bniebuhr@efjohnson.com>
Tested-By: Michael Williamson <michael.williamson@criticallink.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2010-11-18 18:38:26 +05:30
Brian Niebuhr
472880c73d spi: davinci: remove 'wait_enable' platform data member
The SPI_READY bit of struct spi_device:mode serves the purpose
of letting the SPI master know if the slave can signal if it is
ready for transfer or not.

The 'wait_enable' platform data was duplicating this functionality.
Use the framework provided method of indicating this capability.

Signed-off-by: Brian Niebuhr <bniebuhr@efjohnson.com>
Tested-By: Michael Williamson <michael.williamson@criticallink.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2010-11-18 18:38:25 +05:30
Brian Niebuhr
7fe0092b1f spi: davinci: simplify prescalar calculation
Simplify pre-scalar calculation and move it into a seprate
function.

Refuse to correct invalid pre-scalar values silently as this
might lead to unexpected bugs and lower performance. Instead
an error will force users to dig into the root-cause of the
issue.

While at it, remove some device specific checks on the maximum
SPI frequency. As the driver supports the SPI interface
implemented on various devices, it should only take care of core
SPI limitations and leave the device specific handling to platform
code.

Signed-off-by: Brian Niebuhr <bniebuhr@efjohnson.com>
Tested-By: Michael Williamson <michael.williamson@criticallink.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2010-11-18 18:38:25 +05:30
Brian Niebuhr
23853973d9 spi: davinci: enable GPIO lines to be used as chip selects
Sometimes, the chip selects provided by SPI module are
muxed with other functionality and cannot be used in
some designs. In such cases, it becomes convenient to use
an available GPIO line as chip select.

This patch enables the DaVinci SPI driver to treat specific
GPIO lines as chip selects based on information provided in
platform data.

Signed-off-by: Brian Niebuhr <bniebuhr@efjohnson.com>
Tested-By: Michael Williamson <michael.williamson@criticallink.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2010-11-18 18:38:25 +05:30
Brian Niebuhr
cfbc5d1d8f spi: davinci: remove unnecessary data transmit on CS disable
On TI DaVinci's SPI controller, the SPIDAT1 register which
controls the chip slect status, also has data transmit register
in the lower 16 bits. Writing to the whole 32-bits triggers
an additional data transmit every time the chip select is disabled.

While most SPI slaves cope-up with this, some cannot. This
patch fixes this by doing a 16-bit write on the upper half
of the SPIDAT1 register

While at it, group the SPIGCR1 register related defines seperately
from SPIDAT1 register defines.

Signed-off-by: Brian Niebuhr <bniebuhr@efjohnson.com>
Tested-By: Michael Williamson <michael.williamson@criticallink.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2010-11-18 18:38:24 +05:30
Brian Niebuhr
7978b8c385 spi: davinci: enable both activation and deactivation of chip-selects
Let davinci_spi_chipselect() perform both activation and
deactivation of chip selects. This lets spi_bitbang fully
control chip select activation, as intended by the SPI API.

With this change, the chip select activation code need not
be duplicated in davinci_spi_bufs_{pio|dma}().

Also, keeping chip select active control is removed as a
platform data and simply controlled using information from
spi_bitbang on whether chip slect should be activated or
de-activated.

Signed-off-by: Brian Niebuhr <bniebuhr@efjohnson.com>
Tested-By: Michael Williamson <michael.williamson@criticallink.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2010-11-18 18:38:24 +05:30
Brian Niebuhr
843a713bc5 spi: davinci: set chip-select mode in SPIDEF only once
Quit writing the same constant value determining the chip-select
mode when no transmissions are in progress in davinci_spi_chipelect().

Instead just setup the SPIDEF register once during probe.

Signed-off-by: Brian Niebuhr <bniebuhr@efjohnson.com>
Tested-By: Michael Williamson <michael.williamson@criticallink.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2010-11-18 18:38:24 +05:30
Sekhar Nori
50356dd7c1 spi: davinci: remove unnecessary typecast
The typecasting of SPI base address to davinci_spi_reg is
unused.

Remove it.

Tested-By: Michael Williamson <michael.williamson@criticallink.com>
Tested-By: Brian Niebuhr <bniebuhr@efjohnson.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2010-11-18 18:38:24 +05:30
Sekhar Nori
8e206f1cbd spi: davinci: removed unused #defines
Remove unused defines from code which should help
in easy reading of code.

Also, use the opportuinity to keep the SPIGCR1
register defines together.

Tested-By: Michael Williamson <michael.williamson@criticallink.com>
Tested-By: Brian Niebuhr <bniebuhr@efjohnson.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2010-11-18 18:38:23 +05:30
Brian Niebuhr
c3c475c235 spi: davinci: remove unused variable 'pdata'
The 'pdata' variable is unused in couple of routines.

Remove such occurences.

Signed-off-by: Brian Niebuhr <bniebuhr@efjohnson.com>
Tested-By: Michael Williamson <michael.williamson@criticallink.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2010-11-18 18:38:23 +05:30
Brian Niebuhr
778e261ed6 spi: davinci: whitespace cleanup
Cleanup unnecessary white space from various
parts of the file.

Signed-off-by: Brian Niebuhr <bniebuhr@efjohnson.com>
Tested-By: Michael Williamson <michael.williamson@criticallink.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2010-11-18 18:38:23 +05:30
Brian Niebuhr
3b740b10e9 spi: davinci: fix checkpatch errors
Fix the following checkpatch error:

WARNING: unnecessary whitespace before a quoted newline
+       dev_info(&pdev->dev, "Controller at 0x%p \n", davinci_spi->base);

Signed-off-by: Brian Niebuhr <bniebuhr@efjohnson.com>
Tested-By: Michael Williamson <michael.williamson@criticallink.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2010-11-18 18:38:23 +05:30
Linus Torvalds
90ae83f7fc Merge branch 'next-spi' of git://git.secretlab.ca/git/linux-2.6
* 'next-spi' of git://git.secretlab.ca/git/linux-2.6:
  spi/pl022: fix erroneous platform data in U300
  spi: fixed odd static string conventions in core code
  spi/bfin_spi: only request GPIO on first load
  spi/bfin_spi: handle error/status changes after data interrupts
  spi: enable spi_board_info to be registered after spi_master
2010-11-01 07:50:43 -04:00
Linus Torvalds
b18cae4224 Merge branch 'for-next' of git://android.git.kernel.org/kernel/tegra
* 'for-next' of git://android.git.kernel.org/kernel/tegra:
  spi: tegra: fix error setting on timeout
  spi: add spi_tegra driver
  tegra: harmony: enable PCI Express
  tegra: add PCI Express support
  tegra: add PCI Express clocks
  [ARM] tegra: Add APB DMA support
  [ARM] tegra: Add cpufreq support
  [ARM] tegra: common: Update common clock init table
  [ARM] tegra: clock: Add dvfs support, bug fixes, and cleanups
  [ARM] tegra: Add support for reading fuses
  [ARM] tegra: gpio: Add suspend and wake support
  [ARM] tegra: pinmux: add safe values, move tegra2, add suspend
  [ARM] tegra: add suspend and mirror irqs to legacy controller
  [ARM] tegra: Add legacy irq support
  [ARM] tegra: update iomap
2010-10-25 18:42:06 -07:00
Erik Gilling
f41649e040 spi: tegra: fix error setting on timeout
avoids derefencing an uninitialized pointer

Change-Id: Icf528441ae481e9f6f5ddc0be32c7c217fa49701
Signed-off-by: Erik Gilling <konkers@android.com>
2010-10-25 16:57:46 -07:00
Linus Torvalds
092e0e7e52 Merge branch 'llseek' of git://git.kernel.org/pub/scm/linux/kernel/git/arnd/bkl
* 'llseek' of git://git.kernel.org/pub/scm/linux/kernel/git/arnd/bkl:
  vfs: make no_llseek the default
  vfs: don't use BKL in default_llseek
  llseek: automatically add .llseek fop
  libfs: use generic_file_llseek for simple_attr
  mac80211: disallow seeks in minstrel debug code
  lirc: make chardev nonseekable
  viotape: use noop_llseek
  raw: use explicit llseek file operations
  ibmasmfs: use generic_file_llseek
  spufs: use llseek in all file operations
  arm/omap: use generic_file_llseek in iommu_debug
  lkdtm: use generic_file_llseek in debugfs
  net/wireless: use generic_file_llseek in debugfs
  drm: use noop_llseek
2010-10-22 10:52:56 -07:00
Linus Walleij
eb288a1f45 spi: fixed odd static string conventions in core code
This patch removes convention of passing a static string as a
parameter to another static string.  The convention is intended to
reduce text usage by sharing the common bits of the string, but the
implementation is inherently fragile (a change to one format string
but not the other will nullify any possible advantage), it isn't
necessarily a net win depending on what this compiler does, and it
it reduces code readability.

Signed-off-by: Linus Walleij <linus.walleij@stericsson.com>
[grant.likely@secretlab.ca: removed dev_dbg->dev_err hunk]
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
2010-10-22 09:51:05 -06:00
Michael Hennerich
73e1ac1625 spi/bfin_spi: only request GPIO on first load
The gpiolib code does not allow people to do gpio_request() on a GPIO
once it has already been requested.  So make sure we only request the
pin on the first setup of a SPI device.  Otherwise, if you attempts to
reconfigure a SPI device on the fly (like change bit sizes), the setup
function incorrectly fails.

Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
2010-10-22 01:26:46 -06:00
Michael Hennerich
782a895693 spi/bfin_spi: handle error/status changes after data interrupts
The error interrupt on the BF537 SIC cannot be enabled on a
per-peripheral basis.  Once the error interrupt is enabled
for one peripheral, it is automatically enabled for all.

So in the Blackfin on-chip SPI driver, we need to clear out
these known errors in the data interrupt once we've successfully
finished processing all of the pending data.

Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
2010-10-22 01:26:46 -06:00
Feng Tang
2b9603a0d7 spi: enable spi_board_info to be registered after spi_master
Currently spi_register_board_info() has to be called before its related
spi_master be registered, otherwise these board info will be just ignored.

This patch will remove this order limit, it adds a global spi master list
like the existing global board info listr. Whenever a board info or a
spi_master is registered, the spi master list or board info list
will be scanned, and a new spi device will be created if there is a
master-board info match.

Signed-off-by: Feng Tang <feng.tang@intel.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
2010-10-21 23:52:16 -06:00
Erik Gilling
0c03a1dd5b spi: add spi_tegra driver
v2 changes:
  from Thierry Reding:
    * add "select TEGRA_SYSTEM_DMA" to Kconfig
  from Grant Likely:
    * add oneline description to header
    * inline references to DRIVER_NAME
    * inline references to BUSY_TIMEOUT
    * open coded bytes_per_word()
    * spi_readl/writel -> spi_tegra_readl/writel
    * move transfer validation to spi_tegra_transfer
    * don't request_mem_region iomem as platform bus does that for us
    * __exit -> __devexit

v3 changes:
  from Russell King:
    * put request_mem_region back int
  from Grant Likely:
    * remove #undef DEBUG
    * add SLINK_ to register bit defines
    * remove unused bytes_per_word
    * make spi_tegra_readl/writel static linine
    * various refactoring for clarity
    * mark err if BSY bit is not cleared after 1000 retries
    * move spinlock to protect setting of RDY bit
    * subsys_initcall -> module_init

v3 changes:
  from Grant Likely:
    * update spi_tegra to use PTR_ERRless dma API

v4 changes:
  from Grant Likely:
    * remove empty spi_tegra_cleanup fucntion
    * allow device ids of -1

Signed-off-by: Erik Gilling <konkers@android.com>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
Cc: Thierry Reding <thierry.reding@avionic-design.de>
Cc: Russell King <linux@arm.linux.org.uk>

spi: tegra: cleanups from upstream review

Change-Id: Icecf7e64efcb39de072a15234ba1faa4bad40d25
Signed-off-by: Erik Gilling <konkers@android.com>
2010-10-21 18:15:05 -07:00
Linus Torvalds
b5153163ed Merge branch 'devel' of master.kernel.org:/home/rmk/linux-2.6-arm
* 'devel' of master.kernel.org:/home/rmk/linux-2.6-arm: (278 commits)
  arm: remove machine_desc.io_pg_offst and .phys_io
  arm: use addruart macro to establish debug mappings
  arm: return both physical and virtual addresses from addruart
  arm/debug: consolidate addruart macros for CONFIG_DEBUG_ICEDCC
  ARM: make struct machine_desc definition coherent with its comment
  eukrea_mbimxsd-baseboard: Pass the correct GPIO to gpio_free
  cpuimx27: fix compile when ULPI is selected
  mach-pcm037_eet: fix compile errors
  Fixing ethernet driver compilation error for i.MX31 ADS board
  cpuimx51: update board support
  mx5: add cpuimx51sd module and its baseboard
  iomux-mx51: fix GPIO_1_xx 's IOMUX configuration
  imx-esdhc: update devices registration
  mx51: add resources for SD/MMC on i.MX51
  iomux-mx51: fix SD1 and SD2's iomux configuration
  clock-mx51: rename CLOCK1 to CLOCK_CCGR for better readability
  clock-mx51: factorize clk_set_parent and clk_get_rate
  eukrea_mbimxsd: add support for DVI displays
  cpuimx25 & cpuimx35: fix OTG port registration in host mode
  i.MX31 and i.MX35 : fix errate TLSbo65953 and ENGcm09472
  ...
2010-10-21 16:42:32 -07:00
Ilkka Koskinen
2764c500be spi/omap2_mcspi: Verify TX reg is empty after TX only xfer with DMA
In case of TX only with DMA, the driver assumes that the data
has been transferred once DMA callback in invoked. However,
SPI's shift register may still contain data. Thus, the driver
is supposed to verify that the register is empty and the end of
the SPI transfer has been reached.

Signed-off-by: Ilkka Koskinen <ilkka.koskinen@nokia.com>
Tested-by: Tuomas Katila <ext-tuomas.2.katila@nokia.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
2010-10-20 10:43:24 -06:00
Jason Wang
e1993ed642 spi/omap2_mcspi: disable channel after TX_ONLY transfer in PIO mode
In the TX_ONLY transfer, the SPI controller also receives data
simultaneously and saves them in the rx register. After the TX_ONLY
transfer, the rx register will hold the random data received during
the last tx transaction.

If the direct following transfer is RX_ONLY, this random data has the
possibility to affect this transfer like this:
  When the SPI controller is changed from TX_ONLY to RX_ONLY,
  the random data makes the rx register full immediately and
  triggers a dummy write automatically(in SPI RX_ONLY transfers,
  we need a dummy write to trigger the first transaction).

  So the first data received in the RX_ONLY transfer will be that
  random data instead of something meaningful.

We can avoid this by inserting a Disable/Re-enable toggle of the
channel after the TX_ONLY transfer, since it purges the rx register.

Signed-off-by: Jason Wang <jason77.wang@gmail.com>
Tested-by: Grazvydas Ignotas <notasas@gmail.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
2010-10-20 10:30:53 -06:00
Grant Likely
db181a8ee1 Merge branch 'for-spi' of git://git.kernel.org/pub/scm/linux/kernel/git/vapier/blackfin into spi/next 2010-10-18 09:25:09 -06:00
Mike Frysinger
9c0a788b43 spi/bfin_spi: namespace local structs
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-18 02:49:44 -04:00
Michael Hennerich
6f7c17f4f9 spi/bfin_spi: init early
Some systems using this bus sometimes have very basic devices on them
such as regulators.  So we need to be loaded even earlier in case the
devices are used by things such as early board init code.  Therefore
register in subsys_initcall().

Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-18 02:49:44 -04:00
Bob Liu
2e768659df spi/bfin_spi: check per-transfer bits_per_word
Currently, if the bits_per_word when doing a transfer is not 8bits, we
always treat it as 16bits when we should actually be returning an error.

Signed-off-by: Bob Liu <lliubbo@gmail.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-18 02:49:43 -04:00
Barry Song
4190f6a51f spi/bfin_spi: warn when CS is driven by hardware (CPHA=0)
When the hardware is controlling the CS, there are some SPI options
we are unable to support.  So issue a warning in the hopes that the
user will change to a SPI mode where we can support things sanely.

Signed-off-by: Barry Song <barry.song@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-18 02:49:43 -04:00
Rob Maris
e72dcde72c spi/bfin_spi: cs should be always low when a new transfer begins
Signed-off-by: Rob Maris <maris.rob@vdi.de>
Signed-off-by: Barry Song <barry.song@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-18 02:49:42 -04:00
Rob Maris
e35954053c spi/bfin_spi: fix typo in comment
Signed-off-by: Rob Maris <maris.rob@vdi.de>
Signed-off-by: Barry Song <barry.song@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-18 02:49:41 -04:00
Mike Frysinger
7715aad4ef spi/bfin_spi: reject unsupported SPI modes
Who knows what people will try!

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-18 02:49:41 -04:00
Barry Song
a75bd65b21 spi/bfin_spi: use dma_disable_irq_nosync() in irq handler
Using disable_irq() on the IRQ whose handler we are currently executing in
can easily lead to a hang.  So use the nosync variant here.

Signed-off-by: Barry Song <barry.song@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-18 02:49:40 -04:00
Mike Frysinger
5e8592dca3 spi/bfin_spi: combine duplicate SPI_CTL read/write logic
While combining things, also switch to the proper SPI bit define names.
This lets us punt the rarely used SPI defines.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-18 02:49:39 -04:00
Mike Frysinger
5b47bcd48b spi/bfin_spi: reset ctl_reg bits when setup is run again on a device
During runtime, the spi setup function may be called multiple times on the
same device in order to reconfigure some settings on the fly.  When this
happens, we need to reset the ctl_reg bits so that changing the mode works
as expected.

Reported-by: Andy Getzendanner <james.getzendanner@students.olin.edu>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-18 02:49:39 -04:00
Mike Frysinger
033f44bd0e spi/bfin_spi: push all size checks into the transfer function
This reduces duplication between the setup/transfer functions and keeps
values cached during setup from overriding values changed on a transfer
basis (like bits_per_word).

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-18 02:49:38 -04:00
Yi Li
7370ed6b91 spi/bfin_spi: use nosync when disabling the IRQ from the IRQ handler
Using disable_irq() on the IRQ whose handler we are currently executing in
can easily lead to a hang.  So use the nosync variant here.

Signed-off-by: Yi Li <yi.li@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-18 02:49:38 -04:00
Barry Song
9677b0de10 spi/bfin_spi: sync hardware state before reprogramming everything
Sometimes under load, the Blackfin core is able to send SPI register
updates out before the controller is actually disabled.  So when we
go to reprogram the entire state (to switch to a different slave),
make sure we sync after disabling the controller.

Signed-off-by: Barry Song <barry.song@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-18 02:49:37 -04:00
Barry Song
b052fd0a44 spi/bfin_spi: save/restore state when suspending/resuming
We can't rely on the SPI_CTL/SPI_FLG registers retaining their state when
suspending, so save/restore their entire values.

Signed-off-by: Barry Song <barry.song@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-18 02:49:37 -04:00
Barry Song
d3cc71f71a spi/bfin_spi: redo GPIO CS handling
The common SPI layers take care of detecting CS conflicts and preventing
two devices from claiming the same CS.  This causes problems for the GPIO
CS support we currently have as we are using CS0 to mean "GPIO CS".  But
if we have multiple devices using a GPIO CS, the common SPI layers see
multiple devices using the virtual "CS0" and reject any such attempts.

To make both work, we introduce an offset define.  This represents the
max number of hardware CS values that the SPI peripheral supports.  If
the CS is below this limit, we know we can use the hardware CS.  If it's
above, we treat it as a GPIO CS.  This keeps the CS unique as seen by
the common code and prevents conflicts.

Signed-off-by: Barry Song <barry.song@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-18 02:49:36 -04:00
Mike Frysinger
90008a641d spi/bfin_spi: use the SPI namespaced bit names
This lets us push the short SPI MMR bit names out of the global namespace.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-18 02:49:35 -04:00
Mike Frysinger
2a045131db spi/bfin_spi: drop extra memory we don't need
The driver that we based ours on uses a little extra memory behind the
normal driver state, but we don't.  So drop this useless bit of memory.

Reported-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-18 02:49:34 -04:00
Mike Frysinger
b9f139a7a6 spi/bfin_spi: convert struct names to something more logical
The current structure names are a bit confusing as to what they represent,
so use better names.

Reported-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-18 02:49:34 -04:00
Mike Frysinger
9c4542c7a3 spi/bfin_spi: convert read/write/duplex funcs to a dedicated ops structure
Rather than having to look up the same 3 sets of functions at the same
time, just use an ops structure so we only need to set one pointer.

Reported-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-18 02:49:33 -04:00
Mike Frysinger
f4f50c3ff7 spi/bfin_spi: convert queue run state to true/false
No point in creating our own version of true/false defines when there is
already a standard stdbool available to us.

Reported-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-18 02:49:32 -04:00