f01d74cc5a
watchdog/mpc8xxx_wdt.c does not use any miscdevice so this patch remove this unnecessary inclusion. Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com> Reviewed-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Guenter Roeck <linux@roeck-us.net>
272 lines
6.8 KiB
C
272 lines
6.8 KiB
C
/*
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* mpc8xxx_wdt.c - MPC8xx/MPC83xx/MPC86xx watchdog userspace interface
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*
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* Authors: Dave Updegraff <dave@cray.org>
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* Kumar Gala <galak@kernel.crashing.org>
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* Attribution: from 83xx_wst: Florian Schirmer <jolt@tuxbox.org>
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* ..and from sc520_wdt
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* Copyright (c) 2008 MontaVista Software, Inc.
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* Anton Vorontsov <avorontsov@ru.mvista.com>
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*
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* Note: it appears that you can only actually ENABLE or DISABLE the thing
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* once after POR. Once enabled, you cannot disable, and vice versa.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*/
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#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
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#include <linux/fs.h>
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#include <linux/init.h>
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#include <linux/kernel.h>
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#include <linux/timer.h>
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#include <linux/of_address.h>
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#include <linux/of_platform.h>
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#include <linux/module.h>
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#include <linux/watchdog.h>
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#include <linux/io.h>
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#include <linux/uaccess.h>
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#include <sysdev/fsl_soc.h>
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struct mpc8xxx_wdt {
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__be32 res0;
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__be32 swcrr; /* System watchdog control register */
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#define SWCRR_SWTC 0xFFFF0000 /* Software Watchdog Time Count. */
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#define SWCRR_SWEN 0x00000004 /* Watchdog Enable bit. */
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#define SWCRR_SWRI 0x00000002 /* Software Watchdog Reset/Interrupt Select bit.*/
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#define SWCRR_SWPR 0x00000001 /* Software Watchdog Counter Prescale bit. */
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__be32 swcnr; /* System watchdog count register */
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u8 res1[2];
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__be16 swsrr; /* System watchdog service register */
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u8 res2[0xF0];
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};
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struct mpc8xxx_wdt_type {
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int prescaler;
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bool hw_enabled;
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};
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struct mpc8xxx_wdt_ddata {
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struct mpc8xxx_wdt __iomem *base;
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struct watchdog_device wdd;
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struct timer_list timer;
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spinlock_t lock;
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};
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static u16 timeout = 0xffff;
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module_param(timeout, ushort, 0);
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MODULE_PARM_DESC(timeout,
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"Watchdog timeout in ticks. (0<timeout<65536, default=65535)");
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static bool reset = 1;
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module_param(reset, bool, 0);
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MODULE_PARM_DESC(reset,
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"Watchdog Interrupt/Reset Mode. 0 = interrupt, 1 = reset");
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static bool nowayout = WATCHDOG_NOWAYOUT;
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module_param(nowayout, bool, 0);
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MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started "
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"(default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
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static void mpc8xxx_wdt_keepalive(struct mpc8xxx_wdt_ddata *ddata)
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{
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/* Ping the WDT */
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spin_lock(&ddata->lock);
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out_be16(&ddata->base->swsrr, 0x556c);
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out_be16(&ddata->base->swsrr, 0xaa39);
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spin_unlock(&ddata->lock);
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}
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static void mpc8xxx_wdt_timer_ping(unsigned long arg)
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{
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struct mpc8xxx_wdt_ddata *ddata = (void *)arg;
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mpc8xxx_wdt_keepalive(ddata);
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/* We're pinging it twice faster than needed, just to be sure. */
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mod_timer(&ddata->timer, jiffies + HZ * ddata->wdd.timeout / 2);
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}
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static int mpc8xxx_wdt_start(struct watchdog_device *w)
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{
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struct mpc8xxx_wdt_ddata *ddata =
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container_of(w, struct mpc8xxx_wdt_ddata, wdd);
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u32 tmp = SWCRR_SWEN | SWCRR_SWPR;
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/* Good, fire up the show */
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if (reset)
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tmp |= SWCRR_SWRI;
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tmp |= timeout << 16;
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out_be32(&ddata->base->swcrr, tmp);
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del_timer_sync(&ddata->timer);
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return 0;
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}
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static int mpc8xxx_wdt_ping(struct watchdog_device *w)
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{
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struct mpc8xxx_wdt_ddata *ddata =
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container_of(w, struct mpc8xxx_wdt_ddata, wdd);
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mpc8xxx_wdt_keepalive(ddata);
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return 0;
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}
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static int mpc8xxx_wdt_stop(struct watchdog_device *w)
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{
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struct mpc8xxx_wdt_ddata *ddata =
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container_of(w, struct mpc8xxx_wdt_ddata, wdd);
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mod_timer(&ddata->timer, jiffies);
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return 0;
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}
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static struct watchdog_info mpc8xxx_wdt_info = {
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.options = WDIOF_KEEPALIVEPING,
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.firmware_version = 1,
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.identity = "MPC8xxx",
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};
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static struct watchdog_ops mpc8xxx_wdt_ops = {
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.owner = THIS_MODULE,
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.start = mpc8xxx_wdt_start,
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.ping = mpc8xxx_wdt_ping,
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.stop = mpc8xxx_wdt_stop,
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};
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static int mpc8xxx_wdt_probe(struct platform_device *ofdev)
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{
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int ret;
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struct resource *res;
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const struct mpc8xxx_wdt_type *wdt_type;
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struct mpc8xxx_wdt_ddata *ddata;
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u32 freq = fsl_get_sys_freq();
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bool enabled;
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unsigned int timeout_sec;
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wdt_type = of_device_get_match_data(&ofdev->dev);
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if (!wdt_type)
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return -EINVAL;
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if (!freq || freq == -1)
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return -EINVAL;
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ddata = devm_kzalloc(&ofdev->dev, sizeof(*ddata), GFP_KERNEL);
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if (!ddata)
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return -ENOMEM;
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res = platform_get_resource(ofdev, IORESOURCE_MEM, 0);
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ddata->base = devm_ioremap_resource(&ofdev->dev, res);
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if (IS_ERR(ddata->base))
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return PTR_ERR(ddata->base);
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enabled = in_be32(&ddata->base->swcrr) & SWCRR_SWEN;
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if (!enabled && wdt_type->hw_enabled) {
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pr_info("could not be enabled in software\n");
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return -ENODEV;
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}
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spin_lock_init(&ddata->lock);
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setup_timer(&ddata->timer, mpc8xxx_wdt_timer_ping,
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(unsigned long)ddata);
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ddata->wdd.info = &mpc8xxx_wdt_info,
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ddata->wdd.ops = &mpc8xxx_wdt_ops,
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/* Calculate the timeout in seconds */
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timeout_sec = (timeout * wdt_type->prescaler) / freq;
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ddata->wdd.timeout = timeout_sec;
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watchdog_set_nowayout(&ddata->wdd, nowayout);
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ret = watchdog_register_device(&ddata->wdd);
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if (ret) {
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pr_err("cannot register watchdog device (err=%d)\n", ret);
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return ret;
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}
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pr_info("WDT driver for MPC8xxx initialized. mode:%s timeout=%d (%d seconds)\n",
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reset ? "reset" : "interrupt", timeout, timeout_sec);
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/*
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* If the watchdog was previously enabled or we're running on
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* MPC8xxx, we should ping the wdt from the kernel until the
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* userspace handles it.
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*/
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if (enabled)
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mod_timer(&ddata->timer, jiffies);
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platform_set_drvdata(ofdev, ddata);
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return 0;
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}
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static int mpc8xxx_wdt_remove(struct platform_device *ofdev)
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{
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struct mpc8xxx_wdt_ddata *ddata = platform_get_drvdata(ofdev);
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pr_crit("Watchdog removed, expect the %s soon!\n",
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reset ? "reset" : "machine check exception");
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del_timer_sync(&ddata->timer);
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watchdog_unregister_device(&ddata->wdd);
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return 0;
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}
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static const struct of_device_id mpc8xxx_wdt_match[] = {
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{
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.compatible = "mpc83xx_wdt",
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.data = &(struct mpc8xxx_wdt_type) {
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.prescaler = 0x10000,
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},
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},
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{
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.compatible = "fsl,mpc8610-wdt",
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.data = &(struct mpc8xxx_wdt_type) {
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.prescaler = 0x10000,
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.hw_enabled = true,
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},
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},
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{
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.compatible = "fsl,mpc823-wdt",
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.data = &(struct mpc8xxx_wdt_type) {
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.prescaler = 0x800,
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.hw_enabled = true,
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},
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},
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{},
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};
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MODULE_DEVICE_TABLE(of, mpc8xxx_wdt_match);
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static struct platform_driver mpc8xxx_wdt_driver = {
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.probe = mpc8xxx_wdt_probe,
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.remove = mpc8xxx_wdt_remove,
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.driver = {
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.name = "mpc8xxx_wdt",
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.of_match_table = mpc8xxx_wdt_match,
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},
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};
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static int __init mpc8xxx_wdt_init(void)
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{
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return platform_driver_register(&mpc8xxx_wdt_driver);
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}
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arch_initcall(mpc8xxx_wdt_init);
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static void __exit mpc8xxx_wdt_exit(void)
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{
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platform_driver_unregister(&mpc8xxx_wdt_driver);
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}
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module_exit(mpc8xxx_wdt_exit);
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MODULE_AUTHOR("Dave Updegraff, Kumar Gala");
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MODULE_DESCRIPTION("Driver for watchdog timer in MPC8xx/MPC83xx/MPC86xx "
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"uProcessors");
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MODULE_LICENSE("GPL");
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