tmp_suning_uos_patched/arch/arm64/lib
Will Deacon 0ea366f5e1 arm64: atomics: prefetch the destination word for write prior to stxr
The cost of changing a cacheline from shared to exclusive state can be
significant, especially when this is triggered by an exclusive store,
since it may result in having to retry the transaction.

This patch makes use of prfm to prefetch cachelines for write prior to
ldxr/stxr loops when using the ll/sc atomic routines.

Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
2015-07-27 15:28:53 +01:00
..
atomic_ll_sc.c arm64: introduce CONFIG_ARM64_LSE_ATOMICS as fallback to ll/sc atomics 2015-07-27 15:28:50 +01:00
bitops.S arm64: atomics: prefetch the destination word for write prior to stxr 2015-07-27 15:28:53 +01:00
clear_page.S
clear_user.S
copy_from_user.S
copy_in_user.S
copy_page.S
copy_to_user.S
delay.c
Makefile arm64: introduce CONFIG_ARM64_LSE_ATOMICS as fallback to ll/sc atomics 2015-07-27 15:28:50 +01:00
memchr.S
memcmp.S
memcpy.S
memmove.S
memset.S
strchr.S
strcmp.S
strlen.S
strncmp.S
strnlen.S
strrchr.S