Vineet Gupta 0fb1f35ed9 ARCv2: mm: TLB Miss optim: Use double world load/stores LDD/STD ... Signed-off-by: Vineet Gupta <vgupta@synopsys.com>		2019-10-28 12:12:32 -07:00
..
cache.c	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500	2019-06-19 17:09:55 +02:00
dma.c	dma-mapping updates for 5.4:	2019-09-19 13:27:23 -07:00
extable.c	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500	2019-06-19 17:09:55 +02:00
fault.c	ARC updates for 5.3-rc1	2019-07-16 15:07:51 -07:00
highmem.c	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500	2019-06-19 17:09:55 +02:00
init.c	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500	2019-06-19 17:09:55 +02:00
ioremap.c	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500	2019-06-19 17:09:55 +02:00
Makefile	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500	2019-06-19 17:09:55 +02:00
mmap.c	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500	2019-06-19 17:09:55 +02:00
tlb.c	ARCv2: mm: TLB Miss optim: SMP builds can cache pgd pointer in mmu scratch reg	2019-10-28 12:12:31 -07:00
tlbex.S	ARCv2: mm: TLB Miss optim: Use double world load/stores LDD/STD	2019-10-28 12:12:32 -07:00