1667393126
Now that we have a custom printf format specifier, convert users of full_name to use %pOF instead. This is preparation to remove storing of the full path string for each node. Signed-off-by: Rob Herring <robh@kernel.org> Cc: Michael Turquette <mturquette@baylibre.com> Cc: Stephen Boyd <sboyd@codeaurora.org> Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com> Cc: Alexandre Torgue <alexandre.torgue@st.com> Cc: Russell King <linux@armlinux.org.uk> Cc: Matthias Brugger <matthias.bgg@gmail.com> Cc: Geert Uytterhoeven <geert+renesas@glider.be> Cc: Maxime Ripard <maxime.ripard@free-electrons.com> Cc: Chen-Yu Tsai <wens@csie.org> Cc: "Emilio López" <emilio@elopez.com.ar> Cc: Peter De Schrijver <pdeschrijver@nvidia.com> Cc: Prashant Gaikwad <pgaikwad@nvidia.com> Cc: Thierry Reding <thierry.reding@gmail.com> Cc: Jonathan Hunter <jonathanh@nvidia.com> Cc: Tero Kristo <t-kristo@ti.com> Cc: linux-clk@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org Cc: linux-mediatek@lists.infradead.org Cc: linux-renesas-soc@vger.kernel.org Cc: linux-tegra@vger.kernel.org Cc: linux-omap@vger.kernel.org Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: James Liao <jamesjj.liao@mediatek.com> Acked-by: Alexandre TORGUE <alexandre.torgue@st.com> Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
101 lines
2.4 KiB
C
101 lines
2.4 KiB
C
/*
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* MOXA ART SoCs clock driver.
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*
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* Copyright (C) 2013 Jonas Jensen
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*
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* Jonas Jensen <jonas.jensen@gmail.com>
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*
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without any
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* warranty of any kind, whether express or implied.
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*/
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#include <linux/clk.h>
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#include <linux/clk-provider.h>
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#include <linux/io.h>
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#include <linux/of_address.h>
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#include <linux/clkdev.h>
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static void __init moxart_of_pll_clk_init(struct device_node *node)
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{
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void __iomem *base;
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struct clk_hw *hw;
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struct clk *ref_clk;
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unsigned int mul;
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const char *name = node->name;
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const char *parent_name;
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of_property_read_string(node, "clock-output-names", &name);
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parent_name = of_clk_get_parent_name(node, 0);
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base = of_iomap(node, 0);
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if (!base) {
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pr_err("%pOF: of_iomap failed\n", node);
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return;
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}
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mul = readl(base + 0x30) >> 3 & 0x3f;
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iounmap(base);
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ref_clk = of_clk_get(node, 0);
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if (IS_ERR(ref_clk)) {
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pr_err("%pOF: of_clk_get failed\n", node);
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return;
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}
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hw = clk_hw_register_fixed_factor(NULL, name, parent_name, 0, mul, 1);
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if (IS_ERR(hw)) {
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pr_err("%pOF: failed to register clock\n", node);
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return;
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}
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clk_hw_register_clkdev(hw, NULL, name);
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of_clk_add_hw_provider(node, of_clk_hw_simple_get, hw);
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}
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CLK_OF_DECLARE(moxart_pll_clock, "moxa,moxart-pll-clock",
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moxart_of_pll_clk_init);
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static void __init moxart_of_apb_clk_init(struct device_node *node)
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{
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void __iomem *base;
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struct clk_hw *hw;
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struct clk *pll_clk;
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unsigned int div, val;
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unsigned int div_idx[] = { 2, 3, 4, 6, 8};
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const char *name = node->name;
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const char *parent_name;
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of_property_read_string(node, "clock-output-names", &name);
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parent_name = of_clk_get_parent_name(node, 0);
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base = of_iomap(node, 0);
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if (!base) {
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pr_err("%pOF: of_iomap failed\n", node);
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return;
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}
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val = readl(base + 0xc) >> 4 & 0x7;
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iounmap(base);
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if (val > 4)
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val = 0;
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div = div_idx[val] * 2;
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pll_clk = of_clk_get(node, 0);
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if (IS_ERR(pll_clk)) {
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pr_err("%pOF: of_clk_get failed\n", node);
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return;
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}
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hw = clk_hw_register_fixed_factor(NULL, name, parent_name, 0, 1, div);
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if (IS_ERR(hw)) {
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pr_err("%pOF: failed to register clock\n", node);
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return;
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}
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clk_hw_register_clkdev(hw, NULL, name);
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of_clk_add_hw_provider(node, of_clk_hw_simple_get, hw);
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}
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CLK_OF_DECLARE(moxart_apb_clock, "moxa,moxart-apb-clock",
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moxart_of_apb_clk_init);
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