Tudor Ambarus 191f5c2ed4 mtd: spi-nor: use 16-bit WRR command when QE is set on spansion flashes ... SPI memory devices from different manufacturers have widely different configurations for Status, Control and Configuration registers. JEDEC 216C defines a new map for these common register bits and their functions, and describes how the individual bits may be accessed for a specific device. For the JEDEC 216B compliant flashes, we can partially deduce Status and Configuration registers functions by inspecting the 16th DWORD of BFPT. Older flashes that don't declare the SFDP tables (SPANSION FL512SAIFG1 311QQ063 A ©11 SPANSION) let the software decide how to interact with these registers. The commit dcb4b22eea ("spi-nor: s25fl512s supports region locking") uncovered a probe error for s25fl512s, when the Quad Enable bit CR[1] was set to one in the bootloader. When this bit is one, only the Write Status (01h) command with two data byts may be used, the 01h command with one data byte is not recognized and hence the error when trying to clear the block protection bits. Fix the above by using the Write Status (01h) command with two data bytes when the Quad Enable bit is one. Backward compatibility should be fine. The newly introduced spi_nor_spansion_clear_sr_bp() is tightly coupled with the spansion_quad_enable() function. Both assume that the Write Register with 16 bits, together with the Read Configuration Register (35h) instructions are supported. Fixes: dcb4b22eea ("spi-nor: s25fl512s supports region locking") Reported-by: Geert Uytterhoeven <geert@linux-m68k.org> Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Tested-by: Jonas Bonn <jonas@norrbonn.se> Tested-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Vignesh Raghavendra <vigneshr@ti.com> Tested-by: Vignesh Raghavendra <vigneshr@ti.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>		2019-06-23 20:03:34 +02:00
..
chips	mtd: cfi_cmdset_0002: Mark expected switch fall-throughs	2019-05-06 21:57:05 +02:00
devices	mtd: phram: Mark expected switch fall-throughs	2019-05-06 21:57:05 +02:00
lpddr	mtd: lpddr_cmds: Mark expected switch fall-through	2019-05-06 21:57:05 +02:00
maps	treewide: replace #include <asm/sizes.h> with #include <linux/sizes.h>	2019-05-14 19:52:52 -07:00
nand	mtd: rawnand: initialize ntargets with maxchips	2019-05-21 11:50:49 +02:00
parsers	mtd: afs: add v2 partition parsing	2019-05-06 21:57:03 +02:00
spi-nor	mtd: spi-nor: use 16-bit WRR command when QE is set on spansion flashes	2019-06-23 20:03:34 +02:00
tests	mtd: rawnand: Clarify Kconfig entry MTD_NAND	2019-04-18 08:54:00 +02:00
ubi	ubi: wl: Fix uninitialized variable	2019-05-07 21:58:33 +02:00
ar7part.c
bcm47xxpart.c
bcm63xxpart.c	mtd: bcm63xxpart: move imagetag parsing to its own parser	2019-05-06 21:46:45 +02:00
cmdlinepart.c
ftl.c
inftlcore.c
inftlmount.c
Kconfig	mtd: afs: Move AFS partition parser to parsers subdir	2019-05-06 21:48:46 +02:00
Makefile	mtd: afs: Move AFS partition parser to parsers subdir	2019-05-06 21:48:46 +02:00
mtd_blkdevs.c
mtdblock_ro.c
mtdblock.c
mtdchar.c
mtdconcat.c
mtdcore.c	MTD changes:	2019-03-04 18:59:37 -08:00
mtdcore.h	mtd: Check add_mtd_device() ret code	2019-01-07 14:06:24 +01:00
mtdoops.c
mtdpart.c	mtd: part: fix incorrect format specifier for an unsigned long long	2019-05-06 21:57:06 +02:00
mtdsuper.c
mtdswap.c
nftlcore.c
nftlmount.c
ofpart.c
rfd_ftl.c
sm_ftl.c	mtd: nand: Clarify Kconfig entry for software Hamming ECC entries	2019-04-18 08:54:00 +02:00
sm_ftl.h
ssfdc.c